ST LSM330D User Manual

LSM330D

iNEMO inertial module: 3D accelerometer and 3D gyroscope

Preliminary data

Features

■Analog supply voltage: 2.4 V to 3.6 V

■Digital supply voltage IOs: 1.8 V

■Low power mode

■Power-down mode

■3 independent acceleration channels and 3 angular rate channels

■±2 g/±4 g/±8 g/±16 g dynamically selectable full scale

■±250/±500/±2000 dps dynamically selectable full scale

■SPI/I2C serial interface (16-bit data output)

■Programmable interrupt generator for free-fall and motion detection

■ECOPACK® RoHS and “Green” compliant

Application

■GPS navigation systems

■Impact recognition and logging

■Gaming and virtual reality input devices

■Motion activated functions

■Intelligent power saving for handheld devices

■Vibration monitoring and compensation

■Free-fall detection

■6D orientation detection

LGA-28L (3x5.5x1.0 mm)

ST’s family of MEMS sensor modules leverages the robust and mature manufacturing processes already used for the production of micromachined accelerometers.

The various sensing elements are manufactured using specialized micromachining processes, while the IC interfaces are developed using a CMOS technology that allows the design of a dedicated circuit which is trimmed to better match the sensing element characteristics.

The LSM330D has dynamically user-selectable full scale acceleration range of ±2 g/±4 g/±8 g/±16 g and angular rate of ±250/±500/±2000 deg/sec.

The accelerometer and gyroscope sensors can be either activated or separately put in Low power/Power-down mode for applications optimized for power saving.

The LSM330D is available in a plastic land grid array (LGA) package.

Description

The LSM330D is a system-in-package featuring a 3D digital accelerometer and a 3D digital gyroscope.

Table 1.	Device summary
Part number		Temperature range [°C]	Package		Packing
	LSM330D	-40 to +85	LGA-28L (3x5.5x1.0 mm)		Tray
LSM330DTR		-40 to +85			Tape and reel
December 2011		Doc ID 022562 Rev 1			1/66
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to					www.st.com
change without notice.

Contents	LSM330D

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		10
	1.1	Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
	1.2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
2	Module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		13

2.1 Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.3 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.4 Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.4.1 SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.4.2 I2C - inter IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3	Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		19
	3.1	Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
	3.2	Zero level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
4	Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		20
	4.1	Accelerometer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20

4.1.1 Normal mode, Low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1.2 Self-test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1.3 6D/4D orientation detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.4 “Sleep-to-wake” and “Return to sleep” . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Accelerometer digital main blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.1.5 FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.6 Bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.7 FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.8 Stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1.9 Stream-to-FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1.10 Retrieve data from FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.2 Gyroscope digital main blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.3 FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.3.1 Bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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4.3.2 FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.3.3 Stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3.4 Bypass-to-stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.3.5 Stream-to-FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.3.6 Retrieve data from FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

	4.4	Level-sensitive / Edge-sensitive data enable . . . . . . . . . . . . . . . . . . . . . .		28
		4.4.1	Level-sensitive trigger stamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
		4.4.2	Edge-sensitive trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
	4.5	Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		30
5	Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			31

5.1 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2 Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6	Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		32
	6.1	I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32

6.1.1 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.2 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

	6.2.1	SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	36
	6.2.2	SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	37
	6.2.3	SPI read in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	37
7	Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		39
8	Register descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		42

8.1 CTRL_REG1_A (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

8.2 CTRL_REG2_A (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

8.3 CTRL_REG3_A (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

8.4 CTRL_REG4_A (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

8.5 CTRL_REG5_A (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

8.6 CTRL_REG6_A (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

8.7 REFERENCE/DATACAPTURE_A (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . 45

8.8 STATUS_REG_A (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

8.9 OUT_X_L_A, OUT_X_H_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

8.10 OUT_Y_L_A, OUT_Y_H_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

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8.11 OUT_Z_L _A, OUT_Z_H_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

8.12 FIFO_CTRL_REG_A (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

8.13 FIFO_SRC_REG_A (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

8.14 INT1_CFG_A (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

8.15 INT1_SRC_A (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

8.16 INT1_THS_A (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

8.17 INT1_DURATION_A (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

8.18 CLICK_CFG _A (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

8.19 CLICK_SRC_A (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

8.20 CLICK_THS_A (3Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

8.21 TIME_LIMIT_A (3Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

8.22 TIME_LATENCY_A (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

8.23 TIME WINDOW_A (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

8.24 Act_THS (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.25 Act_DUR (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.26 WHO_AM_I_G (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.27 CTRL_REG1_G (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.28 CTRL_REG2_G (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

8.29 CTRL_REG3_G (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

8.30 CTRL_REG4_G (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

8.31 CTRL_REG5_G (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

8.32 REFERENCE_G (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

8.33 OUT_TEMP_G (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.34 STATUS_REG_G (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.35 OUT_X_L_G, OUT_X_H_G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.36 OUT_Y_L_G, OUT_Y_H_G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

8.37 OUT_Z_L_G, OUT_Z_H_G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

8.38 FIFO_CTRL_REG_G (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

8.39 FIFO_SRC_REG_G (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

8.40 INT1_CFG_G (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

8.41 INT1_SRC_G (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

8.42 INT1_THS_XH_G (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

8.43 INT1_THS_XL_G (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

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	8.44	INT1_THS_YH _G (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 60
	8.45	INT1_THS_YL_G (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 61
	8.46	INT1_THS_ZH_G (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 61
	8.47	INT1_THS_ZL_G (37h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 61
	8.48	INT1_DURATION_G (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 61
9	Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. . . . 64
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. . . . 65

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List of tables	LSM330D

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3. Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 6. SPI slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 7. I2C slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 8. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 9. Operating mode selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 10. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 11. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 12. Transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 13. Transfer when master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 14. Transfer when master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . 33 Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 33 Table 16. Linear acceleration SAD+Read/Write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 17. Angular rate SAD+Read/Write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 18. Register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 19. CTRL_REG1_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 20. CTRL_REG1_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 21. Data rate configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 22. CTRL_REG2_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 23. CTRL_REG2_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 24. High-pass filter mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 25. CTRL_REG3_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 26. CTRL_REG3_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 27. CTRL_REG4_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 28. CTRL_REG4_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 29. CTRL_REG5_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 30. CTRL_REG5_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 31. CTRL_REG6_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 32. CTRL_REG6 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 33. REFERENCE_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 34. REFERENCE register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 35. STATUS_REG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 36. STATUS_REG_A register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 37. FIFO_CTRL_REG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 38. FIFO_CTRL_REG_A register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 39. FIFO mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 40. FIFO_SRC_REG_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 41. FIFO_SRC_REG_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 42. INT1_CFG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 43. INT1_CFG_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 44. Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 45. INT1_SRC_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 46. INT1_SRC_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 47. INT1_THS_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 48. INT1_THS_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

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Table 49. INT1_DURATION_Aregister. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 50. INT1_DURATION_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 51. CLICK_CFG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 52. CLICK_CFG_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 53. CLICK_SRC_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 54. CLICK_SRC_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 55. CLICK_THS_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 56. CLICK_SRC_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 57. TIME_LIMIT_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 58. TIME_LIMIT_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 59. TIME_LATENCY_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 60. TIME_LATENCY_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 61. TIME_WINDOW_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 62. TIME_WINDOW_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 63. Act_THS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 64. Act_THS description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 65. Act_DUR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 66. Act_DUR description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 67. WHO_AM_I_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 68. CTRL_REG1_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 69. CTRL_REG1_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 70. DR and BW configuration setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 71. Power mode selection configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 72. CTRL_REG2_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 73. CTRL_REG2_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 74. High-pass filter mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 75. High-pass filter cut-off frequency configuration [Hz] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 76. CTRL_REG3_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 77. CTRL_REG3_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 78. CTRL_REG4_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 79. CTRL_REG4_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 80. CTRL_REG5_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 81. CTRL_REG5_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 82. REFERENCE_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 83. REFERENCE_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 84. OUT_TEMP_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 85. OUT_TEMP_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 86. STATUS_REG_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 87. STATUS_REG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 88. FIFO_CTRL_REG_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 89. FIFO_CTRL_REG_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 90. FIFO mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 91. FIFO_SRC_REG_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 92. FIFO_SRC_REG_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 93. INT1_CFG_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 94. INT1_CFG_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 95. INT1_SRC_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 96. INT1_SRC_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 97. INT1_THS_XH_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 98. INT1_THS_XH_G description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 99. INT1_THS_XL_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 100. INT1_THS_XL_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

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List of tables	LSM330D

Table 101. INT1_THS_YH_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 102. INT1_THS_YH_G description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 103. INT1_THS_YL_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 104. INT1_THS_YL_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 105. INT1_THS_ZH_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 106. INT1_THS_ZH_G description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 107. INT1_THS_ZL_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 108. INT1_THS_ZL_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 109. INT1_DURATION_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 110. INT1_DURATION_G description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Table 111. LGA-28L (3x5.5x1.0 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 112. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

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LSM330D	List of figures

List of figures

Figure 1. LSM330D block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 4. I2C slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Gyroscope block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 6. Bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 7. FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 8. Stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 9. Bypass-to-stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 10. Trigger stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 11. Level-sensitive trigger stamping (LVLen = 1; EXTRen = 0) . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 12. Edge-sensitive trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 13. LSM330D electrical connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 14. Read and write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 15. SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 16. Multiple-byte SPI read protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 17. SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 18. Multiple bytes SPI write protocol (2 bytes example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 19. SPI read protocol in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 20. INT1_Sel and Out_Sel configuration block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 21. Wait disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 22. Wait enabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 23. LGA-28L (3x5.5x1.0 mm) drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

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Block diagram and pin description	LSM330D

1 Block diagram and pin description

1.1Block diagram

Figure 1. LSM330D block diagram

Sensing Block	Sensing Interface
X+						CS_A
Y+	CHARGE					CS_G
Z+	AMPLIFIER
						SDA/SDI_A/G
I (a)
	+		A/D	Control		SDO_A
	MUX
			converter	Logic
	-
						SDO_G
Z-					I2C/SPI
Y-						SCL_A/G
X-						INT1_A
X+
Y+	CHARGE					INT2_A
	AMPLIFIER	DEMODULATOR
Z+
I (Ω)	+		LOW-PASS			INT1_G
	MUX		FILTER
	-					DRDY_G/
Z-						INT2_G
Y-
X-		ANALOG
		CONDITIONING
Feedback+
Feedback-			AUTOMATIC
Drive-			GAIN
			CONTROL
	VOLTAGE
	GAIN
	AMPLIFIER
Drive+
	REFERENCE	TRIMMING	CLOCK
		CIRCUITS
	CONTROL LOGIC	PHASE
	&
		GENERATOR
	INTERRUPT GEN.
						AM10231v1

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LSM330D	Block diagram and pin description

1.2Pin description

Figure 2. Pin connection

Z

Y

1

IOVdd

GSC

ASC

A/GCLS

IOVdd

GDOS

ADOS

A/GDAS

GDEN

GND

DETECTABLE

DIRECTION OF

ACCELERATIONS

X

19

28

INT1_A

RES

18

LSM330D

1

INT2_A

RES

+Ω

z

+Ω Y

INT1_G

(BOTTOM VIEW)

RES

Z

DRDY_G/INT2_G

FILTVDD

RES

Y

DIRECTION OF

15

4

14

5

+Ω X

DETECTABLE

FILTIN

Y

ANGULAR RATE

SRE

SRE

SRE

SRE

SRE

SRE

VDD

VDD

VDD

GND

X

AM10232V1

Table 2.

Pin description

Pin#

Name

Function

1

Res

Reserved connect to GND

2

Res

Reserved connect to GND

3

Res

Reserved connect to GND

4

Res

Reserved connect to GND

5

GND

0 V supply

6

Vdd

Power supply

7

Vdd

Power supply

8

Vdd

Power supply

9

Res

Reserved connect to Vdd

10

Res

Reserved connect to Vdd

11

Res

Reserved connect to Vdd

12

Res

Reserved connect to Vdd

13

Res

Reserved connect to Vdd

14

Res

Leave unconnected

15

DRDY_G/

Gyroscope data ready/interrupt signal 2

INT2_G

16

INT1_G

Gyroscope interrupt signal 1

17

INT2_A

Accelerometer interrupt signal 2

18

INT1_A

Accelerometer interrupt signal 1

19

Vdd_IO

Power supply for IO pins

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Block diagram and pin description				LSM330D
	Table 2.	Pin description		(continued)
	Pin#		Name	Function
				Gyroscope: SPI enable
	20		CS_G	I2C/SPI mode selection (1: SPI idle mode / I2C communication
				enabled; 0: SPI communication mode / I2C disabled)
				Accelerometer: SPI enable
	21		CS_A	I2C/SPI mode selection (1: SPI idle mode / I2C communication
				enabled; 0: SPI communication mode / I2C disabled)
	22		SCL_A/G	I2C serial clock (SCL)
				SPI serial port clock (SPC)
	23		Vdd_IO	Power supply for IO pins
	24		SDO_G	Gyroscope: SPI serial data output (SDO) /
				I2C least significant bit of the device address (SA0)
	25		SDO_A	Accelerometer :SPI serial data output (SDO) /
				I2C least significant bit of the device address (SA0)
	26		SDA_A/G	I2C serial data (SDA) / SPI serial data input (SDI)
				3-wire interface serial data output (SDO)
	27		DEN_G	Gyroscope data enable
	28		GND	0 V supply

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LSM330D	Module specifications

2 Module specifications

2.1Mechanical characteristics

@ Vdd = 3V, T = 25 °C unless otherwise noted (a)

Table 3.	Mechanical characteristics
Symbol	Parameter	Test conditions	Min.	Typ.(1)	Max.		Unit
				±2
LA_FS	Linear acceleration measurement	User-selectable		±4			g
	range(2)
				±8
				±16
	Angular rate			±250
G_FS
		User-selectable		±500			dps
	measurement range(3)
				±2000
		FS = ±2 g		1
LA_So	Linear acceleration sensitivity	FS = ±4 g		2		mg/digit
		FS = ±8 g		4
		FS = ±16 g		12
		FS = ±250 dps		8.75		mdps/
G_So	Angular rate sensitivity	FS = ±500 dps		17.50
							digit
		FS = ±2000 dps		70
LA_So	Linear acceleration sensitivity	FS = ±2 g		±0.05		%/°C
	change vs. temperature
G_SoDr	Angular rate sensitivity change vs.	From -40 °C to +85 °C		±2			%
	temperature
LA_TyOff	Linear acceleration typical zero-g	FS bit set to 00		±60			mg
	level offset accuracy(3)
		FS = 250 dps		±10
	Angular rate typical zero-rate
G_TyOff		FS = 500 dps		±15			dps
	level(4)
		FS = 2000 dps		±25
LA_TCOff	Linear acceleration zero-g level	Max delta from 25 °C		±0.5		mg/°C
	change vs. temperature
G_TCOff	Zero-rate level change vs.			±0.05		dps/°C
	temperature
		FS = ±2 g, Normal mode					Hz
An	Acceleration noise density	Table 9, ODR bit set to		220		µg/
		1001 Table 19

a. The product is factory calibrated at 3.0 V. The operational power supply range is from 2.4 V to 3.6 V.

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Module specifications						LSM330D
Table 3.	Mechanical characteristics (continued)
Symbol	Parameter	Test conditions	Min.	Typ.(1)	Max.	Unit
Rn	Rate noise density			0.03		dps/ Hz
Top	Operating temperature range		-40		+85	°C

1.Typical specifications are not guaranteed.

2.Verified by wafer level test and measurement of initial offset and sensitivity.

3.Typical zero-g level offset value after MSL3 preconditioning.

4.Offset can be eliminated by enabling the built-in high-pass filter.

2.2Electrical characteristics

@ Vdd = 3 V, T = 25 °C unless otherwise noted

Table 4.	Electrical characteristics
Symbol		Parameter	Test conditions	Min.	Typ.(1)	Max.	Unit
Vdd		Supply voltage		2.4		3.6	V
Vdd_IO		Power supply for I/O		1.71		Vdd+0.1	V
LA_Idd		Accelerometer current	ODR = 50 Hz		11		µA
		consumption in Normal mode	ODR = 1 Hz		2
		Accelerometer current
LA_IddLowP		consumption in Low power	ODR = 50 Hz		6		µA
		mode
		Accelerometer current
LA_IddPdn		consumption in Power-down			0.5		µA
		mode
G_Idd		Gyroscope current			6.1		mA
		consumption in Normal mode
G_IddLowP		Gyroscope supply current			2		mA
		in Sleep mode(2)
		Gyroscope current
G_IddPdn		consumption in Power-down			5		µA
		mode
VIH		Digital high level input voltage		0.8*Vdd_IO			V
VIL		Digital low level input voltage				0.2*Vdd_IO	V
VOH		High level output voltage		0.9*Vdd_IO			V
VOL		Low level output voltage				0.1*Vdd_IO	V
Top		Operating temperature range		-40		+85	°C

1.Typical specifications are not guaranteed.

2.Sleep mode introduces a faster turn-on time compared to Power-down mode.

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LSM330D	Module specifications

2.3Temperature sensor characteristics

@ Vdd = 3V, T = 25 °C unless otherwise noted (b)

Table 5.	Electrical characteristics
Symbol	Parameter	Test condition	Min.	Typ.(1)	Max.	Unit
TSDr	Temperature sensor output			-1		°C/digit
	change vs. temperature					(2)
		-
TODR	Temperature refresh rate			1		Hz
Top	Operating temperature range		-40		+85	°C

1.Typical specifications are not guaranteed.

2.8-bit resolution.

2.4Communication interface characteristics

2.4.1SPI - serial peripheral interface

Subject to general operating conditions for Vdd and TOP.

Table 6.	SPI slave timing values
Symbol		Parameter		Value (1)		Unit
			Min		Max
tc(SPC)		SPI clock cycle	100			ns
fc(SPC)		SPI clock frequency			10	MHz
tsu(CS)		CS setup time	6
th(CS)		CS hold time	20
tsu(SI)		SDI input setup time	5
th(SI)		SDI input hold time	15			ns
tv(SO)		SDO valid output time			50
th(SO)		SDO output hold time	5
tdis(SO)		SDO output disable time			50

1.Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results. Not tested in production.

b. The product is factory calibrated at 3.0 V.

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Module specifications							LSM330D
Figure 3.		SPI slave timing diagram(c)(d)
CS	(3)						(3)
		su(CS)			c(SPC)	h(CS)
SPC	(3)						(3)
			su(SI)	h(SI)
SDI	(3)		MSB IN			LSB IN	(3)
				v(SO)	h(SO)		dis(SO)
SDO	(3)			MSB OUT		LSB OUT	(3)

3. Data on CS, SPC, SDI and SDO refer to pins: CS_A, CS_G, SCL_A/G, SDA_A/G, SDO_A / SDO_G.

2.4.2I2C - inter IC control interface

Subject to general operating conditions for Vdd and TOP.

Table 7.	I2C slave timing values
Symbol		Parameter(1)	I2C standard mode (1)		I2C fast mode (1)			Unit
			Min	Max	Min		Max
f(SCL)		SCL clock frequency	0	100	0		400	KHz
tw(SCLL)		SCL clock low time	4.7		1.3			µs
tw(SCLH)		SCL clock high time	4.0		0.6
tsu(SDA)		SDA setup time	250		100			ns
th(SDA)		SDA data hold time	0	3.45	0		0.9	µs
tr(SDA) tr(SCL)		SDA and SCL rise time		1000	20 + 0.1C	(2)	300
						b		ns
tf(SDA) tf(SCL)		SDA and SCL fall time		300	20 + 0.1C	(2)	300
						b
th(ST)		START condition hold time	4		0.6
tsu(SR)		Repeated START condition	4.7		0.6
		setup time
								µs
tsu(SP)		STOP condition setup time	4		0.6
tw(SP:SR)		Bus free time between STOP	4.7		1.3
		and START condition

1.SCL (SCL_A/G pin), SDA (SDA_A/G pin)

2.Cb = total capacitance of one bus line, in pF

c.The SDO_A output line features an internal pull-up.

d.Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.

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LSM330D	Module specifications

Figure 4. I2C slave timing diagram(e)

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e. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports.

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Module specifications	LSM330D

2.5Absolute maximum ratings

Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

	Table 8.	Absolute maximum ratings(1)
	Symbol	Ratings	Maximum value	Unit
	Vdd	Supply voltage	-0.3 to 4.8	V
	Vdd_IO	I/O pins supply voltage	-0.3 to 4.8	V
	Vin	Input voltage on any control pin (SCL_A/G, SDA_A/G,	-0.3 to Vdd_IO +0.3	V
		SDO_A, SDO_G, CS_A, CS_G, DEN_G)
	APOW	Acceleration (any axis, powered, Vdd = 3 V)	3000 g for 0.5 ms
			10000 g for 0.1 ms
	AUNP	Acceleration (any axis, unpowered)	3000 g for 0.5 ms
			10000 g for 0.1 ms
	TOP	Operating temperature range	-40 to +85	°C
	TSTG	Storage temperature range	-40 to +125	°C
	ESD	Electrostatic discharge protection	2 (HBM)	kV

1. Supply voltage on any pin should never exceed 4.8 V.

This is a mechanical shock sensitive device, improper handling can cause permanent damage to the part.

This is an ESD sensitive device, improper handling can cause permanent damage to the part.

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LSM330D	Terminology

3 Terminology

3.1Sensitivity

Linear acceleration sensitivity can be determined e.g. by applying 1 g acceleration to the device. Because the sensor can measure DC accelerations, this can be done easily by pointing the selected axis towards the ground, noting the output value, rotating the sensor 180 degrees (pointing towards the sky) and noting the output value again. By doing so, ±1 g acceleration is applied to the sensor. Subtracting the larger output value from the smaller one, and dividing the result by 2, leads to the actual sensitivity of the sensor. This value changes very little over temperature and over time. The sensitivity tolerance describes the range of sensitivities of a large number of sensors.

Angular Rate Sensitivity describes the angular rate gain of the sensor and can be determined by applying a defined angular velocity to it. This value changes very little over temperature and also very little over time.

3.2Zero level

Linear acceleration zero-g level offset (TyOff) describes the deviation of an actual output signal from the ideal output signal if no acceleration is present. A sensor in a steady state on a horizontal surface will measure 0 g on both the X axis and Y axes, whereas the Z axis will measure 1 g. Ideally, the output is in the middle of the dynamic range of the sensor (content of OUT registers 00h, data expressed as 2’s complement number). A deviation from the ideal value in this case is called zero-g offset.

Offset is to some extent a result of stress to MEMS sensor and therefore the offset can slightly change after mounting the sensor onto a printed circuit board or exposing it to extensive mechanical stress. Offset changes little over temperature, see “Linear acceleration zero-g level change vs. temperature” in Table 3. The zero-g level tolerance (TyOff) describes the standard deviation of the range of zero-g levels of a group of sensors.

Angular rate zero-rate level describes the actual output value if there is no angular rate present. zero-rate level of precise MEMS sensors is, to some extent, a result of stress to the sensor and therefore zero-rate level can slightly change after mounting the sensor onto a printed circuit board or after exposing it to extensive mechanical stress. This value changes very little over temperature and over time.

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Functionality	LSM330D

4 Functionality

The LSM330D is a system-in-package featuring a 3D digital accelerometer and a 3D digital gyroscope.

The device includes specific sensing elements and two IC interfaces capable to measuring both the acceleration and angular rate applied to the module and to provide a signal to external applications through an SPI/I2C serial interface.

The various sensing elements are manufactured using specialized micromachining processes, while the IC interfaces are developed using a CMOS technology that allows the design of a dedicated circuit which is trimmed to better match the sensing element characteristics.

The LSM330D may also be configured to generate an inertial wakeup and free-fall interrupt signal according to a programmed acceleration event along the enabled axes.

4.1Accelerometer

4.1.1Normal mode, Low power mode

The accelerometer sensor inside the LSM330D inertial module provides two different operating modes: Normal mode and Low power mode. Normal mode guarantees high resolution, while Low power mode further reduces current consumption.

The table below summarizes how to select the operating mode and the corresponding characteristics.

	Table 9.	Operating mode selection
	Operating mode		CTRL_REG1[3]	CTRL_REG4[3]	BW [Hz]	Turn-on time [ms]
			(LPen bit)	(HR bit)
	Low power mode (8-bit)		1	0	ODR/2	1
	Normal mode (12-bit)		0	1	ODR/9	7/ODR(kHz)

4.1.2Self-test

Self-test allows the checking of sensor functionality without moving it. The self-test function is off when the self-test bit (ST) is programmed to ‘0’. When the self-test bit is programmed to ‘1’ an actuation force is applied to the sensor, simulating a definite input acceleration. In this case, the sensor outputs exhibit a change in their DC levels which are related to the selected full scale through the device sensitivity. When self-test is activated, the device output level is given by the algebraic sum of the signals produced by the acceleration acting on the sensor and by the electrostatic test-force. If the output signals change within the amplitude specified in Table 3, then the sensor is working properly and the parameters of the interface chip are within the defined specifications.

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