LM2903W
Low-power dual voltage comparator
Features
■Wide single supply voltage range or dual supplies +2 V to +36 V or ±1 V to ±18 V
■Very low supply current (0.4 mA) independent of supply voltage (1 mW/comparator at +5 V)
■Low input bias current: 25 nA typ.
■Low input offset current: ±5 nA typ.
■Input common-mode voltage range includes negative rail
■Low output saturation voltage: 250 mV typ. (IO = 4 mA)
■Differential input voltage range equal to the supply voltage
■TTL, DTL, ECL, MOS, CMOS compatible outputs
■ESD internal protection: 2 kV
Description
This device consists of two independent lowpower voltage comparators designed specifically to operate from a single supply over a wide range of voltages. Operation from split power supplies is also possible.
The input common-mode voltage range includes the negative rail even though operated from a single power supply voltage.
All the pins are protected against electrostatic discharge up to 2 kV. As a consequence, the input
voltages must not exceed the magnitude of VCC+ or VCC-.
Preliminary data
D
SO-8
(Plastic micropackage)
Pin connections (top view)
1 - Output 1
2 - Inverting input 1
3- Non-inverting input 1
4- VCC-
5- Non-inverting input 2
6- Inverting input 2
7- Output 2
8- VCC+
January 2012 |
Doc ID 022662 Rev 1 |
1/13 |
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to |
www.st.com |
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change without notice. |
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Schematic diagram |
LM2903W |
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6## |
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.ON INVERTING INPUT
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)NVERTING |
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INPUT |
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6## |
2/13 |
Doc ID 022662 Rev 1 |
LM2903W |
Absolute maximum ratings and operating conditions |
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Table 1. |
Absolute maximum ratings |
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Symbol |
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Parameter |
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Value |
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Unit |
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VCC |
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Supply voltage |
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±18 to 36 |
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V |
Vid |
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Differential input voltage |
V |
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- -0.3 to V |
+ +0.3 |
V |
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CC |
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Vin |
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Input voltage |
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CC |
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Vout |
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Output voltage |
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36 |
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V |
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Output short-circuit to ground (1) |
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Infinite |
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Rthja |
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Thermal resistance junction to ambient(2) |
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°C/W |
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SO-8 |
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125 |
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Rthjc |
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Thermal resistance junction to case(2) |
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°C/W |
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SO-8 |
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40 |
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Tj |
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Maximum junction temperature |
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+150 |
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°C |
Tstg |
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Storage temperature range |
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-65 to +150 |
°C |
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Human body model (HBM)(3) |
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2000 |
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V |
ESD |
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Machine model (MM)(4) |
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200 |
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V |
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CDM: charged device model(5) |
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1500 |
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V |
1.Short-circuits from the output to VCC+ can cause excessive heating and possible destruction. The maximum output current is approximately 20 mA, independent of the magnitude of VCC+.
2.Short-circuits can cause excessive heating and destructive dissipation. Values are typical.
3.Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
4.Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating.
5.Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins.
Table 2. |
Operating conditions |
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Symbol |
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Parameter |
Value |
Unit |
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Vicm |
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Common mode input voltage range |
0 to VCC+ -1.5 |
V |
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T |
≤ T |
≤ T |
max |
0 to V |
+ -2 |
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min |
amb |
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CC |
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Toper |
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Operating free-air temperature range |
-40 to +125 |
°C |
Doc ID 022662 Rev 1 |
3/13 |
Electrical characteristics |
LM2903W |
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Table 3. |
V |
CC |
+ = 5 V, V |
- |
= GND, T |
amb |
= 25°C (unless otherwise specified) |
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CC |
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Symbol |
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Parameter |
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Min. |
Typ. |
Max. |
Unit |
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Vio |
Input offset voltage (1) |
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1 |
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7 |
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mV |
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Tmin |
≤ Tamb ≤ Tmax |
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15 |
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Iio |
Input offset current |
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5 |
50 |
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nA |
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Tmin |
≤ Tamb ≤ Tmax |
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150 |
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Iib |
Input bias current (2) |
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25 |
250 |
nA |
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Tmin |
≤ Tamb ≤ Tmax |
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400 |
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Avd |
Large signal voltage gain |
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25 |
200 |
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V/mV |
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VCC = 15 V, RL = 15 kΩ, Vo = 1 to 11 V |
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Supply current (all comparators) |
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ICC |
V |
= 5 V, no load |
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0.4 |
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1 |
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mA |
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CC |
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VCC = 30 V, no load |
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1 |
2.5 |
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V |
Differential input voltage (3) |
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V |
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+ |
V |
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id |
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CC |
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VOL |
Low level output voltage (Vid = -1 V, Isink = 4 mA) |
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250 |
400 |
mV |
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Tmin |
≤ Tamb ≤ Tmax |
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700 |
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IOH |
High level output current (VCC = Vo = 30 V, Vid = 1 V) |
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0.1 |
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nA |
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Tmin ≤ Tamb ≤ Tmax |
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1 |
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µA |
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Isink |
Output sink current (Vid = -1 V, Vo = 1.5 V) |
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16 |
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mA |
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t |
res |
Small signal response time |
(4) (R |
= 5.1 kΩ to V |
+) |
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1.3 |
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µs |
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L |
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CC |
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Large signal response time (5) |
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+) |
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TTL input (V = +1.4 V, R |
= 5.1 kΩ to V |
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trel |
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ref |
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L |
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CC |
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Output signal at 50% of final value |
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500 |
ns |
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Output signal at 95% of final value |
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1 |
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µs |
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1.At output switch point, VO ≈ 1.4 V, RS = 0 Ω with VCC+ from 5 V to 30 V, and over the full input common-mode range (0 V to VCC+ –1.5 V).
2.The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so no loading charge exists on the reference of input lines.
3.Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than –0.3 V (or 0.3 V below the negative power supply, if used).
4.The response time specified is for a 100 mV input step with 5 mV overdrive.
5.Maximum values are guaranteed by design and evaluation.
4/13 |
Doc ID 022662 Rev 1 |