ST L6392 User Manual

L6392

High-voltage high and low side driver

Features

■High voltage rail up to 600 V

■dV/dt immunity ± 50 V/nsec in full temperature range

■Driver current capability:

–290 mA source

–430 mA sink

■Switching times 75/35 nsec rise/fall with 1 nF load

■3.3 V, 5 V TTL/CMOS inputs with hysteresis

■Integrated bootstrap diode

■Operational amplifier for advanced current sensing

■Adjustable dead-time

■Interlocking function

■Compact and simplified layout

■Bill of material reduction

■Flexible, easy and fast design

	SO-14	DIP-14

Description

The L6392 is a high-voltage device manufactured with the BCD “OFF-LINE” technology. It is a single chip half-bridge gate driver for N-channel Power MOSFET or IGBT.

The high side (floating) section is designed to stand a voltage rail up to 600 V. The logic inputs are CMOS/TTL compatible down to 3.3 V for easy interfacing microcontroller/DSP

The IC embeds an operational amplifier suitable for advanced current sensing in applications such as field oriented motor control.

Applications

■Motor driver for home appliances, factory automation, industrial drives.

■HID ballasts, power supply units.

Table 1.	Device summary
	Order codes	Package	Packaging
	L6392N	DIP-14	Tube
	L6392D	SO-14	Tube
	L6392DTR	SO-14	Tape and reel

August 2010

Doc ID 14494 Rev 5

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www.st.com

Contents	L6392

Contents

1	Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 3
2	Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 4
3	Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
4	Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		6
	4.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	4.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	4.3	Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
5	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		8
	5.1	AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
	5.2	DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
6	Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		13
7	Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
8	Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		15
	8.1	CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
9	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		17
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		19

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L6392	Block diagram

1 Block diagram

Figure 1.	Block diagram
VCC	4	BOOTSTRAP DRIVER	FLOATING STRUCTURE				14	BOOT
	UV	from LVG		UV
	DETECTION			DETECTION
							HVG
						DRIVER
HIN	3		LEVEL	S			13	HVG
			SHIFTER	R
	5V	LOGIC
		SHOOT
		THROUGH					12	OUT
		PREVENTION
LIN	1
						VCC	LVG
							DRIVER	LVG
SD	2						10
GND	7
DT	5	DEAD
		TIME
					VCC
OPOUT	6			OPAMP	+		8	OP+
								OP-
					-
							9

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Pin connection	L6392

2 Pin connection

Figure 2. Pins connection (top view)
		1	14	BOOT
	LIN
		2	13
	SD			HVG
HIN		3	12	OUT
VCC		4	11	NC
	DT	5	10	LVG
OPOUT		6	9	OP-
GND		7	8	OP+

Table 2.	Pin description
Pin N#	Pin name					Type	Function
1						I	Low side driver logic input (active low)
			LIN
2				(1)		I	Shut down logic input (active low)
		SD
3		HIN				I	High side driver logic input (active high)
4		VCC				P	Lower section supply voltage
5			DT			I	Dead time setting
6	OPOUT					O	Opamp output
7		GND				P	Ground
8		OP+				I	Opamp non inverting input
9		OP-				I	Opamp inverting input
10	LVG (1)					O	Low side driver output
11			NC				Not connected
12		OUT				P	High side (floating) common voltage
13	HVG (1)					O	High side driver output
14	BOOT					P	Bootstrapped supply voltage

1.The circuit provides less than 1 V on the LVG and HVG pins (@ Isink = 10 mA), with VCC > 3 V. This allows to omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low; the gate driver assures low impedance also in SD condition.

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L6392	Truth table

3 Truth table

	Table 3.			Truth table
					Inputs					Outputs
								HIN	LVG		HVG
		SD				LIN
		L				X		X	L		L
		H				L		L	H		L
		H				L		H	L		L
		H				H		L	L		L
		H				H		H	L		H
Note:	X: don’t care

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Electrical data	L6392

4 Electrical data

4.1Absolute maximum ratings

	Table 4.	Absolute maximum rating
	Symbol	Parameter		Value			Unit
			Min		Max
	VCC	Supply voltage	- 0.3		+ 21		V
	Vout	Output voltage	Vboot -21		Vboot +0.3		V
	Vboot	Bootstrap voltage	- 0.3		620		V
	Vhvg	High side gate output voltage	Vout - 0.3		Vboot + 0.3		V
	VIvg	Low side gate output voltage	-0.3		VCC + 0.3		V
	Vop+	Opamp non-inverting input	-0.3		VCC + 0.3		V
	Vop-	Opamp inverting input	-0.3		VCC + 0.3		V
	Vi	Logic input voltage	-0.3		15		V
	dVout/dt	Allowed output slew rate			50		V/ns
	Ptot	Total power dissipation (TA = 25 °C)			800		mW
	TJ	Junction temperature			150		°C
	Tstg	Storage temperature	-50		150		°C
Note:	ESD immunity for pins 12, 13 and 14 is guaranteed up to 1 kV (Human body model)

4.2Thermal data

Table 5.	Thermal data
Symbol	Parameter	SO-14	DIP-14	Unit
Rth(JA)	Thermal resistance junction to ambient	165	100	°C/W

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