ST L6392 User Manual
High-voltage high and low side driver
Features
■ High voltage rail up to 600 V
■ dV/dt immunity ± 50 V/nsec in full temperature
range
■ Driver current capability:
– 290 mA source
– 430 mA sink
■ Switching times 75/35 nsec rise/fall with 1 nF
load
■ 3.3 V, 5 V TTL/CMOS inputs with hysteresis
■ Integrated bootstrap diode
■ Operational amplifier for advanced current
sensing
■ Adjustable dead-time
■ Interlocking function
■ Compact and simplified layout
■ Bill of material reduction
■ Flexible, easy and fast design
L6392
SO-14
Description
The L6392 is a high-voltage device manufactured
with the BCD “OFF-LINE” technology. It is a single
chip half-bridge gate driver for N-channel Power
MOSFET or IGBT.
The high side (floating) section is designed to
stand a voltage rail up to 600 V. The logic inputs
are CMOS/TTL compatible down to 3.3 V for easy
interfacing microcontroller/DSP
The IC embeds an operational amplifier suitable
for advanced current sensing in applications such
as field oriented motor control.
DIP-14
Applications
■ Motor driver for home appliances, factory
automation, industrial drives.
■ HID ballasts, power supply units.
Table 1. Device summary
Order codes Package Packaging
L6392N DIP-14 Tube
L6392D SO-14 Tube
L6392DTR SO-14 Tape and reel
August 2010 Doc ID 14494 Rev 5 1/20
www.st.com
20
Contents L6392
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7 Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.1 CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20 Doc ID 14494 Rev 5
L6392 Block diagram
1 Block diagram
Figure 1. Block diagram
HIN
LIN
GND
OPOUT
from LVG
BOOTSTRAP DRIVER
LOGIC
SHOOT
THROUGH
PREVENTION
DEAD
TIME
V
CC
4
UV
DETECTION
3
5V
1
SD
2
7
DT
5
6
FLOATING STRUCTURE
UV
DETECTION
LEVEL
SHIFTER
S
R
OPAMP
BOOT
14
HVG
DRIVER
V
CC
DRIVER
V
CC
+
-
LVG
HVG
13
OUT
12
LVG
10
OP+
8
OP-
9
Doc ID 14494 Rev 5 3/20
Pin connection L6392
T
2 Pin connection
Figure 2. Pins connection (top view)
LIN
SD
HIN
VCC
DT
OPOUT
GND
1
2
3
4
5
6
7
14
13
12
11
10
BOO
HVG
OUT
NC
LVG
9
OP-
8
OP+
Table 2. Pin description
Pin N# Pin name Type Function
1LIN
(1)
2SD
3 HIN I High side driver logic input (active high)
4 VCC P Lower section supply voltage
5 DT I Dead time setting
6 OPOUT O Opamp output
7 GND P Ground
8 OP+ I Opamp non inverting input
I Low side driver logic input (active low)
I Shut down logic input (active low)
9 OP- I Opamp inverting input
10 LVG
(1)
O Low side driver output
11 NC Not connected
12 OUT P High side (floating) common voltage
13 HVG
(1)
O High side driver output
14 BOOT P Bootstrapped supply voltage
1. The circuit provides less than 1 V on the LVG and HVG pins (@ Isink = 10 mA), with VCC > 3 V. This allows
to omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET
normally used to hold the pin low; the gate driver assures low impedance also in SD condition.
4/20 Doc ID 14494 Rev 5
L6392 Truth table
3 Truth table
Table 3. Truth table
Inputs Outputs
SD
LXXLL
HLLHL
HLHL L
HHL L L
HHHLH
Note: X: don’t care
LIN HIN LVG HVG
Doc ID 14494 Rev 5 5/20
Electrical data L6392
4 Electrical data
4.1 Absolute maximum ratings
Table 4. Absolute maximum rating
Value
Symbol Parameter
Min Max
Unit
V
V
V
V
V
V
V
dV
P
T
Supply voltage - 0.3 + 21 V
CC
Output voltage V
out
Bootstrap voltage - 0.3 620 V
boot
High side gate output voltage V
hvg
Low side gate output voltage -0.3 VCC + 0.3 V
Ivg
Opamp non-inverting input -0.3 VCC + 0.3 V
op+
Opamp inverting input -0.3 VCC + 0.3 V
op-
Logic input voltage -0.3 15 V
V
i
/dt Allowed output slew rate 50 V/ns
out
Total power dissipation (TA = 25 °C) 800 mW
tot
Junction temperature 150 °C
T
J
Storage temperature -50 150 °C
stg
-21 V
boot
- 0.3 V
out
+0.3 V
boot
+ 0.3 V
boot
Note: ESD immunity for pins 12, 13 and 14 is guaranteed up to 1 kV (Human body model)
4.2 Thermal data
Table 5. Thermal data
Symbol Parameter SO-14 DIP-14 Unit
R
th(JA)
Thermal resistance junction to ambient 165 100 °C/W
6/20 Doc ID 14494 Rev 5
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