ST L6388E User Manual

High-voltage high and low side driver

Features

■ High-voltage rail up to 600 V

■ dV/dt immunity ±50 V/nsec in full temperature

range

■ Driver current capability:

– 400 mA source
– 650 mA sink

■ Switching times 70/40 nsec rise/fall with 1nF

load

■ 3.3 V, 5 V, 15 V CMOS/TTL input comparators

with hysteresis and pull-down

■ Internal bootstrap diode

■ Outputs in phase with inputs

■ Dead time and interlocking function

L6388E

DIP-8 SO-8

Description

The L6388E is a high-voltage device,
manufactured with the BCD™ “offline” technology.

It has a driver structure that enables the driving of
independent referenced n channel Power
MOSFETs or IGBTs. The high side (floating)
section is enabled to work with voltage rail up to
600 V.

The logic inputs are CMOS/TTL compatible to
ease the interfacing with controlling devices.

Figure 1. Block diagram

BOOTSTRAP DRIVER

V

3

CC

HIN

LIN

2

1

UV

DETECTION

LOGIC

SHOOT

THROUGH

PREVENTION

UV

DETECTION

LEVEL

SHIFTER

R

R

S

LVG

DRIVER

V

CC

HVG

DRIVER

Vboot

8

H.V.

HVG

7

OUT

6

LVG

5

GND

4

Cboot

TO LOAD

February 2012 Doc ID 13991 Rev 2 1/19

www.st.com

19

Contents L6388E

Contents

1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Input logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

6 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

6.1 C

selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

BOOT

7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

9 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/19 Doc ID 13991 Rev 2

L6388E Electrical data

1 Electrical data

1.1 Absolute maximum ratings

Table 1. Absolute maximum ratings

Val ue

Symbol Parameter

Min. Max.

Unit

dV

V

out

V

V

boot

V

hvg

V

lvg

V

out

P

T

T

Output voltage V

Supply voltage - 0.3 18 V

cc

-18 V

boot

boot

Floating supply voltage - 0.3 618 V

High side gate output voltage V

-0.3 V

out

boot

Low side gate output voltage -0.3 Vcc +0.3 V

Logic input voltage -0.3 Vcc +0.3 V

i

/dtAllowed output slew rate 50 V/ns

Total power dissipation (TJ = 85 °C) 750 750 mW

tot

Junction temperature 150 150 °C

j

Storage temperature -50 150 °C

s

Note: ESD immunity for pins 6, 7, and 8 is guaranteed up to 900 V (human body model).

1.2 Thermal data

Table 2. Thermal data

Symbol Parameter SO-8 DIP-8 Unit

Thermal resistance junction to ambient 150 100 °C/W

R

th(JA)

V

V

1.3 Recommended operating conditions

Table 3. Recommended operating conditions

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

V

out

V

BS

f

sw

V

cc

T

1. If the condition V

2. VBS = V

6 Output voltage

(2)

8 Floating supply voltage

Switching frequency HVG, LVG load CL = 1 nF 400 kHz

3 Supply voltage 17 V

J

Junction temperature -45 125 °C

- V

boot

- V

out

boot

.

< 18 V is guaranteed, V

out

can range from -3 to 580 V.

out

Doc ID 13991 Rev 2 3/19

(1)

(1)

17 V

580 V

Pin connection L6388E

2 Pin connection

Figure 2. Pin connection (top view)

Table 4. Pin description

LIN

HIN

V

CC

GND

1

2

3

4 LVG

D97IN517A

V

8

7

6

5

boot

HVG

OUT

N° Pin Type Function

1 LIN I Low side driver logic input

2 HIN I High side driver logic input

3 Vcc Low-voltage power supply

4 GND Ground

5 LVG

(1)

O Low side driver output

6 OUT O High side driver floating reference

7 HVG

8 V

1. The circuit guarantees 0.3 V maximum on the pin (@ Isink = 10mA). This allows the omission of the
“bleeder” resistor connected between the gate and the source of the external MOSFET normally used to
hold the pin low.

(1)

O High side driver output

Bootstrap supply voltage

boot

4/19 Doc ID 13991 Rev 2

L6388E Electrical characteristics

3 Electrical characteristics

(VCC = 15 V; TJ = 25 °C).

3.1 AC operation

Table 5. AC operation electrical characteristics

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

t

on

1 vs. 5
2 vs. 7

t

off

t

r

t

f

High/low side driver turn-on
propagation delay

High/low side driver turn-off
propagation delay

5, 7 Rise time CL = 1000 pF 70 100 ns

5, 7 Fall time CL = 1000 pF 40 80 ns

DT 5, 7 Dead time 220 320 420 ns

3.2 DC operation

Table 6. DC operation electrical characteristics

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

Low supply voltage section

V

V

V

I

ccth1

ccth2

cchys

qccu

V

cc

Vcc UV turn-off threshold 7.9 8.3 8.8 V

Vcc UV hysteresis 0.9 V

Undervoltage quiescent

3

supply current

= 0 V 225 300 ns

V

out

V

= 0 V 160 220 ns

out

UV turn-on threshold 9.1 9.6 10.1 V

≤ 9 V 250 330 µA

V

cc

I

R

DS(on)

qcc

Quiescent current Vcc = 15 V 350 450 µA

Bootstrap driver on
resistance

(1)

Bootstrapped supply voltage section

V

V

V

I

BSth1

BSth2

BShys

Q

BS

I

LK

V

UV turn-on threshold 8.5 9.5 10.5 V

BS

VBS UV turn-off threshold 7.2 8.2 9.2 V

VBS UV hysteresis 0.9 V

8

VBS quiescent current HVG ON 250 µA

High-voltage leakage current

Doc ID 13991 Rev 2 5/19

V

≥ 12.5 V 125 Ω

cc

= V

V

V

hvg

boot

=

out

= 600 V

10 µA

Electrical characteristics L6388E

Table 6. DC operation electrical characteristics (continued)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

High/low side driver

I

so

I

si

Logic inputs

V

il

V

ih

1, 2

I

ih

I

il

1. R

where I

is tested in the following way:

DS(on)

is pin 8 current when V

1

Source short-circuit current V

5,7

= Vih (tp < 10 µs) 300 400 mA

IN

Sink short-circuit current VIN = Vil (tp < 10 µs) 500 650 mA

Low logic level input voltage 1.1 V

High logic level input voltage 1.8 V

High logic level input current VIN = 15 V 20 70 µA

Low logic level input current VIN = 0 V -1 µA

V

R

DSON

CBOOT

–()VCCV

CCVCBOOT1

----------- ------------- ------------- ------------- -------------- ------------- ------------- -------------=

I

()I2VCC,V

1VCC,VCBOOT1

= V

CBOOT1

, I2 when V

CBOOT

()–

= V

–()–

CBOOT2

CBOOT2

CBOOT2

.

6/19 Doc ID 13991 Rev 2

L6388E Waveform definitions

4 Waveform definitions

Figure 3. Dead time waveform definition

LIN

HIN

DT DT

LVG

DT

Interlocking function

HVG

Figure 4. Propagation delay waveform definition

Doc ID 13991 Rev 2 7/19

Input logic L6388E

5 Input logic

Input logic is provided with an interlocking circuitry which avoids the two outputs (LVG, HVG)
being active at the same time when both the logic input pins (LIN, HIN) are at a high logic
level. In addition, to prevent cross conduction of the external MOSFETs, after each output is
turned off, the other output cannot be turned on before a certain amount of time (DT) (see

Figure 3).

6 Bootstrap driver

A bootstrap circuitry is needed to supply the high-voltage section. This function is normally
accomplished by a high-voltage fast recovery diode (Figure 5 a). In the L6388E, a patented
integrated structure replaces the external diode. It is realized by a high-voltage DMOS,
driven synchronously with the low side driver (LVG), with a diode in series, as shown in

Figure 5 b. An internal charge pump (Figure 5 b) provides the DMOS driving voltage. The

diode connected in series to the DMOS has been added to avoid an undesirable turn-on.

6.1 C

To choose the proper C
capacitor. This capacitor C

The ratio between the capacitors C
It must be:

E.g.: if Q
300 mV.

If HVG must be supplied for a long period, the C
losses into account.

E.g.: HVG steady-state consumption is lower than 250 µA, so, if HVG T
must supply 1.25 µC to C

1.25 V.

The internal bootstrap driver offers important advantages: the external fast recovery diode
can be avoided (it usually has a high leakage current).

This structure can work only if V
LVG is on. The charging time (T
fulfilled and it must be long enough to charge the capacitor.

BOOT

selection and charging

value, the external MOSFET can be seen as an equivalent

BOOT

is related to the MOSFET total gate charge:

EXT

C

EXT

and C

EXT

C

BOOT

is 30 nC and V

gate

is 10 V, C

gate

. This charge on a 1 µF capacitor means a voltage drop of

EXT

OUT

charge

EXT

is close to GND (or lower) and, at the same time, the

) of the C

Q

gate

------------ -- -=

V

gate

is proportional to the cyclical voltage loss.

BOOT

>>>C

EXT

is 3 nF. With C

selection must also take the leakage

BOOT

is the time in which both conditions are

BOOT

= 100 nF the drop would be

BOOT

is 5 ms, C

ON

BOOT

The bootstrap driver introduces a voltage drop due to the DMOS R
125 Ω). This drop can be neglected at low switching frequency, but it should be taken into
account when operating at high switching frequency.

8/19 Doc ID 13991 Rev 2

(typical value:

DS(on

)

L6388E Bootstrap driver

The following equation is useful to compute the drop on the bootstrap DMOS:

Q

gate

V

==

dropIch eargRdsonVdrop

→

-------------------

T

ch earg

R

dson

where Q

is the gate charge of the external Power MOSFET, R

gate

of the bootstrap DMOS, and T

is the charging time of the bootstrap capacitor.

charge

is the on-resistance

DS(on

)

For example: using a Power MOSFET with a total gate charge of 30 nC, the drop on the
bootstrap DMOS is about 1 V, if the T

charge

is 5 µs.

In fact:

30nC

drop

------------ -- -

5µs

125Ω 0.8V∼⋅=

is calculated: if this drop

BOOT

V

V

should be taken into account when the voltage drop on C

drop

is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.

Doc ID 13991 Rev 2 9/19

Bootstrap driver L6388E

Figure 5. Bootstrap driver

D

BOOT

V

S

V

BOOT

H.V.

HVG

V

OUT

C

BOOT

TO LOAD

LVG

a

V

V

BOOT

OUT

H.V.

C

BOOT

TO LOAD

V

S

HVG

LVG

b

10/19 Doc ID 13991 Rev 2

L6388E Typical characteristics

)

)

)

7 Typical characteristics

Figure 6. Typical rise and fall times vs.

time

(nsec)

250

200

150

100

50

0

Figure 8. V

13

12

11

10

(V)

BSth1

V

load capacitance

D99IN1054

T

r

T

f

012345C (nF)

For both high and low side buffers @25˚C Tamb

UV turn-on threshold

BOOT

vs. temperature

@ Vcc = 15V

Typ.

9

8

7

6

5

-45 -25 0 25 50 75 100 125
Tj (˚C

Figure 7. Quiescent current vs. supply

voltage

Iq

(µA)

10

10

10

10

4

3

2

246810121416V

0

D99IN1055

(V)

S

Figure 9. VCC UV turn-off threshold vs.

temperature

11

10

9

Typ.

8

Vccth2(V)

7

6

-45 -25 0 25 50 75 100 125

Tj (˚C

Figure 10. V

14

13

12

11

(V)

10

9

BSth2

V

8

Typ.

7

6

-45 -25 0 25 50 75 100 125

UV turn-off threshold

BOOT

vs. temperature

@ Vcc = 15V

Doc ID 13991 Rev 2 11/19

Figure 11. Output source current vs.

temperature

1000

@ Vcc = 15V

800

600

Typ.

400

current (mA)

200

0

-45-250 255075100125
Tj (˚C

Typical characteristics L6388E

)

)

Figure 12. VCC UV turn-on threshold vs.

13

12

11

10

Vccth1(V)

temperature

Typ.

9

8

7

-45 -25 0 25 50 75 100 125
Tj (˚C

Figure 13. Output sink current vs.

temperature

1000

800

600

Typ.

400

current (mA)

200

0

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (˚C

12/19 Doc ID 13991 Rev 2

L6388E Package mechanical data

8 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

®

ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

Table 7. DIP-8 mechanical data

mm inch

Dim.

Min. Typ. Max. Min. Typ. Max.

A 3.32 0.131

a1 0.51 0.020

B 1.15 1.65 0.045 0.065

b 0.356 0.55 0.014 0.022

b1 0.204 0.304 0.008 0.012

D 10.92 0.430

E 7.95 9.75 0.313 0.384

e 2.54 0.100

e3 7.62 0.300

e4 7.62 0.300

F 6.6 0.260

I 5.08 0.200

L 3.18 3.81 0.125 0.150

Z 1.52 0.060

Doc ID 13991 Rev 2 13/19

Package mechanical data L6388E

Figure 14. DIP-8 package dimensions

!-V

14/19 Doc ID 13991 Rev 2

L6388E Package mechanical data

Table 8. SO-8 mechanical data

mm

Dim.

Min. Typ. Max.

A 1.75

A1 0.10 0.25

A2 1.25

b 0.28 0.48

c 0.17 0.23

D 4.80 4.90 5.00

E 5.80 6.00 6.20

E1 3.80 3.90 4.00

e1.27

h 0.25 0.50

L 0.40 1.27

L1 1.04

k0° 8°

ccc 0.10

Doc ID 13991 Rev 2 15/19

Package mechanical data L6388E

Figure 15. SO-8 package dimensions

!-V

16/19 Doc ID 13991 Rev 2

L6388E Order codes

9 Order codes

Table 9. Order codes

Part number Package Packaging

L6388E DIP-8 Tube

L6388ED SO-8 Tube

L6388ED013TR SO-8 Tape and reel

Doc ID 13991 Rev 2 17/19

Revision history L6388E

10 Revision history

Table 10. Document revision history

Date Revision Changes

11-Oct-2007 1 First release

Updated Ta bl e 1 , Ta bl e 6 and Section 6.1.

29-Feb-2012 2

DIP-8 mechanical data and package dimensions have been updated.
SO-8 mechanical data and package dimensions have been updated.

18/19 Doc ID 13991 Rev 2

L6388E

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Doc ID 13991 Rev 2 19/19