ST L6388 User Manual

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L6388
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
1 FEATURES
HIGH VOLTAGE RAIL UP TO 600 V
dV/dt IMMUNITY ± 50 V/nsec IN FULL
TEMPERATURE RANGE
DRIVER CURRENT CAPABILITY:400 mA
SWITCHING TIMES 70/40 nsec RISE/FALL
WITH 1nF LOAD
3.3V, 5V, 15V CMOS/TTL INPUTS
COMPARATORS WITH HYSTERESYS AND PULL DOWN
INTERNAL BOOTSTRAP DIODE
OUTPUTS IN PHASE WITH INPUTS
DEAD TIME AND INTERLOCKING FUNCTION
2 DESCRIPTION
The L6388 is an high-voltage device, manufac­tured with the BCD"OFF-LINE" technology.
Figure 2. Block Diagram
gure 1. Package
SO8
DIP8
Table 1. Order Codes
Part Number Package
L6388 DIP8
L6388D SO8
L6388D013TR SO8 in Tape & Reel
It has a Driver structure that enables to drive inde­pendent referenced N Channel Power MOS or IG­BT. The Upper (Floating) Section is enabled to work with voltage Rail up to 600V.
The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.
May 2005
V
CC
HIN
LIN
3
2
1
UV
DETECTION
BOOTSTRAP DRIVER
DETECTION
LOGIC
SHOOT
THROUGH
PREVENTION
UV
LEVEL
SHIFTER
R
R
S
LVG
DRIVER
V
CC
HVG
DRIVER
Vboot
8
H.V.
HVG
7
OUT
6
LVG
5
GND
4
Cboot
TO LOAD
Rev. 2
1/11
L6388
Table 2. Absolute Maximum Rating
Symbol Parameter Value Unit
V
out
V
cc
V
boot
V
hvg
V
lvg
V
dV
out
P
tot
T
T
stg
Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900V (Human Body Model)
Output Voltage -3 to V
Supply Voltage - 0.3 to +18 V
Floating Supply Voltage - 1 to 618 V
High Side Gate Output Voltage - 1 to V
Low Side Gate Output Voltage -0.3 to Vcc +0.3 V
Logic Input Voltage -0.3 to Vcc +0.3 V
i
/dt Allowed Output Slew Rate 50 V/ns
Total Power Dissipation (Tj = 85°C) 750 mW
Junction Temperature 150 °C
j
Storage Temperature -50 to 150 °C
Figure 3. Pin Connection (Top view)
- 18 V
boot
boot
V
LIN
HIN
V
CC
GND
1
2
3
4 LVG
D97IN517A
8
7
6
5
V
boot
HVG
OUT
Table 3. Pin Description
N. Name Type Function
1 LIN I Low Side Driver Logic Input
2 HIN I High Side Driver Logic Input
3 Vcc I Low Voltage Power Supply
4 GND Ground
5 LVG (*) O Low Side Driver Output
6 OUT O High Side Driver Floating Reference
7 HVG (*) O High Side Driver Output
8 Vboot Bootstrap Supply Voltage
(*) The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA). This allows to omit the "bleeder" resistor connected between the gate
and the source of the external MOSFET normally used to hold the pin low.
Table 4. Thermal Data
Symbol Parameter SO8 Minidip Unit
R
2/11
th j-amb
Thermal Resistance Junction to Ambient 150 100 °C/W
L6388
Table 5. Recommended Operating Conditions
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
V
out
V
BS
f
sw
V
cc
T
j
Note 1: If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V
(*): VBS = Vboot - Vout
6 Output Voltage Note 1 580 V
(*) 8 Floating Supply Voltage Note 1 17 V
Switching Frequency HVG,LVG load CL = 1nF 400 kHz
3 Supply Voltage 17 V
Junction Temperature -45 125 °C
Table 6.
(V
cc
Electrical Characteristics
= 15V; Tj = 25°C)
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
AC OPERATION
t
t
DT 7,5 Dead Time 220 320 420 ns
1 vs 5
on
off
High/Low Side Driver Turn-On
2 vs 7
Propagation Delay
High/Low Side Driver Turn-Off
V
= 0V 225 300 ns
out
V
= 0V 160 220 ns
out
Propagation Delay
t
t
7,5 Rise Time CL = 1000pF 70 100 ns
r
7,5 Fall Time CL = 1000pF 40 80 ns
f
DC OPERATION
Low Supply Voltage Section
V
ccth1
V
ccth2
V
cchys
I
qccu
I
qcc
R
dson
Bootstrapped Supply Voltage Section
V
BSth1
V
BSth2
V
BShys
IQ
BS
ILK High Voltage Leakage Current V
High/Low Side Driver
I
so
I
si
3Vcc UV Turn On Threshold 9.1 9.6 10.1 V
Vcc UV Turn Off Threshold 7.9 8.3 8.8 V
Vcc UV Hysteresis 0.9 V
Undervoltage Quiescent Supply
Vcc 9V 250 330 µA
Current
Quiescent Current Vcc = 15V 350 450 µA
Bootstrap Driver on Resistance
V
cc
125
(**)
8VBS UV Turn On Threshold 8.5 9.5 10.5 V
VBS UV Turn Off Threshold 7.2 8.2 9.2 V
VBS UV Hysteresis 0.9 V
VBS Quiescent Current HVG ON 250 µA
= V
hvg
out
= V
= 600V 10 µA
boot
5,7 Source Short Circuit Current VIN = Vih (tp < 10µs) 300 400 mA
Sink Short Circuit Current VIN = Vil (tp < 10µs) 500 650 mA
3/11
L6388
Table 6.
Electrical Characteristics (continued)
(Vcc = 15V; Tj = 25°C)
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
Logic Inputs
V
V
I
ih
I
(**) RDSON is tested in the following way:
where I1 is pin 8 current when V
1, 2 Low Level Logic Input Voltage 1.1 V
il
ih
High Level Logic Input Voltage 1.8 V
High Level Logic Input Current VIN = 15V 20 70 µA
il
Low Level Logic Input Current VIN = 0V -1 µA
VCCV
CBOOT
= V
R
DSON
CBOOT1
--------------------------------------------------------------------------------------------------------------=
I
1VCCVCCBOOT1
, I2 when V
CBOOT
()VCCV
CBOOT1
,()I2– VCCV
= V
CBOOT2
()
CBOOT2
,()
CCBOOT2
.
Figure 4. Dead Time Waveforms Definitions
LIN
HIN
DT DT
LVG
HVG
Figure 5. Propagation Delay Waveform Definitions
LIN
LIN
50%
50%50%
> DT
HIN
HIN
LVG
LVG
HVG
HVG
> DT
50% 50%
50% 50%50%
ton
ton
10%
10%
toff
toff
DT
> DT
> DT
90%
90%
50% 50%
50% 50%50%
ton
ton
10%
10%
Interlocking function
90%
90%
toff
toff
4/11
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