L6386E
High-voltage high and low side driver
Features
■High voltage rail up to 600 V
■dV/dt immunity ±50 V/nsec in full temperature range
■Driver current capability:
–400 mA source,
–650 mA sink
■Switching times 50/30 nsec rise/fall with 1 nF load
■CMOS/TTL Schmitt trigger inputs with hysteresis and pull down
■Under-voltage lock out on lower and upper driving section
■Integrated bootstrap diode
■Outputs in phase with inputs
DIP-14 |
SO-14 |
Description
The L6386E is an high-voltage device, manufactured with the BCD “off-line” technology. It has a driver structure that enables to drive independent referenced channel power MOS or IGBT. The high-side (floating) section is enabled to work with voltage rail up to 600 V. The logic inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.
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BOOTSTRAP DRIVER |
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Vboot |
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14 |
CBOOT |
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VCC |
UV |
UV |
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HVG |
H.V. |
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4 |
DETECTION |
DETECTION |
R |
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DRIVER |
HVG |
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R |
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13 |
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3 |
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S |
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LEVEL |
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OUT |
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HIN |
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SHIFTER |
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12 |
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TO LOAD |
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LOGIC |
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VCC |
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2 |
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LVG |
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SD |
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9 |
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LVG |
PGND |
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DRIVER |
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1 |
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8 |
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LIN |
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DIAG |
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VREF |
- |
5 |
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SGND |
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+ |
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7 |
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6 |
CIN |
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D97IN520D |
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July 2009 |
Doc ID 13989 Rev 2 |
1/18 |
www.st.com
Contents |
L6386E |
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Contents
1 |
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 3 |
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1.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
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1.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
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1.3 |
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
2 |
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
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3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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3.1 |
AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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3.2 |
DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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3.3 |
Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
4 |
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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4.1 |
CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
5 |
Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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6 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
13 |
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7 |
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
16 |
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8 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
2/18 |
Doc ID 13989 Rev 2 |
L6386E |
Electrical data |
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1.1Absolute maximum ratings
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Table 1. |
Absolute maximum ratings |
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Symbol |
Parameter |
Value |
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Unit |
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Vout |
Output voltage |
-3 to Vboot - 18 |
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V |
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Vcc |
Supply voltage |
- 0.3 to +18 |
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V |
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Vboot |
Floating supply voltage |
-1 to 618 |
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V |
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Vhvg |
High side gate output voltage |
- 1 to Vboot |
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V |
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Vlvg |
Low side gate output voltage |
-0.3 to Vcc +0.3 |
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V |
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Vi |
Logic input voltage |
-0.3 to Vcc +0.3 |
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V |
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Vdiag |
Open drain forced voltage |
-0.3 to Vcc +0.3 |
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V |
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Vcin |
Comparator input voltage |
-0.3 to Vcc +0.3 |
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V |
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dVout/dt |
Allowed output slew rate |
50 |
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V/ns |
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Ptot |
Total power dissipation (TJ = 85 °C) |
750 |
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mW |
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Tj |
Junction temperature |
150 |
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°C |
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Tstg |
Storage temperature |
-50 to 150 |
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°C |
Note: |
ESD immunity for pins 12, 13 and 14 is guaranteed up to 900 V (human body model) |
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1.2Thermal data
Table 2. |
Thermal data |
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Symbol |
Parameter |
SO-14 |
DIP-14 |
Unit |
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Rth(JA) |
Thermal resistance junction to ambient |
165 |
100 |
°C/W |
1.3Recommended operating conditions
Table 3. |
Recommended operating conditions |
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Symbol |
Pin |
Parameter |
Test condition |
Min |
Typ |
Max |
Unit |
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Vout |
12 |
Output voltage |
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(1) |
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580 |
V |
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(2) |
14 |
Floating supply voltage |
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(1) |
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17 |
V |
VBS |
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fsw |
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Switching frequency |
HVG,LVG load CL = 1 nF |
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400 |
kHz |
Vcc |
4 |
Supply voltage |
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17 |
V |
TJ |
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Junction temperature |
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-45 |
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125 |
°C |
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1.If the condition Vboot - Vout < 18 V is guaranteed, Vout can range from -3 to 580 V
2.VBS = Vboot - Vout
Doc ID 13989 Rev 2 |
3/18 |
Pin connection |
L6386E |
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LIN |
1 |
14 |
Vboot |
SD |
2 |
13 |
HVG |
HIN |
3 |
12 |
OUT |
VCC |
4 |
11 |
N.C. |
DIAG |
5 |
10 |
N.C. |
CIN |
6 |
9 |
LVG |
SGND |
7 |
8 |
PGND |
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D97IN521A |
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Table 4. |
Pin description |
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N° |
Pin |
Type |
Function |
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1 |
LIN |
I |
Low side driver logic input |
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2 |
SD(1) |
I |
Shut down logic input |
3 |
HIN |
I |
High side driver logic input |
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4 |
VCC |
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Low voltage supply |
5 |
DIAG |
O |
Open drain diagnostic output |
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6 |
CIN |
I |
Comparator input |
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7 |
SGND |
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Ground |
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8 |
PGND |
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Power ground |
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9 |
LVG (1) |
O |
Low side driver output |
10, 11 |
N.C. |
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Not connected |
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12 |
OUT |
O |
High side driver floating driver |
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13 |
HVG (1) |
O |
High side driver output |
14 |
Vboot |
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Bootstrapped supply voltage |
1.The circuit guarantees 0.3 V maximum on the pin (@ Isink = 10 mA), with VCC > 3 V. This allows to omit the “bleeder” resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low; the gate driver assures low impedance also in SD condition.
4/18 |
Doc ID 13989 Rev 2 |
L6386E |
Electrical characteristics |
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VCC = 15 V; TJ = 25 °C
‘s |
AC operation electrical characteristics |
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Table 5. |
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Symbol |
Pin |
Parameter |
Test condition |
Min |
Typ |
Max |
Unit |
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ton |
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High/low side driver turn-on |
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110 |
150 |
ns |
1,3 vs |
propagation delay |
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toff |
9,13 |
High/low side driver turn-off |
Vout = 0 V |
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110 |
150 |
ns |
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propagation delay |
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tsd |
2 vs |
Shut down to high/low side |
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105 |
150 |
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9,13 |
propagation delay |
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tr |
9, 13 |
Rise time |
CL = 1000 pF |
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50 |
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ns |
tf |
Fall time |
CL = 1000 pF |
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30 |
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ns |
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VCC = 15 V; TJ = 25 °C |
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Table 6. |
DC operation electrical characteristics |
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Symbol |
Pin |
Parameter |
Test condition |
Min |
Typ |
Max |
Unit |
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Low supply voltage section |
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Vcc |
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Supply voltage |
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17 |
V |
Vccth1 |
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Vcc UV turn on threshold |
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11.5 |
12 |
12.5 |
V |
Vccth2 |
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Vcc UV turn off threshold |
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9.5 |
10 |
10.5 |
V |
Vcchys |
4 |
Vcc UV hysteresis |
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2 |
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V |
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Iqccu |
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Undervoltage quiescent |
Vcc ≤ 11 V |
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200 |
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μA |
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supply current |
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Iqcc |
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Quiescent current |
Vcc = 15 V |
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250 |
320 |
μA |
Bootstrapped supply section |
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Vboot |
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Bootstrap supply voltage |
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17 |
V |
Vbth1 |
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Vboot UV turn on threshold |
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10.7 |
11.9 |
12.9 |
V |
Vbth2 |
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Vboot UV turn off threshold |
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8.8 |
9.9 |
10.7 |
V |
Vbhys |
14 |
Vboot UV hysteresis |
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2 |
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V |
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Iqboot |
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Vboot quiescent current |
HVG ON |
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200 |
μA |
I |
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High voltage leakage current |
Vhvg = Vout = Vboot |
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10 |
μA |
lk |
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= 600 V |
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Rdson |
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Bootstrap driver on |
Vcc ≥12.5 V; Vin = 0 V |
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125 |
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Ω |
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resistance (1) |
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Doc ID 13989 Rev 2 |
5/18 |
Electrical characteristics |
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L6386E |
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Table 6. |
DC operation electrical characteristics (continued) |
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Symbol |
Pin |
Parameter |
Test condition |
Min |
Typ |
Max |
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Unit |
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Driving buffers section |
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Iso |
9, |
High/low side source short |
VIN = Vih (tp < 10 μs) |
300 |
400 |
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mA |
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13 |
circuit current |
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Isi |
9, |
High/low side sink short |
VIN = Vil (tp < 10 μs) |
500 |
650 |
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mA |
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13 |
circuit current |
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Logic inputs |
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Vil |
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Low level logic threshold |
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1.5 |
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V |
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voltage |
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Vih |
1,2, |
High level logic threshold |
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3.6 |
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V |
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3 |
voltage |
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Iih |
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High level logic input current |
VIN = 15 V |
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50 |
70 |
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μA |
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Iil |
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Low level logic input current |
VIN = 0 V |
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1 |
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μA |
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Sense comparator |
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Vio |
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Input offset voltage |
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-10 |
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10 |
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mV |
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Iio |
6 |
Input bias current |
Vcin ≥ 0.5 |
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0.2 |
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μA |
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Vol |
2 |
Open drain low level output |
Iod = -2.5 mA |
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0.8 |
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V |
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voltage |
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Vref |
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Comparator reference |
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0.46 |
0.5 |
0.54 |
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V |
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voltage |
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1. RDS(on) is tested in the following way:
RDSON |
(VCC – VCBOOT1) – (VCC – VCBOOT2 ) |
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= ---------- |
(V-----------------CC,VCBOOT1----------------------------------) – I2 |
(-----------------VCC,V-----------------CBOOT2-------) |
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I1 |
where I1 is pin 14 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2
6/18 |
Doc ID 13989 Rev 2 |