ST L6386E User Manual

High-voltage high and low side driver

Features

■ High voltage rail up to 600 V

■ dV/dt immunity ±50 V/nsec in full temperature

range

■ Driver current capability:

– 400 mA source,
– 650 mA sink

■ Switching times 50/30 nsec rise/fall with 1 nF

load

■ CMOS/TTL Schmitt trigger inputs with

hysteresis and pull down

■ Under-voltage lock out on lower and upper

driving section

■ Integrated bootstrap diode

■ Outputs in phase with inputs

L6386E

DIP-14 SO-14

Description

The L6386E is an high-voltage device,
manufactured with the BCD “off-line” technology.
It has a driver structure that enables to drive
independent referenced channel power MOS or
IGBT. The high-side (floating) section is enabled
to work with voltage rail up to 600 V. The logic
inputs are CMOS/TTL compatible for ease of
interfacing with controlling devices.

Figure 1. Block diagram

V

HIN

SD

LIN

SGND

BOOTSTRAP DRIVER

CC

4

3

2

1

7 6

UV

DETECTION

LOGIC

UV

DETECTION

LEVEL

SHIFTER

VREF

R

R

S

LVG

DRIVER

-

+

DRIVER

V

CC

D97IN520D

HVG

Vboot

14

H.V.

HVG

13

OUT

12

LVG

9

PGND

8

DIAG

5

CIN

C

BOOT

TO LOAD

July 2009 Doc ID 13989 Rev 2 1/18

www.st.com

18

Contents L6386E

Contents

1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.1 CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2/18 Doc ID 13989 Rev 2

L6386E Electrical data

1 Electrical data

1.1 Absolute maximum ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

V

V

V

V

V

dV

P

T

Output voltage -3 to V

out

Supply voltage - 0.3 to +18 V

cc

Floating supply voltage -1 to 618 V

boot

High side gate output voltage - 1 to V

hvg

Low side gate output voltage -0.3 to Vcc +0.3 V

lvg

Logic input voltage -0.3 to Vcc +0.3 V

V

i

Open drain forced voltage -0.3 to Vcc +0.3 V

diag

Comparator input voltage -0.3 to Vcc +0.3 V

cin

/dt Allowed output slew rate 50 V/ns

out

Total power dissipation (TJ = 85 °C) 750 mW

tot

Junction temperature 150 °C

T

j

Storage temperature -50 to 150 °C

stg

- 18 V

boot

V

boot

Note: ESD immunity for pins 12, 13 and 14 is guaranteed up to 900 V (human body model)

1.2 Thermal data

Table 2. Thermal data

Symbol Parameter SO-14 DIP-14 Unit

R

Thermal resistance junction to ambient 165 100 °C/W

th(JA)

1.3 Recommended operating conditions

Table 3. Recommended operating conditions

Symbol Pin Parameter Test condition Min Typ Max Unit

V

V

BS

f

sw

V

T

1. If the condition Vboot - Vout < 18 V is guaranteed, Vout can range from -3 to 580 V

2. VBS = V

12 Output voltage

out

(2)

14 Floating supply voltage

Switching frequency HVG,LVG load CL = 1 nF 400 kHz

cc

4 Supply voltage 17 V

J

Junction temperature -45 125 °C

- V

boot

out

Doc ID 13989 Rev 2 3/18

(1)

(1)

17 V

580 V

Pin connection L6386E

2 Pin connection

Figure 2. Pin connection (Top view)

1

2

3

4

5

6

7 PGND

D97IN521A

14

13

12

11

10

9

8

Table 4. Pin description

LIN

SD

HIN

V

CC

DIAG

CIN

SGND

N° Pin Type Function

1 LIN I Low side driver logic input

2 SD

(1)

I Shut down logic input

3 HIN I High side driver logic input

4 VCC Low voltage supply

5 DIAG O Open drain diagnostic output

6 CIN I Comparator input

7 SGND Ground

8 PGND Power ground

(1)

9 LVG

O Low side driver output

10, 11 N.C. Not connected

V

boot

HVG

OUT

N.C.

N.C.

LVG

12 OUT O High side driver floating driver

(1)

13 HVG

14 V

1. The circuit guarantees 0.3 V maximum on the pin (@ Isink = 10 mA), with VCC > 3 V. This allows to omit
the “bleeder” resistor connected between the gate and the source of the external MOSFET normally used
to hold the pin low; the gate driver assures low impedance also in SD condition.

O High side driver output

Bootstrapped supply voltage

boot

4/18 Doc ID 13989 Rev 2

L6386E Electrical characteristics

3 Electrical characteristics

3.1 AC operation

VCC = 15 V; TJ = 25 °C

‘s

Table 5. AC operation electrical characteristics

Symbol Pin Parameter Test condition Min Typ Max Unit

t

on

1,3 vs

t

off

t

sd

t

r

t

f

High/low side driver turn-on
propagation delay

9,13

High/low side driver turn-off
propagation delay

2 vs

Shut down to high/low side

9,13

propagation delay

Rise time C

9, 13

Fall time CL = 1000 pF 30 ns

3.2 DC operation

VCC = 15 V; TJ = 25 °C

Table 6. DC operation electrical characteristics

Symbol Pin Parameter Test condition Min Typ Max Unit

Low supply voltage section

V

cc

V

ccth1

V

ccth2

V

cchys

I

qccu

I

qcc

Bootstrapped supply section

Supply voltage 17 V

Vcc UV turn on threshold 11.5 12 12.5 V

Vcc UV turn off threshold 9.5 10 10.5 V

4

Vcc UV hysteresis 2 V

Undervoltage quiescent
supply current

Quiescent current Vcc = 15 V 250 320 μA

110 150 ns

V

out

= 0 V

110 150 ns

105 150

= 1000 pF 50 ns

L

≤ 11 V 200 μA

V

cc

V

boot

V

V

bth1

V

V

bth2

V

I

qboot

R

bhys

I

dson

14

V

lk

Bootstrap supply voltage 17 V

UV turn on threshold 10.7 11.9 12.9 V

boot

UV turn off threshold 8.8 9.9 10.7 V

boot

UV hysteresis 2 V

boot

V

quiescent current HVG ON 200 μA

boot

High voltage leakage current

Bootstrap driver on
resistance

(1)

Vhvg = Vout = Vboot
= 600 V

10 μA

Vcc ≥12.5 V; Vin = 0 V 125 Ω

Doc ID 13989 Rev 2 5/18

Electrical characteristics L6386E

Table 6. DC operation electrical characteristics (continued)

Symbol Pin Parameter Test condition Min Typ Max Unit

Driving buffers section

I

so

I

si

9, 13High/low side source short

9, 13High/low side sink short

Logic inputs

Vil

V

1,2,

ih

3

I

ih

I

il

Sense comparator

V

io

I

V

V

1. R

where I

io

ref

DS(on)

6 Input bias current V

2

ol

is tested in the following way:

is pin 14 current when V

1

= Vih (tp < 10 μs) 300 400 mA

V

circuit current

circuit current

Low level logic threshold
voltage

High level logic threshold
voltage

IN

VIN = Vil (tp < 10 μs) 500 650 mA

1.5 V

3.6 V

High level logic input current VIN = 15 V 50 70 μA

Low level logic input current VIN = 0 V 1 μA

Input offset voltage -10 10 mV

≥ 0.5 0.2 μA

cin

Open drain low level output
voltage

Comparator reference
voltage

V

–()VCCV

CCVCBOOT1

CBOOT

------------------------------------------------------------------------------------------------------ -=

I

()I2VCC,V

1VCC,VCBOOT1

= V

CBOOT1

R

DSON

Iod = -2.5 mA 0.8 V

0.46 0.5 0.54 V

–()–

CBOOT2

, I2 when V

()–

CBOOT

= V

CBOOT2

CBOOT2

6/18 Doc ID 13989 Rev 2

L6386E Electrical characteristics

3.3 Timing diagram

Figure 3. Input/output timing diagram

HIN

LIN

SD

HOUT
LOUT

V

REF

V

CIN

DIAG

Note: SD active condition is latched until next negative IN edge.

D97IN522A

Doc ID 13989 Rev 2 7/18

Bootstrap driver L6386E

4 Bootstrap driver

A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6386E a patented
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low side driver (LVG), with in series a diode, as shown in

Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The

diode connected in series to the DMOS has been added to avoid undesirable turn on of it.

4.1 C

To choose the proper C
capacitor. This capacitor C

The ratio between the capacitors C
It has to be:

e.g.: if Q
300 mV.

If HVG has to be supplied for a long time, the C
the leakage losses.

e.g.: HVG steady state consumption is lower than 200 μA, so if HVG T
to supply 1 μC to C

The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has great leakage current).

This structure can work only if V
LVG is on. The charging time (T
fulfilled and it has to be long enough to charge the capacitor.

BOOT

selection and charging

value the external MOS can be seen as an equivalent

BOOT

is related to the MOS total gate charge:

EXT

C

EXT

and C

EXT

C

is 30 nC and V

gate

. This charge on a 1 μF capacitor means a voltage drop of 1 V.

EXT

is 10 V, C

gate

EXT

is close to GND (or lower) and in the meanwhile the

OUT

) of the C

charge

Q

gate

-------------- -=

V

gate

is proportional to the cyclical voltage loss.

BOOT

>>>C

BOOT

EXT

is 3 nF. With C

BOOT

is the time in which both conditions are

BOOT

= 100 nF the drop would be

BOOT

selection has to take into account also

is 5 ms, C

ON

BOOT

has

The bootstrap driver introduces a voltage drop due to the DMOS R
Ω). At low frequency this drop can be neglected. Anyway increasing the frequency it must be
taken in to account.

The following equation is useful to compute the drop on the bootstrap DMOS:

==

V

dropIch eargRdsonVdrop

where Q
bootstrap DMOS, and T

8/18 Doc ID 13989 Rev 2

is the gate charge of the external power MOS, R

gate

is the charging time of the bootstrap capacitor.

charge

→

Q

gate

-------------------

T

ch earg

(typical value: 125

DSon

R

dson

is the on resistance of the

DSon

L6386E Bootstrap driver

For example: using a power MOS with a total gate charge of 30 nC the drop on the
bootstrap DMOS is about 1 V, if the T

V

drop

V

has to be taken into account when the voltage drop on C

drop

is 5 μs. In fact:

charge

30nC

-------------- -

5μ s

125Ω 0.8V∼⋅=

is calculated: if this drop

BOOT

is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.

Figure 4. Bootstrap driver

D

BOOT

V

S

HVG

LVG

ab

V

BOOT

H.V.

C

BOOT

V

OUT

TO LOAD

V

S

HVG

LVG

V

BOOT

H.V.

C

BOOT

V

OUT

TO LOAD

D99IN1056

Doc ID 13989 Rev 2 9/18

Typical characteristic L6386E

5 Typical characteristic

Figure 5. Typical rise and fall times vs

time

(nsec)

250

200

150

100

50

0

load capacitance

D99IN1054

Tr

Tf

0 1 2 3 4 5 C (nF)

For both high and low side buffers @25˚C Tamb

Figure 6. Quiescent current vs supply

Iq

(μA)

4

10

3

10

2

10

10

246810121416V

0

Figure 7. Turn on time vs temperature Figure 8. V

250

200

150

Typ.

100

Ton (ns)

50

0

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (°C)

15

14

13

Typ.

12

11

Vbth1 (V)

10

9

8

7

-45 -25 0 25 50 75 100 125

voltage

UV turn on threshold

BOOT

vs temperature

@ Vcc = 15V

Tj (°C)

D99IN1057

(V)

S

Figure 9. Turn Off time vs temperature Figure 10. V

250

200

150

Typ.

100

Toff (ns)

50

0

-45 -25 0 25 50 75 100 125

10/18 Doc ID 13989 Rev 2

@ Vcc = 15V

Tj (°C)

UV turn off threshold

BOOT

vs temperature

15

14

13

12

11

Vbth2 (V)

Typ.

10

9

8

7

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (°C)

L6386E Typical characteristic

Figure 11. Shutdown time vs

250

200

150

tsd (ns0

100

temperature

@ Vcc = 15V

Typ.

50

0

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 13. VCC UV turn on threshold vs

15

14

13

12

Vccth1(V)

11

10

temperature

Typ.

Figure 12. V

3

UV hysteresis

BOOT

@ Vcc = 15V

2.5

Typ.

2

Vbhys (V)

1.5

1

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 14. Output source current vs

temperature

1000

800

600

Typ.

current (mA)

400

200

@ Vcc = 15V

9

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 15. VCC UV turn off threshold vs

12

11

10

Vccth2(V)

temperature

Typ.

9

8

7

-45 -25 0 25 50 75 100 125

Tj (°C)

0

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 16. Output sink current vs

temperature

1000

800

Typ.

600

400

current (mA)

200

0

-45-250 255075100125

@ Vcc = 15V

Tj (°C)

Doc ID 13989 Rev 2 11/18

Typical characteristic L6386E

Figure 17. VCC UV hysteresis vs

2.5

Vcchys (V)

1.5

temperature

3

Typ.

2

1

-45 -25 0 25 50 75 100 125
Tj (°C)

12/18 Doc ID 13989 Rev 2

L6386E Package mechanical data

6 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

is an ST trademark.

Doc ID 13989 Rev 2 13/18

Package mechanical data L6386E

Figure 18. DIP14 mechanical data and package dimensions

DIM.

a1 0.51 0.020

B 1.39 1.65 0.055 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787

E 8.5 0.335

e 2.54 0.100

e3 15.24 0.600

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 2.54 0.050 0.100

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

OUTLINE AND

MECHANICAL DATA

DIP14

14/18 Doc ID 13989 Rev 2

L6386E Package mechanical data

Figure 19. SO14 mechanical data and package dimensions

DIM.

A 1.35 1.75 0.053 0.069

A1 0.10 0.30 0.004 0.012

A2 1.10 1.65 0.043 0.065

B 0.33 0.51 0.013 0.020

C 0.19 0.25 0.007 0.01

(1)

D

E 3.80 4.0 0.150 0.157

e 1.27 0.050

H 5.8 6.20 0.228 0.244

h 0.25 0.50 0.01 0.02

L 0.40 1.27 0.016 0.050

k 0˚ (min.), 8˚ (max.)

ddd 0.10 0.004

(1) “D” dimension does not incl ude mold flash, protusions or gate

burrs. Mold flash, p rotusions or gate burrs shall not exceed

0.15mm per side.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

8.55 8.75 0.337 0.344

OUTLINE AND

MECHANICAL DATA

SO14

0016019 D

Doc ID 13989 Rev 2 15/18

Ordering information L6386E

7 Ordering information

Table 7. Ordering information

Part number Package Packaging

L6386E DIP14 Tube

L6386ED

SO14

L6386ED013TR Tape and reel

Tu be

16/18 Doc ID 13989 Rev 2

L6386E Revision history

8 Revision history

Table 8. Document revision history

Date Revision Changes

11-Oct-2007 1 First release

22-Jul-2009 2 Modified V

on Ta bl e 6

bth2

Doc ID 13989 Rev 2 17/18

L6386E

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18/18 Doc ID 13989 Rev 2