L6386
L6386
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
HIGH VOLTAGE RAIL UP TO 600V
dV/dt IMMUNITY +- 50 V/nsec iN FULL TEMPERATURE RANGE
DRIVER CURRENT CAPABILITY: 400 mA SOURCE,
650 mA SINK
SWITCHING TIMES 50/30 nsec RISE/FALL WITH 1nF LOAD
CMOS/TTL SCHMITT TRIGGER INPUTS WITH HYSTERESIS AND PULL DOWN UNDER VOLTAGE LOCK OUT ON LOWER AND UPPER DRIVING SECTION INTEGRATED BOOTSTRAP DIODE OUTPUTS IN PHASE WITH INPUTS
DESCRIPTION
The L6386 is an high-voltage device, manufactured with the BCD ºOFF-LINEº technology. It has a Driver structure that enables to drive inde-
BLOCK DIAGRAM
SO14 |
DIP14 |
ORDERING NUMBERS: |
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L6386D |
L6386 |
pendent referenced Channel Power MOS or IGBT. The Upper (Floating) Section is enabled to work with voltage Rail up to 600V. The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.
BOOTSTRAP DRIVER
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Vboot |
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14 |
CBOOT |
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VCC |
UV |
UV |
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HVG |
H.V. |
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4 |
DETECTION |
DETECTION |
R |
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DRIVER |
HVG |
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R |
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13 |
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3 |
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S |
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LEVEL |
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HIN |
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OUT |
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SHIFTER |
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12 |
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TO LOAD |
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LOGIC |
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VCC |
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2 |
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LVG |
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SD |
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9 |
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LVG |
PGND |
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DRIVER |
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1 |
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8 |
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LIN |
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DIAG |
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VREF |
- |
5 |
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+ |
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SGND |
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7 |
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6 |
CIN |
D97IN520D
July 1999 |
1/10 |
L6386
ABSOLUTE MAXIMUM RATINGS
Symbol |
Parameter |
Value |
Unit |
Vout |
Output Voltage |
-3 to Vboot - 18 |
V |
Vcc |
Supply Voltage |
- 0.3 to +18 |
V |
Vboot |
Floating Supply Voltage |
-1 to 618 |
V |
Vhvg |
Upper Gate Output Voltage |
- 1 to Vboot |
V |
Vlvg |
Lower Gate Output Voltage |
-0.3 to Vcc +0.3 |
V |
Vi |
Logic Input Voltage |
-0.3 to Vcc +0.3 |
V |
Vdiag |
Open Drain Forced Voltage |
-0.3 to Vcc +0.3 |
V |
Vcin |
Comparator Input Voltage |
-0.3 to Vcc +0.3 |
V |
dVout/dt |
Allowed Output Slew Rate |
50 |
V/ns |
Ptot |
Total Power Dissipation (Tj = 85 °C) |
750 |
mW |
Tj |
Junction Temperature |
150 |
°C |
Ts |
Storage Temperature |
-50 to 150 |
°C |
Note: ESD immunity for pins 12, 13 and 14 is guaranteed up to 900V (Human Body Model)
PIN CONNECTION
LIN |
1 |
14 |
Vboot |
SD |
2 |
13 |
HVG |
HIN |
3 |
12 |
OUT |
VCC |
4 |
11 |
N.C. |
DIAG |
5 |
10 |
N.C. |
CIN |
6 |
9 |
LVG |
SGND |
7 |
8 |
PGND |
D97IN521A
THERMAL DATA
Symbol |
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Parameter |
SO14 |
DIP14 |
Unit |
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Rth j-amb |
Thermal Resistance Junction to Ambient |
165 |
100 |
°C/W |
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PIN DESCRIPTION |
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N. |
Name |
Type |
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Function |
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1 |
LIN |
I |
Lower Driver Logic Input |
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2 |
SD (*) |
I |
Shut Down Logic Input |
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3 |
HIN |
I |
Upper Driver Logic Input |
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4 |
VCC |
I |
Low Voltage Supply |
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5 |
DIAG |
O |
Open Drain Diagnostic Output |
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6 |
CIN |
I |
Comparator Input |
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7 |
SGND |
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Ground |
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8 |
PGND |
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Power Ground |
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9 |
LVG (*) |
O |
Low Side Driver Output |
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10, 11 |
N.C. |
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Not Connected |
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12 |
OUT |
O |
Upper Driver Floating Driver |
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13 |
HVG (*) |
O |
High Side Driver Output |
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14 |
Vboot |
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Bootstrapped Supply Voltage |
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(*)The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA), with VCC >3V. This allows to omit the ºbleederº resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low; the gate driver assures low impedance also in SD condition.
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L6386 |
RECOMMENDED OPERATING CONDITIONS |
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Symbol |
Pin |
Parameter |
Test Condition |
Min. Typ. |
Max. |
Unit |
Vout |
12 |
Output Voltage |
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Note1 |
580 |
V |
Vboot- |
14 |
Floating Supply Voltage |
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Note1 |
17 |
V |
Vout |
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fsw |
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Switching Frequency |
HVG,LVG load CL = 1nF |
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400 |
kHz |
Vcc |
4 |
Supply Voltage |
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17 |
V |
Tj |
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Junction Temperature |
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-45 |
125 |
°C |
Note 1: if the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V.
ELECTRICAL CHARACTERISTICS
AC Operation (Vcc = 15V; Tj = 25°C)
Symbol Pin |
Parameter |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
ton |
1.3 |
High/Low Side Driver Turn-On |
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vs 9, |
Propagation Delay |
toff |
13 |
High/Low Side Driver Turn-Off |
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Propagation Delay |
tsd |
2 vs |
Shut Down to High/Low Side |
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9,13 |
Propagation Delay |
Vout = 0V |
110 |
150 |
ns |
Vout = 0V |
105 |
150 |
ns |
Vout = 0V |
105 |
150 |
ns |
tr |
13,9 |
Rise Time |
CL = 1000pF |
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50 |
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ns |
tf |
13,9 |
Fall Time |
CL = 1000pF |
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30 |
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ns |
DC Operation (Vcc = 15V; Tj = 25°C) |
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Symbol |
Pin |
Parameter |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
Low Supply Voltage Section |
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Vcc |
4 |
Supply Voltage |
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17 |
V |
Vccth1 |
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Vcc UV Turn On Threshold |
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11.5 |
12 |
12.5 |
V |
Vccth2 |
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Vcc UV Turn Off Threshold |
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9.5 |
10 |
10.5 |
V |
Vcchys |
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Vcc UV Hysteresis |
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2 |
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V |
Iqccu |
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Undervoltage Quiescent Supply Current |
Vcc ≤ 11V |
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200 |
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μA |
Iqcc |
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Quiescent Current |
Vcc = 15V |
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250 |
320 |
μA |
Bootstrapped Supply Section |
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Vboot |
14 |
Bootstrapped Supply Voltage |
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17 |
V |
Vbth1 |
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Vboot UV Turn On Threshold |
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10.7 |
11.9 |
12.9 |
V |
Vbth2 |
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Vboot UV Turn Off Threshold |
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8.8 |
9.9 |
10.7 |
V |
Vbhys |
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Vboot UV Hysteresis |
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2 |
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V |
Iqboot |
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Vboot Quiescent Current |
Vout = Vboot |
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200 |
μA |
Ilk |
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Leakage Current |
Vout = Vboot = 600V |
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10 |
μA |
Rdson |
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Bootstrap Driver on Resistance (*) |
Vcc ≥ 12.5V; Vin = 0V |
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125 |
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Ω |
Driving Buffers Section |
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Iso |
9, 13 |
High/Low Side Driver Short Circuit |
VIN = Vih (tp < 10μs) |
300 |
400 |
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mA |
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Source Current |
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Isi |
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High/Low Side Driver Short Circuit |
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500 |
650 |
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mA |
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Sink Current |
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Logic Inputs |
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Vil |
1,2,3 |
Low Level Logic Threshold Voltage |
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1.5 |
V |
Vih |
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High Level Logic Threshold Voltage |
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3.6 |
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V |
Iih |
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High Level Logic Input Current |
VIN = 15V |
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50 |
70 |
μA |
Iil |
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Low Level Logic Input Current |
VIN = 0V |
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1 |
μA |
(*) RDSON is tested in the following way: RDSON = (VCC − VCBOOT1) − (VCC− VCBOOT2)
I1(VCC,VCBOOT1) − I2(VCC,VCBOOT2)
where I1 is pin 8 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2.
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