Features
■ High voltage rail up to 600V
■ dV/dt immunity ±50V/nsec in full temperature
range
■ Driver current capability:
– 400mA source,
– 650mA sink
■ Switching times 50/30 nsec rise/fall with 1nF
load
■ CMOS/TTL Schmitt trigger inputs with
hysteresis and pull down
■ Shut down input
■ Dead time setting
■ Under voltage lock out
■ Integrated bootstrap diode
■ Clamping on V
■
SO-8/DIP-8 packages
CC
L6384E
High-voltage half bridge driver
DIP-8 SO-8
Description
The L6384E is an high-voltage device,
manufactured with the BCD"OFF-LINE"
technology. It has an Half - Bridge Driver structure
that enables to drive N-channel Power MOS or
IGBT. The High Side (Floating) Section is enabled
to work with voltage Rail up to 600V. The Logic
Inputs are CMOS/TTL compatible for ease of
interfacing with controlling devices. Matched
delays between Low and High Side Section
simplify high frequency operation. Dead time
setting can be readily accomplished by means of
an external resistor.
Figure 1. Block diagram
H.V.
V
CC
DT/SD
2
BOOTSTRAP DRIVER
V
CC
HVG
DRIVER
UV
DETECTION
RS
1
IN
V
CC
Idt
3
Vthi
DEAD
TIME
LOGIC
LEVEL
SHIFTER
LVG
DRIVER
V
8
BOOT
C
BOOT
HVG
7
OUT
6
LVG
5
GND
4
D97IN518A
LOAD
October 2007 Rev 1 1/17
www.st.com
17
Contents L6384E
Contents
1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 C
selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
BOOT
5 Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
L6384E Electrical data
1 Electrical data
1.1 Absolute maximum ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
V
V
V
V
V
V
dV
out/dt
P
T
T
1. The device has an internal Clamping Zener between GND and the Vcc pin, It must not be supplied by a
Low Impedence Voltage Source.
Output voltage -3 to V
out
Supply voltage
cc
I
Supply current
s
Floating supply voltage -1 to 618 V
boot
High side gate output voltage -1 to V
hvg
Low side gate output voltage -0.3 to Vcc +0.3 V
lvg
Logic input voltage -0.3 to Vcc +0.3 V
V
i
Shut down/dead time voltage -0.3 to Vcc +0.3 V
sd
(1)
(1)
boot
- 0.3 to 14.6 V
25 mA
boot
Allowed output slew rate 50 V/ns
Total power dissipation (Tj = 85 °C) 750 mW
tot
Junction temperature 150 °C
J
Storage temperature -50 to 150 °C
s
-18 V
V
Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900 V (Human Body Model)
1.2 Thermal data
Table 2. Thermal data
Symbol Parameter SO-8 DIP-8 Unit
Thermal Resistance Junction to ambient 150 100 °C/W
R
th(JA)
3/17
Electrical data L6384E
1.3 Recommended operating conditions
Table 3. Recommended operating conditions
Symbol Pin Parameter Test condition Min Typ Max Unit
V
out
V
BS
f
sw
V
cc
T
1. If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V.
2. VBS = V
6 Output Voltage
(2)
8 Floating Supply Voltage
Switching Frequency HVG,LVG load CL = 1nF 400 kHz
2 Supply Voltage V
j
Junction Temperature -45 125 °C
- V
boot
out
(1)
(1)
580 V
17 V
clamp
V
4/17
L6384E Pin connection
2 Pin connection
Figure 2. Pin connection (Top view)
1
Table 4. Pin description
IN
V
CC
DT/SD
GND
2
3
4 LVG
D97IN519
8
7
6
5
N° Pin Type Function
1 IN I
2 V
cc
Logic Input: it is in phase with HVG and in opposition of phase with LVG. It
is compatible to V
voltage. [V
CC
il Max
Supply input voltage: there is an internal clamp [Typ. 15.6V]
High impedance pin with two functionalities. When pulled lower than V
[Typ. 0.5V] the device is shut down. A voltage higher than Vdt sets the
dead time between high side gate driver and low side gate driver. The
dead time value can be set forcing a certain voltage level on the pin or
connecting a resistor between pin 3 and ground. Care must be taken to
3 DT/SD I
avoid below threshold spikes on pin 3 that can cause undesired shut down
of the IC. For this reason the connection of the components between pin 3
and ground has to be as short as possible. This pin can not be left floating
for the same reason. The pin has not be pulled through a low impedance
, because of the drop on the current source that feeds Rdt. The
to V
CC
operative range is: Vdt....270K ⋅ Idt, that allows a dt range of 0.4 - 3.1µs.
4 GND Ground
V
BOOT
HVG
VOUT
= 1.5V, V
ih Min
= 3.6V]
dt
Low Side Driver Output: the output stage can deliver 400mA source and
650mA sink [Typ. Values]. The circuit guarantees 0.3V max on the pin (@
I
5 LVG O
sink
allows to omit the bleeder resistor connected between the gate and the
source of the external mosfet normally used to hold the pin low; the gate
driver ensures low impedance also in SD conditions.
6 V
O
out
High Side Driver Floating Reference: layout care has to be taken to avoid
below ground spikes on this pin.
High Side Driver Output: the output stage can deliver 400mA source and
650mA sink [Typ. Values]. The circuit gurantees 0.3V max between this pin
7 HVG O
and V
threshold. This allows to omit the bleeder resistor connected between the
gate and the source of the external mosfet normally used to hold the pin
low; the gate driver ensures low impedance also in SD conditions.
Bootstrap Supply Voltage: it is the high side driver floating supply. The
8 Vboot
bootstrap capacitor connected between this pin and pin 6 can be fed by an
internal structure named "bootstrap driver" (a patented structure). This
structure can replace the external bootstrap diode.
= 10mA) with VCC > 3V and lower than the turn on threshold. This
out
(@ I
= 10mA) with VCC > 3V and lower than the turn on
sink
5/17
Electrical characteristics L6384E
3 Electrical characteristics
3.1 AC operation
Table 5. AC operation electrical characteristcs (VCC = 14.4V; TJ = 25°C)
Symbol Pin Parameter Test condition Min Typ Max Unit
1 vs
t
on
t
onsd
t
off
t
t
High/low side driver turn-on
5,7
propagation delay
3 vs
Shut down input propagation
5,7
delay
1 vs
High/low side driver turn-off
5,7
propagation delay
5,7 Rise time CL = 1000pF 50 ns
r
5,7 Fall time CL = 1000pF 30 ns
f
V
= 0V Rdt= 47kΩ
out
V
= 0V R
out
V
= 0V R
out
V
out
= 0V R
dt
dt
= 47kΩ 250 300 ns
dt
= 146kΩ 200 250 ns
= 270kΩ 170 200 ns
200+
dt
ns
220 280 ns
3.2 DC operation
Table 6. DC operation electrical characteristcs (VCC = 14.4V; TJ = 25°C)
Symbol Pin Parameter Test condition Min Typ Max Unit
Supply voltage section
V
clamp
V
ccth1
V
ccth2
V
cchys
I
qccu
I
qcc
Bootstrapped supply voltage section
V
boot
I
QBS
I
LK
R
dson
2 Supply voltage clamping Is = 5mA 14.6 15.6 16.6 V
2 VCC UV turn on threshold 11.5 12 12.5 V
VCC UV turn off threshold 9.5 10 10.5 V
VCC UV Hysteresis 2 V
2
Undervoltage quiescent
supply current
Quiescent current Vin = 0 380 500 µA
Bootstrap supply voltage 17 V
Quiescent current IN = HIGH 200 µA
8
High voltage leakage current
Bootstrap driver on
resistance
(1)
≤ 11V 150 µA
V
cc
= V
= V
V
hvg
600V
out
boot
=
10 µA
Vcc ≥12.5V; IN = LOW 125 Ω
6/17
L6384E Electrical characteristics
7
Table 6. DC operation electrical characteristcs (continued)(VCC = 14.4V; TJ = 25°C)
Symbol Pin Parameter Test condition Min Typ Max Unit
High/Low side driver
I
so
I
Sink short circuit current VIN = Vil (tp < 10µs) 500 650 mA
si
Source short circuit current V
5,7
= Vih (tp < 10µs) 300 400 mA
IN
Logic inputs
V
il
V
ih
I
ih
I
il
I
ref
dt
V
dt
1. R
DS(on)
is pin 8 current when V
where I
1
2. Pin 3 is a high impedence pin. Therefore dt can be set also forcing a certain voltage V3 on this pin. The
dead time is the same obtained with a R
Low level logic threshold
voltage
High level logic threshold
1,3
voltage
3.6 V
1.5 V
High level logic input current VIN = 15V 50 70 µA
Low level logic input current VIN = 0V 1 µA
3 Dead time setting current 28 µA
3 vs
Dead time setting range
5,7
(2)
Rdt = 47kΩ
Rdt = 146kΩ
= 270kΩ
R
dt
0.4 0.5
1.5
2.7 3.1
3 Shutdown threshold 0.5 V
is tested in the following way:
VCCV
R
DSON
CBOOT
–()VCCV
------------------------------------------------------------------------------------------------------ -=
I
()I2VCC,V
1VCC,VCBOOT1
= V
CBOOT1
CBOOT1
, I2 when V
if it is: Rdt × I
dt
CBOOT
= V3.
ref
()–
= V
–()–
CBOOT2
CBOOT2
CBOOT2
µs
µs
µs
3.3 Timing diagram
Figure 3. Input/output timing diagram
IN
SD
HVG
LVG
D99IN101
7/17
Bootstrap driver L6384E
4 Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6384E a patented
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low side driver (LVG), with in series a diode, as shown in
Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The
diode connected in series to the DMOS has been added to avoid undesirable turn on of it.
4.1 C
To choose the proper C
capacitor. This capacitor C
The ratio between the capacitors C
It has to be:
e.g.: if Q
300mV.
If HVG has to be supplied for a long time, the C
the leakage losses.
e.g.: HVG steady state consumption is lower than 200µA, so if HVG T
to supply 1µC to C
The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has great leakage current).
This structure can work only if V
LVG is on. The charging time (T
fulfilled and it has to be long enough to charge the capacitor.
BOOT
selection and charging
value the external MOS can be seen as an equivalent
BOOT
is related to the MOS total gate charge:
EXT
C
EXT
and C
EXT
C
is 30nC and V
gate
. This charge on a 1µF capacitor means a voltage drop of 1V.
EXT
is 10V, C
gate
EXT
is close to GND (or lower) and in the meanwhile the
OUT
) of the C
charge
Q
gate
-------------- -=
V
gate
is proportional to the cyclical voltage loss.
BOOT
>>>C
BOOT
EXT
is 3nF. With C
BOOT
is the time in which both conditions are
BOOT
= 100nF the drop would be
BOOT
selection has to take into account also
is 5ms, C
ON
BOOT
has
The bootstrap driver introduces a voltage drop due to the DMOS R
Ω). At low frequency this drop can be neglected. Anyway increasing the frequency it must be
taken in to account.
The following equation is useful to compute the drop on the bootstrap DMOS:
==
V
dropIch eargRdsonVdrop
where Q
bootstrap DMOS, and T
8/17
is the gate charge of the external power MOS, R
gate
is the charging time of the bootstrap capacitor.
charge
→
Q
gate
-------------------
T
ch earg
(typical value: 125
DSON
R
dson
is the on resistance of the
dson
L6384E Bootstrap driver
For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap
DMOS is about 1V, if the T
V
has to be taken into account when the voltage drop on C
drop
is 5µs. In fact:
charge
V
drop
30nC
-------------- -
5µ s
125Ω 0.8V∼⋅=
is calculated: if this drop
BOOT
is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.
Figure 4. Bootstrap driver
D
BOOT
V
S
HVG
LVG
ab
V
BOOT
H.V.
C
BOOT
V
OUT
TO LOAD
V
S
HVG
LVG
V
BOOT
H.V.
C
BOOT
V
OUT
TO LOAD
D99IN1067
9/17
Typical characteristic L6384E
5 Typical characteristic
Figure 5. Typical rise and fall times vs
time
(nsec)
250
200
150
100
50
0
load capacitance
D99IN1015
Tr
Tf
0 1 2 3 4 5 C (nF)
For both high and low side buffers @25˚C Tamb
Figure 6. Quiescent current vs supply
voltage
Iq
(µA)
4
10
3
10
2
10
10
02468101214VS(V)
D99IN1016
Figure 7. Dead time vs resistance Figure 8. Driver propagation delay vs
3.5
@ Vcc = 14.4V
3.0
2.5
2.0
1.5
dt (µs)
1.0
0.5
0.0
50 100 150 200 250 300
Rdt (kΩ)
Typ.
400
300
200
Ton,Toff (ns)
100
temperature
@ Vcc = 14.4V
Typ.
Typ.
Typ.
0
-45 -25 0 25 50 75 100 125
@ Rdt = 47kOhm
@ Rdt = 270kOhm
@ Rdt = 146kOhm
Tj (°C)
Figure 9. Dead time vs temperature Figure 10. Shutdown threshold vs
3
Typ.
2.5
2
1.5
Typ.
1
dt (µs)
0.5
Typ.
0
-45 -25 0 25 50 75 100 125
10/17
R=270K
@ Vcc = 14.4V
R=146K
R=47K
Tj (°C)
Vdt (V)
1
0.8
0.6
0.4
0.2
0
temperature
Typ.
-45 -25
@ Vcc = 14.4V
25 50 75 100 125
0
Tj (°C)
L6384E Typical characteristic
Figure 11. Vcc UV turn On vs
15
15
14
14
13
13
12
12
Vccth1 (V)
Vccth1 (V)
11
11
10
10
temperature
Typ.
Typ.
-45 -25 0 25 50 75 100 125
-45 -25 0 25 50 75 100 125
Tj (°C)
Tj (°C)
Figure 13. Vcc UV turn Off vs
Typ.
Typ.
9
9
temperature
13
13
12
12
11
11
10
10
Vccth2 (V)
Vccth2 (V)
Figure 12. Output source current vs
temperature
1000
1000
800
800
600
600
Typ.
Typ.
400
400
Current (mA)
Current (mA)
200
200
0
0
-45 -25 0 25 50 75 100 125
-45 -25 0 25 50 75 100 125
@ Vcc = 14.4V
@ Vcc = 14.4V
Tj (°C)
Tj (°C)
Figure 14. Output sink current vs
temperature
1000
1000
@ Vcc = 14.4V
800
800
600
600
400
400
Current (mA)
Current (mA)
200
200
Typ.
Typ.
@ Vcc = 14.4V
8
8
-45 -25 0 25 50 75 100 125
-45 -25 0 25 50 75 100 125
Tj (°C)
Tj (°C)
0
0
-45 -25 0 25 50 75 100 125
-45 -25 0 25 50 75 100 125
Tj (°C)
Tj (°C)
11/17
Package mechanical data L6384E
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
12/17
L6384E Package mechanical data
Figure 15. DIP-8 mechanical data and package dimensions
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0.260
I 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060
OUTLINE AND
MECHANICAL DATA
DIP-8
13/17
Package mechanical data L6384E
Figure 16. SO-8 mechanical data and package dimensions
DIM.
A 1.750 0.0689
A1 0.100 0.250 0.0039 0.0098
A2 1.250 0.0492
b 0.280 0.480 0.0110 0.0189
c 0.170 0.230 0.0067 0.0091
(1)
D
E 5.800 6.000 6.200 0.2283 0.2362 0.2441
(2)
E1
e 1.270 0.0500
h 0.250 0.500 0.0098 0.0197
L 0.400 1.270 0.0157 0.0500
L1 1.040 0.0409
k0˚8˚0˚8˚
ccc 0.100 0.0039
Notes: 1. Dimensions D does not include mold flash,
2. Dimension “E1” does not include interlead flash
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
4.800 4.900 5.000 0.1890 0.1929 0.1969
3.800 3.900 4.000 0.1496 0.1535 0.1575
protrusions or gate burrs.
Mold flash, po trusions or ga te burrs shall not
exceed 0.15m m in total (both side).
or protrusions. Interlead flash or protrusions shall
not exceed 0.25mm per side.
OUTLINE AND
MECHANICAL DATA
SO-8
14/17
0016023 D
L6384E Order codes
7 Order codes
Table 7. Order codes
Part number Package Packaging
L6384E DIP-8 Tube
L6384ED SO-8 Tube
L6384ED013TR SO-8 Tape and reel
15/17
Revision history L6384E
8 Revision history
Table 8. Document revision history
Date Revision Changes
12-Oct-2007 1 First release
16/17
L6384E
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