L6374
L6374
INDUSTRIAL QUAD LINE DRIVER
FOUR INDEPENDENT LINE DRIVERS WITH 100 mA UP TO 35V OUTPUTS
INPUT SIGNALS BETWEEN -7V AND +35V, WITH PRESETTABLE THRESHOLD PUSH-PULL OUTPUTS WITH THREE STATE CONTROL AND TRUE ZERO CURRENT BETWEEN VS AND GROUND
CURRENT LIMITING ON EACH OUTPUT EFFECTIVE IN THE FULL ºGROUND TO VSº OUTPUT VOLTAGE RANGE
OUTPUT VOLTAGE CLAMP TO VS AND TO GROUND
OVERTEMPERATURE AND UNDERVOLTAGE PROTECTIONS
DIAGNOSTIC FOR OVERTEMPERATURE, UNDERVOLTAGE AND OVERCURRENT
PRESETTABLE DELAY FOR OVERCURRENT DIAGNOSTIC
HIGH SPEED OPERATION: UP TO 300kHz WITH 35V SWING
ADVANCE DATA
POWERDIP 16+2+2 |
SO 16+2+2 |
ORDERING NUMBER: L6374DP (POWERDIP 16+2+2) L6374FP (SO 16+2+2)
DESCRIPTION
The L6374 is especially designed to be used as a line driver in industrial control systems based on the 24V signal levels (IEC1131, 24VDC).
BLOCK DIAGRAM
December 1994 |
1/13 |
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
L6374
ABSOLUTE MAXIMUM RATINGS
Symbol |
Pin |
Parameter |
Value |
Unit |
VS |
1 |
Supply Voltage (tW < 10ms) |
50 |
V |
|
|
Supply Voltage (DC) |
40 |
V |
Vilog |
12, 13 |
Logic Input Voltage (DC) |
-0.3 to 7 |
V |
Iilog |
|
Logic Input forced current, per pin |
±1 |
mA |
Ii |
7, 8, |
Channel Input Current (forced) |
±2 |
mA |
Vi |
9, 10 |
Channel Input Voltage |
- 7 to 35 |
V |
|
||||
Iout |
3, 4, |
Output Current (forced, apart from inductive load) |
±100 |
mA |
|
17, 18 |
Output Current (forced, apart from inductive load) |
±1 |
A |
|
|
|||
|
|
same tW < 10ms |
|
|
Vout |
|
Output Voltage (forced, not resulting from an inductive |
-0.3 to VS +0.3 |
V |
|
|
kick) |
|
|
Iset |
11 |
Setting pin forced current |
±1 |
mA |
Vset |
|
Setting pin forced voltage |
-0.3 to 5 |
V |
Vdiag |
14 |
External voltage |
-0.3 to 35 |
V |
Idiag |
|
Externally forced current |
-10 to 10 |
mA |
VC3 |
13 |
Voltage on the delay capacitor, externally forced |
-0.3 to 4.5 |
V |
Top |
|
Ambient temperature, operating range |
-25 to 85 |
°C |
Tj |
|
Junction temperature, operating range (see |
-25 to 125 |
°C |
|
|
Overtemperature Protection) |
|
|
Tstg |
|
Storage temperature |
-55 to 150 |
°C |
PIN CONNECTION (Top view)
2/13
|
|
|
|
|
|
|
L6374 |
ELECTRICAL CHARACTERISTICS (VS = 24V; Tj = -25 to 125°C; unless otherwise specified.) |
|
||||||
DC OPERATION |
|
|
|
|
|
|
|
Symbol |
Pin |
Parameter |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
VS |
1 |
Supply Voltage |
|
10.8 |
|
35 |
V |
Vsh |
|
UV UpperThreshold |
|
9 |
|
10.8 |
V |
Hys1 |
|
UV Hysteresis |
|
250 |
450 |
650 |
mV |
Iqsc |
|
Quiescent Current |
Outputs Open |
|
3 |
5 |
mA |
Vref |
11 |
Input Comparators Reference |
Reference pin Floating |
1.05 |
1.25 |
1.35 |
V |
|
|
Voltage |
|
|
|
|
|
Iref |
|
Sink/Source Current on |
Vref = 0V |
-30 |
-20 |
-10 |
μA |
|
|
Reference Pin |
Vref = 5V |
10 |
20 |
30 |
μA |
|
|
|
|||||
Vth |
7, 8, |
Comparator Threshold with |
VS = 9 to 12V |
-0.2 |
|
2.0 |
V |
|
9, 10 |
External Bias |
VS = 12 to 35V |
-0.2 |
|
5.0 |
V |
|
|
|
|
||||
Vil |
|
Input Low Level |
VREF Externally Biased |
-7 |
|
VREF |
V |
|
|
|
|
|
|
-0.2 |
|
|
|
|
Pin VREF Floating |
-7 |
|
0.8 |
V |
Vih |
|
Input High Level |
VREF Externally Biased |
VREF |
|
35 |
V |
|
|
|
|
+0.2 |
|
|
|
|
|
|
Pin VREF Floating |
2 |
|
35 |
V |
Vi |
|
Input Voltage (Operative Range) |
|
-7 |
|
35 |
V |
Ibias |
|
Input Bias Current |
0 < Vi < VS |
-1 |
|
1 |
μA |
|
|
|
Vi = -7V |
-1 |
-0.5 |
-0.1 |
mA |
Hys2 |
|
Input Comparators Hysteresis |
See Analog Inputs Sections |
100 |
200 |
350 |
mV |
Th |
|
OVT Upper Threshold |
|
|
170 |
|
°C |
HT |
|
OVT Hysteresis |
|
|
20 |
|
°C |
Isc |
3, 4, |
Current Limit |
Vi = -7 to VS; Vout = 0 to VS; |
110 |
200 |
300 |
mA |
Von |
17, 18 |
Internal Voltage Drop @ Rated |
Iout = ±100mA; Sourced @ High |
|
400 |
600 |
mV |
|
|
||||||
|
|
Current |
Output, Sunk @ Low Output |
|
|
|
|
|
|
|
Tj = 125°C |
|
|
|
|
|
|
|
Same, Tj = 25°C |
|
250 |
400 |
mV |
Ilkg |
|
Output 3-State Leakage Current |
Vout = 0 to VS |
-25 |
|
25 |
μA |
Vin |
12 |
Push-Pull Mode Request |
|
-0.2 |
|
0.8 |
V |
|
|
3-State Mode Request |
|
2 |
|
5.5 |
V |
Iin |
|
Input Current |
Vi = 0V |
|
10 |
25 |
μA |
Idlkg |
14 |
Diagnostic Output Leakage |
Diagnostic Off; Vdiag = 24V |
|
|
5 |
μA |
Vdiag |
|
Diagnostic Output Voltage Drop |
Idiag =5mA |
|
200 |
500 |
mV |
AC OPERATION (VS = 10.8 to 35V; Tj = -25 to 125°C; Iout = 100mA; unless otherwise specified; see switching waveforms diagrams)
Symbol |
Pin |
Parameter |
Test Condition |
Min. Typ. Max. Unit |
|||
tdr |
7 to 4 |
Delay Time on Rising Edge |
Rl to ground |
1000 |
1500 |
ns |
|
|
8 to 3 |
|
Rl to VS |
500 |
1000 |
ns |
|
|
9 to18 |
|
|||||
tdf |
Delay Time on Falling Edge |
Rl to ground |
500 |
1000 |
ns |
||
10to17 |
|||||||
|
|
|
Rl to VS |
1000 |
1500 |
ns |
|
tr |
3, 4, |
Rise Time |
Rl to ground |
120 |
250 |
ns |
|
|
17, 18 |
|
Rl to VS |
120 |
250 |
ns |
|
|
|
|
|||||
tf |
|
Fall Time |
Rl to ground |
150 |
300 |
ns |
|
|
|
|
Rl to VS |
150 |
300 |
ns |
3/13
L6374
THERMAL DATA
Symbol |
Parameter |
DIP20 |
SO20 |
Unit |
Rth j-pin |
Thermal Resistance, Junction to Pin |
12 |
17 |
°C/W |
Rth j-amb1 |
Thermal Resistance, Junction to Ambient (see Thermal |
40 |
65 |
°C/W |
|
Characteristics) |
|
|
|
Rth j-amb2 |
Thermal Resistance, Junction to Ambient (see Thermal |
50 |
80 |
°C/W |
|
Characteristics) |
|
|
|
THERMAL CHARACTERISTICS
Rth j-pins
POWERDIP. The thermal resistance is referred to the thermal path from the dissipating region on the top surface of the silicon chip, to the points along the four central pins of the package, at a distance of 1.5 mm away from the stand-offs.
SO. Similarly, the reference point is the knee on the four central pins, where the pins are upwardly bent and the soldering joint with the PCB footprint can be made.
Rth j-amb1
If a dissipating surface, thick at least 35 μm, and with a surface similar or bigger than the one shown, is created making use of the printed circuit.
Figure 1: Printed Heatsink
Such heatsinking surface is considered on the bottom side of an horizontal PCB (worst case).
Rth j-amb2
If the power dissipating pins (the four central ones), as well as the others, have a minimum thermal connection with the external world (very thin strips only) so that the dissipation takes place through still air and through the PCB itself.
It is the same situation of point above, without any heatsinking surface created on purpose on the board.
Additional data for the PowerDip package can be found in:
Application Note 9030:
Thermal Characteristics of the PowerDip 20,24 Packages Soldered on 1,2,3 oz. Copper PCB
4/13