ST L6235Q User Manual

L6235Q

DMOS driver for 3-phase brushless dc motor

Features

■Operating supply voltage from 8 to 52 V

■5.6 A output peak current

■RDS(on) 0.3 Ω typ. value @ TJ = 25 °C

■Operating frequency up to 100 kHz

■Non-dissipative overcurrent protection

■Diagnostic output

■Constant tOFF PWM current controller

■Slow decay synchronous rectification

■60° and 120° Hall effect decoding logic

■Brake function

■Tacho output for speed loop

■Cross conduction protection

■Thermal shutdown

■Undervoltage lockout

■Integrated fast freewheeling diodes

Figure 1. Block diagram

QFN-48 (7 x 7 mm)

Description

The L6235Q is a DMOS fully integrated 3-phase motor driver with overcurrent protection. Realized in BCDmultipower technology, the device combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. The device includes all the circuitry needed to drive a 3-phase BLDC motor including: a 3-phase DMOS bridge, a constant OFF time PWM current controller and the decoding logic for single ended Hall sensors that generates the required sequence for the power stage. Available in QFN48 7x7 package, the L6235Q features a nondissipative overcurrent protection on the high-side power MOSFETs and thermal shutdown.

VBOOT	VBOOT					VBOOT		VSA
			THERMAL
VCP	CHARGE
	PUMP		PROTECTION
						OCD1		OUT1
DIAG			OCD1			10V
	OCD		OCD2
			OCD3
			OCD
EN						VBOOT
BRAKE
FWD/REV
						OCD2		OUT2
H3				GATE		10V
		HALL-EFFECT		LOGIC
H2		SENSORS
		DECODING
								SENSEA
			LOGIC
H1						VBOOT		VSB
RCPULSE	TACHO					OCD3
	MONOSTABLE							OUT3
						10V
TACHO
	10V	5V
					PWM			SENSEB
	VOLTAGE
				ONE SHOT	MASKING		+
	REGULATOR
				MONOSTABLE	TIME	SENSE	-	VREF
						COMPARATOR
								RCOFF
								AM02555v1

November 2011 Doc ID 018997 Rev 2 1/33

www.st.com

Contents	L6235Q

Contents

1	Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 3
	1.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	3
	1.2	Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	3
2	Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		4
3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		6
4	Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		9
	4.1	Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	4.2	Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
	4.3	PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
	4.4	Slow decay mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	4.5	Decoding logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	4.6	Tacho . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
	4.7	Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . .	18
	4.8	Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
5	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23
6	Output current capability and IC power dissipation . . . . . . . . . . . . . .		25
7	Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		26
8	Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		27
9	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		29
10	Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		31
11	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		32

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L6235Q	Electrical data

1 Electrical data

1.1Absolute maximum ratings

	Table 1.	Absolute maximum ratings
	Symbol	Parameter	Parameter	Value	Unit
	VS	Supply voltage	VSA = VSB = VS	60	V
		Differential voltage between	VSA = VSB = VS = 60 V;
	VOD	VSA, OUT1A, OUT2A, SENSEA and	VSENSEA = VSENSEB =	60	V
		VSB, OUT1B, OUT2B, SENSEB	GND
	VBOOT	Bootstrap peak voltage	VSA = VSB = VS	VS + 10	V
	VIN,VEN	Input and enable voltage range		-0.3 to +7	V
	VREF	Voltage range at pin VREF		-0.3 to +7	V
	VRCOFF	Voltage range at pin RCOFF		-0.3 to +7	V
	VSENSE	Voltage range at pins SENSEA and		-1 to +4	V
		SENSEB
	IS(peak)	Pulsed supply current (for each VSA	VSA = VSB = VS;	7.1	A
		and VSB pin)	tPULSE < 1 ms
	IS	DC supply current (for each VSA and	VSA = VSB = VS	2.5	A
		VSB pin)
	Tstg, TOP	Storage and operating temperature		-40 to 150	°C
		range

1.2Recommended operating conditions

	Table 2.	Recommended operating conditions
	Symbol	Parameter	Parameter	Min.	Max.	Unit
	VS	Supply voltage	VSA = VSB = VS	8	52	V
		Differential voltage between	VSA = VSB = VS;
	VOD	VSA, OUT1A, OUT2A, SENSEA and			52	V
			VSENSEA = VSENSEB
		VSB, OUT1B, OUT2B, SENSEB
	VREF	Voltage range at pin VREF		-0.1	5	V
	VSENSE	Voltage range at pins SENSEA and	Pulsed tW < trr	-6	6	V
		SENSEB	DC	-1	1	V
	IOUT	DC output current	VSA = VSB = VS;		2.5	A
	Tj	Operating junction temperature		-25	+125	°C
	fsw	Switching frequency			100	kHz

Doc ID 018997 Rev 2

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Pin connection	L6235Q

2 Pin connection

Figure 2. Pin connection (top view)

RCOFF

NC

SENSEA

SENSEA

DIAG

H1

H3

H2

VCP

OUT2

OUT2

NC

48

47

46

45

44

43

42

41

40

39

38

37

NC

NC

1

36

OUT1

2

EPAD

35

VSA

OUT1

VSA

3

34

NC

NC

4

33

NC

NC

5

32

GND

GND

6

31

NC

NC

7

30

NC

NC

8

29

NC

NC

9

28

NC

VSB

10

27

NC

VSB

11

26

TACHO

NC

12

25

13

14

15

16

17

18

19

20

21

22

23

24

RCPULSE

NC

SENSEB

SENSEB

FWD/REV

EN

VREF

BRAKE

VBOOT

OUT3

OUT3

NC

AM02556v1

Note:

The exposed PAD must be connected to GND pin.

Table 3.

Pin description

Pin

Name

Type

Function

43

H1

Sensor input

Single ended Hall effect sensor input 1.

Open drain

Overcurrent detection and thermal protection pin. An internal open

44

DIAG

drain transistor pulls to GND when an overcurrent on one of the

output

high-side MOSFETs is detected or during thermal protection.

Half bridge 1 and half bridge 2 source pin. This pin must be

45, 46

SENSEA

Power supply

connected together with pin SENSEB to power ground through a

sensing power resistor.

48

RCOFF

RC pin

RC network pin. A parallel RC network connected between this pin

and ground sets the current controller OFF time.

2, 3

OUT1

Power output

Output 1

6, 31

GND

GND

Ground terminals.

12

TACHO

Open drain

Frequency-to-voltage open drain output. Every pulse from pin H1 is

output

shaped as a fixed and adjustable length pulse.

RC network pin. A parallel RC network connected between this pin

13

RCPULSE

RC pin

and ground sets the duration of the monostable pulse used for the

frequency-to-voltage converter.

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L6235Q				Pin connection
Table 3.	Pin description (continued)
Pin		Name	Type	Function
				Half bridge 3 source pin. This pin must be connected together with
15, 16		SENSEB	Power supply	pin SENSEA to power ground through a sensing power resistor. At
				this pin also the inverting input of the sense comparator is
				connected.
				Selects the direction of the rotation. High logic level sets forward
17		FWD/REV	Logic input	operation, whereas low logic level sets reverse operation. If not
				used, it must be connected to GND or +5 V.
18		EN	Logic input	Chip enable. Low logic level switches off all power MOSFETs. If not
				used, it must be connected to +5 V.
19		VREF	Logic input	Current controller reference voltage. Do not leave this pin open or
				connect to GND.
				Brake input pin. Low logic level switches on all high-side power
20		BRAKE	Logic input	MOSFETs, implementing the brake function. If not used, it must be
				connected to +5 V.
21		VBOOT	Supply voltage	Bootstrap voltage needed for driving the upper power MOSFETs.
22, 23		OUT3	Power output	Output 3.
26, 27		VSB	Power supply	Half bridge 3 power supply voltage. It must be connected to the
				supply voltage together with pin VSA.
34, 35		VSA	Power supply	Half bridge 1 and half bridge 2 power supply voltage. It must be
				connected to the supply voltage together with pin VSB.
38, 39		OUT2	Power output	Output 2.
40		VCP	Output	Charge pump oscillator output.
41		H2	Sensor input	Single ended Hall effect sensor input 2.
42		H3	Sensor input	Single ended Hall effect sensor input 3.

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Electrical characteristics	L6235Q

3 Electrical characteristics

VS = 48 V, TA = 25 °C, unless otherwise specified.

Table 4.		Electrical characteristics
Symbol		Parameter			Test condition	Min.	Typ.	Max.	Unit
VSth(ON)		Turn-on threshold				6.6	7	7.4	V
VSth(OFF)		Turn-off threshold				5.6	6	6.4	V
	IS	Quiescent supply current	All bridges OFF; Tj = -25 °C to				5	10	mA
			125 °C (1)
Tj(OFF)		Thermal shutdown temperature					165		°C
Output DMOS transistors
		High-side switch ON resistance	Tj = 25 °C				0.34	0.4
RDS(ON)			Tj =125 °C (1)				0.53	0.59	Ω
		Low-side switch ON resistance	Tj = 25 °C				0.28	0.34
			Tj =125 °C (1)				0.47	0.53
	IDSS	Leakage current	EN = low; OUT = VS					2	mA
			EN = low; OUT = GND			-0.15			mA
Source drain diodes
	VSD	Forward ON voltage	ISD = 2.5 A, EN = low				1.15	1.3	V
	trr	Reverse recovery time	If = 2.5 A				300		ns
	tfr	Forward recovery time					200		ns
Logic input (H1, H2, H3, EN, FWD/REV, BRAKE)
	VIL	Low level logic input voltage				-0.3		0.8	V
	VIH	High level logic input voltage				2		7	V
	IIL	Low level logic input current	GND logic input voltage			-10			µA
	IIH	High level logic input current	7 V logic input voltage					10	µA
Vth(ON)		Turn-on input threshold					1.8	2.0	V
Vth(OFF)		Turn-off input threshold				0.8	1.3		V
Vth(HYS)		Input threshold hysteresis				0.25	0.5		V
Switching characteristics
t	D(on)EN	Enable to out turn ON delay time (2)	I	LOAD	=2.5 A, resistive load	100	250	400	ns
t	D(off)EN	Enable to out turn OFF delay time (2)	I	LOAD	=2.5 A, resistive load	300	550	800	ns
tD(on)IN		Other logic inputs to output turn	ILOAD =2.5 A, resistive load					2	ns
		ON delay time
tD(off)IN		Other logic inputs to out turn OFF	ILOAD =2.5 A, resistive load					2	ns
		delay time

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L6235Q						Electrical characteristics
Table 4.		Electrical characteristics (continued)
Symbol		Parameter			Test condition		Min.	Typ.	Max.	Unit
t	RISE	Output rise time (2)	I	LOAD	=2.5 A, resistive load		40		250	ns
t		Output fall time (2)	I	LOAD	=2.5 A, resistive load		40		250	ns
	FALL
	tDT	Dead time protection					0.5	1		µs
	fCP	Charge pump frequency	Tj = -25 °C to 125 °C (7)					0.6	1	MHz
PWM comparator and monostable
IRCOFF		Source current at pin RCOFF	VRCOFF = 2.5 V				3.5	5.5		mA
Voffset		Offset voltage on sense comparator	VREF = 0.5 V					±5		mV
tPROP		Turn OFF propagation delay (3)						500		ns
tBLANK		Internal blanking time on SENSE						1		µs
		comparator
tON(MIN)		Minimum ON time						1.5	2	µs
tOFF		PWM recirculation time	ROFF = 20 kΩ; COFF = 1 nF					13		µs
			ROFF = 100 kΩ; COFF = 1 nF					61		µs
IBIAS		Input bias current at pins VREFA and							10	µA
		VREFB
Tacho monostable
IRCPULSE		Source current at pin RCPULSE	VRCPULSE = 2.5 V				3.5	5.5		mA
tPULSE		Monostable of time	RPUL = 20 kΩ; CPUL =1 nF					12		µs
			RPUL = 100 kΩ; CPUL =1 nF					60		µs
RTACHO		Open drain ON resistance						40	60	Ω
Over current detection e protection
Isover		Supply overcurrent protection	-25 °C<Tj <125 °C				4.0	5.6	7.1	A
		threshold
ROPDR		Open drain ON resistance	I = 4 mA					40	60	Ω
	IOH	OCD high level leakage current	VDIAG = 5 V					1		µA
tOCD(ON)		OCD turn-on delay time (4)	I = 4 mA; CEN < 100 pF					200		ns
tOCD(OFF)		OCD turn-off delay time (4)	I = 4 mA; CEN < 100 pF					100		ns

1.Tested at 25 °C in a restricted range and guaranteed by characterization.

2.See Figure 3.

3.Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin VREF.

4.See Figure 4.

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	Electrical characteristics	L6235Q
	Figure 3. Switching characteristic definition
	EN
	Vth(ON)
	Vth(OFF)
		t
	IOUT
	90%
	10%
	D01IN1316	t
		tRISE
	tFALL
	tD(OFF)EN	tD(ON)EN
		AM02557v1

Figure 4. Overcurrent detection timing definition

IOUT

ISOVER

ON

BRIDGE

OFF

VDIAG

90%

10%

tOCD(ON) tOCD(OFF)

AM02558v1

8/33	Doc ID 018997 Rev 2

L6235Q	Circuit description

4 Circuit description

4.1Power stages and charge pump

The L6235Q integrates a 3-phase bridge, which consists of 6 power MOSFETs connected

as shown in Figure 1, each power MOSFET has an RDS(ON) = 0.3 Ω (typical value @ 25 °C) with intrinsic fast freewheeling diode. Switching patterns are generated by the PWM current

controller and the Hall effect sensor decoding logic (Chapter 4.3 on page 11). Cross conduction protection is implemented by using a dead time (tDT = 1 µs typical value) set by internal timing circuit between the turn-off and turn-on of two power MOSFETs in one leg of a bridge.

Pins VSA and VSB must be connected together to the supply voltage (VS).

Using an N-channel power MOSFET for the upper transistors in the bridge requires a gate drive voltage above the power supply voltage. The bootstrapped supply (VBOOT) is obtained through an internal oscillator and a few external components to realize a charge pump circuit, as shown in Figure 5. The oscillator output (pin VCP) is a square wave at 600 kHz (typically) with 10 V amplitude. Recommended values/part numbers for the charge pump circuit are shown in Table 5.

Table 5.	Charge pump external component values
	Component		Value
	CBOOT		220 nF
	CP		10 nF
	RP		100 Ω
	D1		1N4148
	D2		1N4148

Figure 5. Charge pump circuit

			VS
D1	CBOOT
D2
RP
CP
VCP	VBOOT	VSA	VSB

AM02559v1

Doc ID 018997 Rev 2

9/33

Circuit description	L6235Q

4.2Logic inputs

Pins FWD/REV, BRAKE, EN, H1, H2 and H3 are TTL/CMOS and µC compatible logic inputs. The internal structure is shown in Figure 6. Typical value for turn-on and turn-off thresholds are respectively Vthon=1.8 V and Vthoff = 1.3 V.

Pin EN (enable) may be used to implement overcurrent and thermal protection by connecting it to the open collector DIAG output. If the protection and an external disable function are both desired, the appropriate connection must be implemented. When the external signal is from an open collector output, the circuit in Figure 7 may be used. For external circuits that are push-pull outputs the circuit in Figure 8 may be used. The resistor REN should be chosen in the range from 2.2 kΩ to 180 kΩ. Recommended values for REN and CEN are respectively 100 kΩ and 5.6 nF. More information for selecting the values can be found in Section 4.7.

Figure 6. Logic inputs internal structure

5V

		ESD
		PROTECTION
			AM02560v1
Figure 7.	EN pins open collector driving
		5V	DIAG
		REN	5V
	OPEN
	COLLECTOR		EN
	OUTPUT	CEN
			ESD
			PROTECTION
			AM02561v1
Figure 8.	EN pins push-pull driving
			DIAG
			5V
	PUSH-PULL	REN
			EN
	OUTPUT
		CEN	ESD
			PROTECTION
			AM02562v1

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Doc ID 018997 Rev 2