The L6235Q is a DMOS fully integrated 3-phase
motor driver with overcurrent protection. Realized
in BCDmultipower technology, the device
combines isolated DMOS power transistors with
CMOS and bipolar circuits on the same chip. The
device includes all the circuitry needed to drive a
3-phase BLDC motor including: a 3-phase DMOS
bridge, a constant OFF time PWM current
controller and the decoding logic for single ended
Hall sensors that generates the required
sequence for the power stage. Available in
QFN48 7x7 package, the L6235Q features a nondissipative overcurrent protection on the high-side
power MOSFETs and thermal shutdown.
Differential voltage between
VSA, OUT1A, OUT2A, SENSEA and
, OUT1B, OUT2B, SENSE
VS
B
B
Bootstrap peak voltage VSA = VSB = VS V
Input and enable voltage range -0.3 to +7 V
Voltage range at pin V
Voltage range at pin RC
REF
OFF
Voltage range at pins SENSEA and
SENSE
B
Pulsed supply current (for each VSA
SB
pin)
and V
DC supply current (for each VSA and
S
VSB pin)
VSA = VSB = VS = 60 V;
VSENSEA = VSENSEB =
60 V
GND
+ 10 V
S
-0.3 to +7 V
-0.3 to +7 V
-1 to +4 V
V
= VSB = VS;
SA
< 1 ms
t
PULSE
VS
= VSB = VS 2.5 A
A
7.1 A
, TOP
T
stg
Storage and operating temperature
range
1.2 Recommended operating conditions
Table 2.Recommended operating conditions
SymbolParameterParameterMin. Max. Unit
V
Supply voltage VSA = VSB = VS 8 52 V
S
Differential voltage between
V
V
V
SENSE
I
OUT
f
OD
REF
T
sw
VSA, OUT1A, OUT2A, SENSEA and
, OUT1B, OUT2B, SENSEB
VS
B
Voltage range at pin V
-0.15V
REF
Voltage range at pins SENSEA and
SENSE
B
DC output current VSA = VSB = VS;2.5 A
Operating junction temperature -25 +125 °C
j
Switching frequency 100 kHz
= VSB = VS;
VS
A
V
SENSEA
Pulsed tW < t
DC -1 1 V
= V
SENSEB
rr
-40 to 150 °C
52 V
-6 6 V
Doc ID 018997 Rev 23/33
Pin connectionL6235Q
2 Pin connection
Figure 2.Pin connection (top view)
OUT1
OUT1
GND
TACHO
NC
NC
NC
NC
NC
NC
NC
NC
SENSEA
RCOFF
NC
48 47 46 45 44 43 42 41 40 39 38 37
1
EPAD
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
NC
SENSEB
RCPULSE
SENSEA
SENSEB
H1
H3
DIAG
EN
VREF
FWD/REV
Note:The exposed PAD must be connected to GND pin.
H2
BRAKE
VCP
VBOOT
OUT2
OUT3
OUT2
OUT3
NC
NC
36
NC
35
VSA
34
VSA
33
NC
32
NC
31
GND
30
NC
29
NC
28
NC
27
VSB
26
VSB
25
NC
AM02556v1
Table 3.Pin description
PinNameTypeFunction
43H1 Sensor input Single ended Hall effect sensor input 1.
44DIAG
45, 46SENSE
48RC
OFF
Open drain
output
Power supply
A
RC pin
2, 3OUT1 Power output Output 1
6, 31GND GND Ground terminals.
12TACHO
Open drain
output
13RCPULSE RC pin
Overcurrent detection and thermal protection pin. An internal open
drain transistor pulls to GND when an overcurrent on one of the
high-side MOSFETs is detected or during thermal protection.
Half bridge 1 and half bridge 2 source pin. This pin must be
connected together with pin SENSEB to power ground through a
sensing power resistor.
RC network pin. A parallel RC network connected between this pin
and ground sets the current controller OFF time.
Frequency-to-voltage open drain output. Every pulse from pin H
shaped as a fixed and adjustable length pulse.
RC network pin. A parallel RC network connected between this pin
and ground sets the duration of the monostable pulse used for the
frequency-to-voltage converter.
is
1
4/33Doc ID 018997 Rev 2
L6235QPin connection
Table 3.Pin description (continued)
PinNameTypeFunction
Half bridge 3 source pin. This pin must be connected together with
15, 16SENSE
Power supply
B
17FWD/REV Logic input
pin SENSE
this pin also the inverting input of the sense comparator is
connected.
Selects the direction of the rotation. High logic level sets forward
operation, whereas low logic level sets reverse operation. If not
used, it must be connected to GND or +5 V.
to power ground through a sensing power resistor. At
A
18EN Logic input
19VREF Logic input
Chip enable. Low logic level switches off all power MOSFETs. If not
used, it must be connected to +5 V.
Current controller reference voltage. Do not leave this pin open or
connect to GND.
Brake input pin. Low logic level switches on all high-side power
20BRAKE Logic input
MOSFETs, implementing the brake function. If not used, it must be
connected to +5 V.
21VBOOT Supply voltage Bootstrap voltage needed for driving the upper power MOSFETs.
22, 23OUT
26, 27VSB Power supply
34, 35VSA Power supply
38, 39OUT
Power output Output 3.
3
Half bridge 3 power supply voltage. It must be connected to the
supply voltage together with pin VS
Half bridge 1 and half bridge 2 power supply voltage. It must be
connected to the supply voltage together with pin VS
Power output Output 2.
2
.
A
.
B
40VCP Output Charge pump oscillator output.
41H2 Sensor input Single ended Hall effect sensor input 2.
42H
Sensor input Single ended Hall effect sensor input 3.
3
Doc ID 018997 Rev 25/33
Electrical characteristicsL6235Q
3 Electrical characteristics
VS = 48 V, TA = 25 °C, unless otherwise specified.
Table 4.Electrical characteristics
SymbolParameterTest conditionMin. Typ. Max. Unit
V
Sth(ON)
V
Sth(OFF)
Turn-on threshold 6.677.4V
Turn-off threshold 5.666.4V
IS Quiescent supply current
Thermal shutdown temperature 165°C
T
j(OFF)
Output DMOS transistors
High-side switch ON resistance
R
DS(ON)
Low-side switch ON resistance
I
DSS
Leakage current
Source drain diodes
V
Forward ON voltage ISD = 2.5 A, EN = low 1.151.3V
SD
t
rr
t
fr
Reverse recovery time If = 2.5 A 300ns
Forward recovery time 200ns
Logic input (H1, H2, H3, EN, FWD/REV, BRAKE)
All bridges OFF; Tj = -25 °C to
125 °C
(1)
510mA
Tj = 25 °C 0.340.4
Tj =125 °C
(1)
0.530.59
Ω
Tj = 25 °C 0.280.34
Tj =125 °C
EN = low; OUT = V
(1)
0.470.53
2mA
S
EN = low; OUT = GND -0.15mA
V
V
I
I
V
th(ON)
V
th(OFF)
V
th(HYS)
IH
IL
IH
Low level logic input voltage -0.30.8V
IL
High level logic input voltage 27V
Low level logic input current GND logic input voltage -10µA
High level logic input current 7 V logic input voltage 10µA
Turn-on input threshold 1.8 2.0V
Turn-off input threshold 0.81.3V
Input threshold hysteresis 0.250.5V
Switching characteristics
t
D(on)EN
t
D(off)EN
t
D(on)IN
t
D(off)IN
Enable to out turn ON delay time
Enable to out turn OFF delay time
Other logic inputs to output turn
ON delay time
Other logic inputs to out turn OFF
delay time
(2)
(2)
I
I
I
I
=2.5 A, resistive load 100250400ns
LOAD
=2.5 A, resistive load300550800ns
LOAD
=2.5 A, resistive load 2ns
LOAD
=2.5 A, resistive load2ns
LOAD
6/33Doc ID 018997 Rev 2
L6235QElectrical characteristics
Table 4.Electrical characteristics (continued)
SymbolParameterTest conditionMin. Typ. Max. Unit
t
Output rise time
RISE
t
Output fall time
FAL L
Dead time protection 0.51µs
t
DT
Charge pump frequency Tj = -25 °C to 125 °C (7) 0.61MHz
f
CP
PWM comparator and monostable
(2)
(2)
I
I
=2.5 A, resistive load 40250ns
LOAD
=2.5 A, resistive load 40250ns
LOAD
I
RCOFF
V
offset
t
PROP
t
BLANK
t
ON(MIN)
t
OFF
I
BIAS
Source current at pin RC
OFF
Offset voltage on sense comparator V
Turn OFF propagation delay
Internal blanking time on SENSE
comparator
(3)
V
RCOFF =
REF
2.5 V 3.55.5mA
= 0.5 V ±5 mV
Minimum ON time 1.52µs
R
PWM recirculation time
Input bias current at pins VREF
VREF
B
and
A
OFF
= 100 kΩ; C
R
OFF
= 20 kΩ; C
= 1 nF 13µs
OFF
= 1 nF 61µs
OFF
Tacho monostable
I
RCPULSE
t
PULSE
R
TAC H O
Source current at pin RCPULSEV
Monostable of time
RCPULSE
R
PUL
R
PUL
Open drain ON resistance4060Ω
= 2.5 V3.55.5mA
= 20 kΩ; C
= 100 kΩ; C
=1 nF12µs
PUL
=1 nF60µs
PUL
Over current detection e protection
I
sover
R
OPDR
I
OH
t
OCD(ON)
t
OCD(OFF)
1. Tested at 25 °C in a restricted range and guaranteed by characterization.
2. See Figure 3.
3. Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin V
4. See Figure 4.
Supply overcurrent protection
threshold
-25 °C<Tj <125 °C4.05.6 7.1A
Open drain ON resistance I = 4 mA 4060Ω
OCD high level leakage current V
OCD turn-on delay time
OCD turn-off delay time
(4)
(4)
= 5 V1µA
DIAG
I = 4 mA; CEN < 100 pF 200ns
I = 4 mA; CEN < 100 pF 100ns
REF
500ns
1µs
10µA
.
Doc ID 018997 Rev 27/33
Electrical characteristicsL6235Q
Figure 3.Switching characteristic definition
EN
V
th(ON)
V
th(OFF)
t
I
OUT
90%
10%
D01IN1316
t
D(OFF)EN
t
FAL L
t
D(ON)EN
t
t
RISE
AM02557v1
Figure 4.Overcurrent detection timing definition
I
OUT
I
SOVER
ON
BRIDGE
OFF
V
DIAG
90%
10%
t
OCD(ON)
t
OCD(OFF)
AM02558v1
8/33Doc ID 018997 Rev 2
L6235QCircuit description
4 Circuit description
4.1 Power stages and charge pump
The L6235Q integrates a 3-phase bridge, which consists of 6 power MOSFETs connected
as shown in Figure 1, each power MOSFET has an R
with intrinsic fast freewheeling diode. Switching patterns are generated by the PWM current
controller and the Hall effect sensor decoding logic (Chapter 4.3 on page 11). Cross
conduction protection is implemented by using a dead time (t
internal timing circuit between the turn-off and turn-on of two power MOSFETs in one leg of
a bridge.
= 0.3 Ω (typical value @ 25 °C)
DS(ON)
= 1 µs typical value) set by
DT
Pins VS
and VSB must be connected together to the supply voltage (VS).
A
Using an N-channel power MOSFET for the upper transistors in the bridge requires a gate
drive voltage above the power supply voltage. The bootstrapped supply (V
) is obtained
BOOT
through an internal oscillator and a few external components to realize a charge pump
circuit, as shown in Figure 5. The oscillator output (pin VCP) is a square wave at 600 kHz
(typically) with 10 V amplitude. Recommended values/part numbers for the charge pump
circuit are shown in Tab le 5 .
Table 5.Charge pump external component values
ComponentValue
C
BOOT
C
P
R
P
220 nF
10 nF
100 Ω
D11N4148
D21N4148
Figure 5.Charge pump circuit
V
S
D1
R
C
VCPVBOOTVS
C
D2
P
P
BOOT
VS
A
B
AM02559v1
Doc ID 018997 Rev 29/33
Circuit descriptionL6235Q
4.2 Logic inputs
Pins FWD/REV, BRAKE, EN, H1, H2 and H3 are TTL/CMOS and µC compatible logic
inputs. The internal structure is shown in Figure 6. Typical value for turn-on and turn-off
thresholds are respectively V
Pin EN (enable) may be used to implement overcurrent and thermal protection by
connecting it to the open collector DIAG output. If the protection and an external disable
function are both desired, the appropriate connection must be implemented. When the
external signal is from an open collector output, the circuit in Figure 7 may be used. For
external circuits that are push-pull outputs the circuit in Figure 8 may be used. The resistor
R
should be chosen in the range from 2.2 kΩ to 180 kΩ. Recommended values for REN
EN
and C
are respectively 100 kΩ and 5.6 nF. More information for selecting the values can
EN
be found in Section 4.7.
Figure 6.Logic inputs internal structure
=1.8 V and V
thon
PROTECTION
ESD
thoff
= 1.3 V.
5V
Figure 7.EN pins open collector driving
DIAG
OPEN
COLLECTOR
OUTPUT
5V
R
EN
C
EN
Figure 8.EN pins push-pull driving
R
PUSH-PULL
OUTPUT
EN
C
EN
AM02560v1
5V
EN
ESD
PROTECTION
AM02561v1
DIAG
5V
EN
ESD
PROTECTION
10/33Doc ID 018997 Rev 2
AM02562v1
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