ST L6229Q User Manual

DMOS driver for three-phase brushless DC motor

Features

■ Operating supply voltage from 8 to 52 V

■ 2.8 A output peak current (1.4 A RMS)

■ R

■ Operating frequency up to 100 kHz

■ Non dissipative overcurrent detection and

protection

■ Diagnostic output

■ Constant t

■ Slow decay synchronous rectification

■ 60° and 120° hall effect decoding logic

■ Brake function

■ Cross conduction protection

■ Thermal shutdown

■ Under voltage lockout

■ Integrated fast free wheeling diodes

0.73 Ω typ. value @ TJ = 25 °C

DS(on)

PWM current controller

OFF

L6229Q

VFQFPN32 5 mm x 5 mm

Description

The L6229Q is a DMOS fully integrated three­phase motor driver with overcurrent protection.

Realized in BCDmultipower technology, the
device combines isolated DMOS power
transistors with CMOS and bipolar circuits on the
same chip.

The device includes all the circuitry needed to
drive a three-phase BLDC motor including: a
three-phase DMOS bridge, a constant off time
PWM current controller and the decoding logic for
single ended hall sensors that generates the
required sequence for the power stage.

Available in VFQFPN-32 5 x 5 package, the
L6229Q features a non-dissipative overcurrent
protection on the high side power MOSFETs and
thermal shutdown.

Table 1. Device summary

Order codes Package Packaging

L6229Q

VFQFPN32 5x5x1.0 mm

L6229QTR Tape and reel

August 2010 Doc ID 15209 Rev 3 1/28

Tube

www.st.com

28

Contents L6229Q

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.1 Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.2 Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.3 PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.4 Slow decay mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.5 Decoding logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.6 Tacho . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.7 Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . 20

6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6.1 Output current capability and ic power dissipation . . . . . . . . . . . . . . . . . . 23

6.2 Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2/28 Doc ID 15209 Rev 3

L6229Q Block diagram

1 Block diagram

Figure 1. Block diagram

VBOOT V

VCP

DIAG

EN

BRAKE

FWD/REV

H

3

H

2

H

1

BOOT

CHARGE

PUMP

PROTECTION

OCD

HALL-EFFECT

SENSORS

DECODING

LOGIC

THERMAL

OCD1

OCD2

OCD

OCD3

GATE

LOGIC

OCD1

OCD2

V

BOOT

10V

V

BOOT

10V

V

BOOT

VS

A

OUT

OUT

SENSE

VS

B

1

2

A

RCPULSE

TACHO

TACHO

MONOSTABLE

10V

VOLTAGE

REGULATOR

OCD3

10V

5V

ONE SHOT

MONOSTABLE

PWM

MASKING

TIME

SENSE

COMPARATOR

+

-

D99IN1095B

OUT

SENSE

VREF

RCOFF

3

B

Doc ID 15209 Rev 3 3/28

Electrical data L6229Q

2 Electrical data

2.1 Absolute maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Parameter Value Unit

V

V

OD

V

BOOT

, V

V

IN

V

REF

V

RCOFF

V

RCPULSE

V

SENSE

I

S(peak)

I

S

T

, T

stg

S

Supply voltage VSA = VSB = V

Differential voltage between:
VSA, OUT1, OUT2, SENSEA and
VSB, OUT3, SENSE

B

VSA = VSB = VS = 60 V;
V

SENSEA

GND

Bootstrap peak voltage VSA = VSB = V

Logic inputs voltage range -0.3 to +7 V

EN

= V

S

SENSEB

S

Voltage range at pin VREF -0.3 to +7 V

Voltage range at pin RCOFF -0.3 to +7 V

Voltage range at pin RCPULSE -0.3 to +7 V

Voltage range at pins SENSEA and
SENSE

Pulsed supply current (for each VS
pin)

RMS supply current (for each VS pin) VSA = VSB = V

Storage and operating temperature

OP

range

B

= VSB = VS;

V

SA

< 1 ms

T

PULSE

S

2.2 Recommended operating conditions

=

60 V

60 V

VS + 10 V

-1 to +4 V

3.55 A

1.4 A

-40 to 150 °C

Table 3. Recommended operating conditions

Symbol Parameter Parameter Min Max Unit

V

S

V

OD

, V

V

REFA

V

SENSEA,

V

SENSEB

I

OUT

T

J

f

sw

4/28 Doc ID 15209 Rev 3

Supply voltage

Differential voltage between

, OUT1A, OUT2A, SENSEA and

VS

A

, OUT1B, OUT2B, SENSE

VS

B

Voltage range at pins V

REFB

V

REFB

Voltage range at pins SENSEA and
SENSE

B

REFA

B

and

VSA =

VSB = V

VSA =

VSB = VS;

V

SENSEA

= V

SENSEB

(pulsed tW < trr)
(DC)

S

852V

-0.1 5 V

-6

-1

RMS output current 1.4 A

Operating junction temperature -25 +125 °C

Switching frequency 100 kHz

52 V

6
1

V
V

L6229Q Electrical data

2.3 Thermal data

Table 4. Thermal data

Symbol Parameter Value Unit

R

th(JA)

1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6
cm2 ground layer connected through 18 via holes (9 below the IC).

Thermal resistance junction-ambient max.

(1)

42 °C/W

Doc ID 15209 Rev 3 5/28

Pin connection L6229Q

T

3 Pin connection

Figure 2. Pin connection (top view)

NC

OUT1

RCOFF

32 31 30 29 28 27 26 25

124

GND VCP

NC

2

NC

3

NC

4

NC

5

NC

6

SENSEA

DIAG

H1

H3

H2

23

OUT2

22

VSA

21

GND

20

VSB

19

OUT3

NC

7

NC

8

9 10111213141516

NC

TACHO

RCPULSE

Note: 1 The pins 2 to 8 are connected to die PAD.

2 The die PAD must be connected to GND pin.

SENSEB

18

NC

17

VBOO

EN

VREF

FW/REW

BRAKE

6/28 Doc ID 15209 Rev 3

L6229Q Pin connection

Table 5. Pin description

N° Pin Type Function

1, 21 GND GND Ground terminals.

9TACHO

Open drain

output

Frequency-to-voltage open drain output. Every pulse from pin H1 is shaped
as a fixed and adjustable length pulse.

RC network pin. A parallel RC network connected between this pin and

11 RCPULSE RC pin

ground sets the duration of the monostable pulse used for the frequency-to­voltage converter.

Half bridge 3 source Pin. This pin must be connected together with pin

12 SENSE

Power supply

B

SENSEA to power ground through a sensing power resistor. At this pin also
the Inverting Input of the sense comparator is connected.

Selects the direction of the rotation. HIGH logic level sets forward operation,

13 FWD/REV Logic input

whereas LOW logic level sets reverse operation.
If not used, it has to be connected to GND or +5 V.

14 EN Logic input

15 VREF Logic input

Chip enable. LOW logic level switches OFF all power MOSFETs.
If not used, it has to be connected to +5 V.

Current controller reference voltage.
Do not leave this pin open or connect to GND.

Brake input pin. LOW logic level switches ON all high side power MOSFETs,

16 BRAKE Logic input

implementing the brake function.
If not used, it has to be connected to +5 V.

17 VBOOT

19 OUT

20 VS

22 VS

23 OUT

3

B

A

2

Supply
voltage

Bootstrap voltage needed for driving the upper power MOSFETs.

Power output Output half bridge 3.

Power supply

Power supply

Half bridge 3 power supply voltage. It must be connected to the supply
voltage together with pin VS

Half bridge 1 and half bridge 2 power supply voltage. It must be connected to
the supply voltage together with pin VS

Power output Output half bridge 2.

A

24 VCP Output Charge pump oscillator output.

25 H

26 H

27 H

28 DIAG

29 SENSE

30 RCOFF RC pin

Sensor input Single ended hall effect sensor input 2.

2

Sensor input Single ended hall effect sensor input 3.

3

Sensor input Single ended hall effect sensor input 1.

1

Open drain

Power supply

A

output

Overcurrent detection and thermal protection pin. An internal open drain
transistor pulls to GND when an overcurrent on one of the high side
MOSFETs is detected or during thermal protection.

Half bridge 1 and half bridge 2 source pin. This pin must be connected
together with pin SENSE

RC network pin. A parallel RC network connected between this pin and
ground sets the current controller OFF-Time.

to power ground through a sensing power resistor.

B

.

.

B

31 OUT

Power output Output half bridge 1.

1

Doc ID 15209 Rev 3 7/28

Electrical characteristics L6229Q

4 Electrical characteristics

Table 6. Electrical characteristics

(V

= 48 V, TA = 25 °C, unless otherwise specified)

S

Symbol Parameter Test condition Min Typ Max Unit

V

Sth(ON)

V

Sth(OFF)

I

T

j(OFF)

S

Turn-on threshold 5.8 6.3 6.8 V

Turn-off threshold 5 5.5 6 V

Quiescent supply current

All bridges OFF;

= -25 °C to 125 °C

T

J

(1)

510mA

Thermal shutdown temperature 165 °C

Output DMOS transistors

= 25 °C 1.47 1.69 Ω

T

R

DS(on)

I

DSS

High-side + low-side switch ON
resistance

Leakage current

J

T

=125 °C

J

EN = Low; OUT = V

(1)

2.35 2.70 Ω

S

2mA

EN = Low; OUT = GND -0.3 mA

Source drain diodes

V

SD

t

rr

t

fr

Forward ON voltage ISD = 1.4 A, EN = LOW 1.15 1.3 V

Reverse recovery time If = 1.4 A 300 ns

Forward recovery time 200 ns

Logic inputs (EN, CONTROL, HALF/FULL, CLOCK, RESET, CW/CCW)

V

V

I

V

th(ON)

V

th(OFF)

V

th(HYS)

IH

I

IL

IH

Low level logic input voltage -0.3 0.8 V

IL

High level logic input voltage 2 7 V

Low level logic input current GND logic input voltage -10 µA

High level logic input current 7 V logic input voltage 10 µA

Turn-on input threshold 1.8 2.0 V

Turn-off input threshold 0.8 1.3 V

Input threshold hysteresis 0.25 0.5 V

Switching characteristics

t

D(ON)EN

t

D(OFF)EN

t

D(on)IN

t

D(off)IN

t

RISE

t

FAL L

t

DT

Enable to output turn-on delay

(2)

time

Enable to output turn-off delay time

Other logic inputs to OUT turn-ON delay
time

Other logic inputs to OUT turn-OFF
delay time

Output rise time

Output fall time

Dead time 0.5 1 µs

(2)

(2)

(2)

I

= 1.4 A, resistive load

LOAD

500 650 800 ns

500 1000 ns

1.6 µs

800 ns

40 250 ns

40 250 ns

8/28 Doc ID 15209 Rev 3

L6229Q Electrical characteristics

Table 6. Electrical characteristics (continued)

(V

= 48 V, TA = 25 °C, unless otherwise specified)

S

Symbol Parameter Test condition Min Typ Max Unit

f

CP

Charge pump frequency

PWM comparator and monostable

TJ = -25 °C to 125 °C

(1)

0.6 1 MHz

I

RCOFF

V

OFFSET

t

prop

t

blank

t

ON(min)

t

OFF

I

BIAS

Source current at pin RCOFF V

Offset voltage on sense comparator

Turn OFF propagation delay

(4)

(3)

V

V

= 2.5 V 3.5 5.5 mA

RCOFF

= 0.5 V ±5 mV

ref

= 0.5 V 500 ns

ref

Internal blanking time on sense
comparator

Minimum on time 2.5 3 µs

PWM recirculation time

R

OFF

OFF

= 20 kΩ; C

= 100 kΩ; C

= 1 nF 13 μs

OFF

= 1 nF 61 μs

OFF

R

Input bias current at pin VREF 10 µA

Tacho monostable

I

RCPULSE

t

PULSE

R

TAC H O

Source current at pin RCPULSE V

Monostable of time

RCPULSE

R

PUL

R

PUL

= 2.5 V 3.5 5.5 mA

= 20 kΩ; C

= 100 kΩ; C

= 1 nF 12 μs

PUL

= 1 nF 60 μs

PUL

Open drain ON resistance 40 60 W

Over current detection and protection

I

SOVER

R

OPDR

I

OH

t

OCD(ON)

t

OCD(OFF)

1. Tested at 25 °C in a restricted range and guaranteed by characterization

2. See Figure 3.

3. Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin VREF.

4. See Figure 4.

Supply overcurrent protection threshold TJ = -25 to 125 °C

Open drain ON resistance I

OCD high level leakage current V

OCD turn-ON delay time

OCD turn-OFF delay time

(4)

(4)

= 4 mA 40 60 W

DIAG

= 5 V 1 µA

DIAG

I

= 4 mA; C

DIAG

I

= 4 mA; C

DIAG

(2)

< 100 pF 200 ns

DIAG

< 100 pF 100 ns

DIAG

1µs

2 2.8 3.55 A

Doc ID 15209 Rev 3 9/28