ST L6228Q User Manual

L6228Q

DMOS driver for bipolar stepper motor

Features

■Operating supply voltage from 8 to 52 V

■2.8 A output peak current (1.4 A RMS)

■RDS(on) 0.73 Ω typ. value @ TJ = 25 °C

■Operating frequency up to 100 kHz

■Non dissipative overcurrent protection

■Dual independent constant tOFF PWM current controllers

■Fast/slow decay mode selection

■Fast decay quasi-synchronous rectification

■Decoding logic for stepper motor full and half step drive

■Cross conduction protection

■Thermal shutdown

■Undervoltage lockout

■Integrated fast free wheeling diodes

Applications

■ Bipolar stepper motor

Figure 1. Block diagram

VFQFPN32 5 mm x 5 mm

Description

The L6228Q is a DMOS fully integrated stepper motor driver with non-dissipative overcurrent protection, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. The device includes all the circuitry needed to drive a two-phase bipolar stepper motor including: a dual DMOS full bridge, the constant off time PWM current controller that performs the chopping regulation and the phase sequence generator, that generates the stepping sequence. Available in VFQFPN32 5 mm x 5 mm package, the L6228Q features a non-dissipative overcurrent protection on the high side power MOSFETs and thermal shutdown.

VBOOT	VBOOT							VSA
				VBOOT		VBOOT
VCP	CHARGE
	PUMP
			OCDA	OVER
			OCDB	CURRENT
				DETECTION				OUT1A
		THERMAL		10V		10V		OUT2A
	PROTECTION
EN				GATE
CONTROL				LOGIC
								SENSEA
HALF/FULL					PWM
CLOCK	STEPPING			ONE SHOT	MASKING		+
RESET	SEQUENCE			MONOSTABLE	TIME	SENSE	-	VREFA
	GENERATION
						COMPARATOR
CW/CCW
						BRIDGE A		RCA
				OVER				VSB
								OUT1B
	VOLTAGE			CURRENT
	REGULATOR			DETECTION				OUT2B
				GATE				SENSEB
								VREFB
	10V	5V		LOGIC
						BRIDGE B		RCB
							D01IN1225

August 2010

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Contents	L6228Q

Contents

1	Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 3
	1.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	3
	1.2	Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	3
	1.3	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	4
2	Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		5
3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		7
4	Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		11
	4.1	Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
	4.2	Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
	4.3	PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
	4.4	Decay modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
	4.5	Stepping sequence generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
	4.6	Half step mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
	4.7	Normal drive mode (full-step two-phase-on) . . . . . . . . . . . . . . . . . . . . . .	18
	4.8	Wave drive mode (full-step one-phase-on) . . . . . . . . . . . . . . . . . . . . . . .	18
	4.9	Non-dissipative overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
	4.10	Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
5	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23
6	Output current capability and IC power dissipation . . . . . . . . . . . . . .		25
7	Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		27
8	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		28
9	Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		30
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		31

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L6228Q	Electrical data

1 Electrical data

1.1Absolute maximum ratings

Table 1.	Absolute maximum ratings
Symbol		Parameter	Parameter	Value	Unit
VS		Supply voltage	VSA = VSB = VS	60	V
VOD		Differential voltage between	VSA = VSB = VS = 60 V;
		VSA, OUT1A, OUT2A, SENSEA and	VSENSEA = VSENSEB =	60	V
		VSB, OUT1B, OUT2B, SENSEB	GND
VBOOT		Bootstrap peak voltage	VSA = VSB = VS	VS + 10	V
VIN,VEN		Input and enable voltage range		-0.3 to +7	V
VREFA, VREFB		Voltage range at pins VREFA and		-0.3 to +7	V
		VREFB
VRCA, VRCB		Voltage range at pins RCA and RCB		-0.3 to +7	V
VSENSEA,		Voltage range at pins SENSEA and		-1 to +4	V
VSENSEB		SENSEB
		Pulsed supply current (for each VS	VSA = VSB = VS;	3.55	A
IS(peak)		pin), internally limited by the
			tPULSE < 1 ms
		overcurrent protection
IS		RMS supply current (for each VS pin)	VSA = VSB = VS	1.4	A
Tstg, TOP		Storage and operating temperature		-40 to 150	°C
		range

1.2Recommended operating conditions

Table 2.		Recommended operating conditions
Symbol			Parameter	Parameter	Min	Max	Unit
	VS		Supply voltage	VSA = VSB = VS	8	52	V
			Differential voltage between	VSA = VSB = VS;
	VOD		VSA, OUT1A, OUT2A, SENSEA and			52	V
				VSENSEA = VSENSEB
			VSB, OUT1B, OUT2B, SENSEB
VREFA, VREFB			Voltage range at pins VREFA and		-0.1	5	V
			VREFB
V	SENSEA,		Voltage range at pins SENSE and	(pulsed tW < trr)	-6	6	V
			A
VSENSEB			SENSEB	(DC)	-1	1	V
	IOUT		RMS output current			1.4	A
	Tj		Operating junction temperature		-25	+125	°C
	fsw		Switching frequency			100	kHz

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Electrical data	L6228Q

1.3Thermal data

Table 3.	Thermal data
Symbol	Parameter	Value	Unit
Rth(JA)	Thermal resistance junction-ambient max (1).	42	°C/W

1.Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6 cm2 ground layer connected through 18 via holes (9 below the IC).

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L6228Q	Pin connection

2 Pin connection

Figure 2. Pin connection (top view)

Note: 1 The pins 2 to 8 are connected to die PAD.

2 The die PAD must be connected to GND pin.

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	Pin connection			L6228Q
	Table 4.	Pin description
	N°	Pin	Type	Function
	1, 21	GND	GND	Ground terminals.
	9	OUT1B	Power output	Bridge B output 1.
	11	RCB	RC pin	RC network pin. A parallel RC network connected between this pin and
				ground sets the current controller OFF-time of the bridge B.
	12	SENSEB	Power supply	Bridge B source pin. This pin must be connected to power ground through a
				sensing power resistor.
	13	VREFB	Analog input	Bridge B current controller reference voltage.
				Do not leave this pin open or connected to GND.
				Step mode selector. HIGH logic level sets HALF STEP mode, LOW logic level
	14	HALF/FULL	Logic input	sets FULL STEP mode.
				If not used, it has to be connected to GND or +5 V.
				Decay mode selector. HIGH logic level sets SLOW DECAY mode. LOW logic
	15	CONTROL	Logic input	level sets FAST DECAY mode.
				If not used, it has to be connected to GND or +5 V.
				Chip enable. LOW logic level switches OFF all power MOSFETs of both
	16	EN	Logic input (1)	bridge A and bridge B. This pin is also connected to the collector of the
				overcurrent and thermal protection to implement over current protection.
				If not used, it has to be connected to +5 V through a resistor.
	17	VBOOT	Supply	Bootstrap voltage needed for driving the upper power MOSFETs of both
			voltage	bridge A and bridge B.
	19	OUT2B	Power output	Bridge B output 2.
	20	VSB	Power supply	Bridge B power supply voltage. It must be connected to the supply voltage
				together with pin VSA
	22	VSA	Power supply	Bridge A power supply voltage. It must be connected to the supply voltage
				together with pin VSB
	23	OUT2A	Power output	Bridge A output 2.
	24	VCP	Output	Charge pump oscillator output.
				Reset pin. LOW logic level restores the home state (state 1) on the phase
	25	RESET	Logic input	sequence generator state machine.
				If not used, it has to be connected to +5 V.
	26	VREF	Analog Input	Bridge A current controller reference voltage.
		A		Do not leave this pin open or connected to GND.
	27	CLOCK	Logic input	Step clock input. The state machine makes one step on each rising edge.
				Selects the direction of the rotation. HIGH logic level sets clockwise direction,
	28	CW/CCW	Logic input	whereas LOW logic level sets counterclockwise direction.
				If not used, it has to be connected to GND or +5 V.
	29	SENSEA	Power supply	Bridge A source pin. This pin must be connected to power ground through a
				sensing power resistor.
	30	RCA	RC pin	RC network pin. A parallel RC network connected between this pin and
				ground sets the current controller OFF-time of the bridge A.
	31	OUT1A	Power output	Bridge A output 1.

1.Also connected at the output drain of the over current and thermal protection MOSFET. Therefore, it has to be driven putting in series a resistor with a value in the range of 2.2 kΩ - 180 kΩ, recommended 100 kΩ

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L6228Q	Electrical characteristics

3 Electrical characteristics

Table 5.	Electrical characteristics (TA = 25 °C, Vs = 48 V, unless otherwise specified)
Symbol	Parameter		Test condition	Min	Typ		Max	Unit
VSth(ON)	Turn-on threshold			5.8	6.3		6.8	V
VSth(OFF)	Turn-off threshold			5	5.5		6	V
IS	Quiescent supply current		All bridges OFF;		5		10	mA
			(1)
			TJ = -25 °C to 125 °C
Tj(OFF)	Thermal shutdown temperature				165			°C
Output DMOS transistors
RDS(on)	High-side + low-side switch ON		TJ = 25 °C		1.47		1.69	Ω
	resistance		TJ =125 °C (1)		2.35		2.70	Ω
IDSS	Leakage current		EN = Low; OUT = VS				2	mA
			EN = Low; OUT = GND	-0.3				mA
Source drain diodes
VSD	Forward ON voltage		ISD = 1.4 A, EN = LOW		1.15		1.3	V
trr	Reverse recovery time		If = 1.4 A		300			ns
tfr	Forward recovery time				200			ns
Logic inputs (EN, CONTROL, HALF/FULL, CLOCK, RESET, CW/CCW)
VIL	Low level logic input voltage			-0.3			0.8	V
VIH	High level logic input voltage			2			7	V
IIL	Low level logic input current		GND logic input voltage	-10				µA
IIH	High level logic input current		7 V logic input voltage				10	µA
Vth(ON)	Turn-on input threshold				1.8		2.0	V
Vth(OFF)	Turn-off input threshold			0.8	1.3			V
Vth(HYS)	Input threshold hysteresis			0.25	0.5			V
Switching characteristics
tD(ON)EN	Enable to output turn-on delay			500	650		800	ns
	time (2)
t	Enable to output turn-off delay time (2)			500	800		1000	ns
D(OFF)EN			ILOAD =1.4 A, resistive load
tRISE	Output rise time	(2)		40			250	ns
t	Output fall time (2)			40			250	ns
FALL
tDCLK	Clock to output delay time (3)				2			µs
t	Minimum clock time (4)						1	µs
CLK(min)L
t	Minimum clock time (4)						1	µs
CLK(min)H

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Electrical characteristics						L6228Q
Table 5.		Electrical characteristics (continued) (TA = 25 °C, Vs = 48 V, unless otherwise specified)
Symbol		Parameter	Test condition	Min	Typ	Max	Unit
	fCLK	Clock frequency				100	kHz
tS(MIN)		Minimum set-up time(5)				1	µs
tH(MIN)		Minimum hold time (5)				1	µs
tR(MIN)		Minimum reset time (5)				1	µs
t		Minimum reset to clock delay time (5)				1	µs
RCLK(MIN)
	tDT	Dead time protection		0.5	1		µs
	f	Charge pump frequency	T = -25 °C to 125 °C (1)		0.6	1	MHz
	CP		J
PWM comparator and monostable
IRCA, IRCB		Source current at pins RCA and RCB	VRCA = VRCB = 2.5 V	3.5	5.5		mA
Voffset		Offset voltage on sense comparator	VREFA, VREFB = 0.5 V		±5		mV
tPROP		Turn OFF propagation delay (6)			500		ns
tBLANK		Internal blanking time on SENSE pins			1		µs
tON(MIN)		Minimum on time			2.5	3	µs
	tOFF	PWM recirculation time	ROFF = 20 kΩ; COFF = 1 nF		13		µs
			ROFF = 100 kΩ; COFF = 1 nF		61		µs
	IBIAS	Input bias current at pins VREFA and				10	µA
		VREFB
Over current protection
I	SOVER	Input supply overcurrent protection	T = -25 °C to 125 °C (1)		2.8		A
		threshold
			j
ROPDR		Open drain ON resistance	I = 4 mA		40	60	W
tOCD(ON)		OCD turn-on delay time (7)	I = 4 mA; CEN < 100 pF		200		ns
tOCD(OFF)		OCD turn-off delay time (7)	I = 4 mA; CEN < 100 pF		100		ns

1.Tested at 25 °C in a restricted range and guaranteed by characterization

2.See Figure 3.

3.See Figure 4.

4.See Figure 5.

5.See Figure 6.

6.Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin VREF.

7.See Figure 7.

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L6228Q	Electrical characteristics

Figure 3. Switching characteristic definition

EN

Vth(ON)

Vth(OFF)

t

IOUT

90%

10%

t

D01IN1316

tFALL	tRISE
tD(OFF)EN	tD(ON)EN

Figure 4. Clock to output delay time

CLOCK

Vth(ON)

t

IOUT

t

D01IN1317

tDCLK

Figure 5. Minimum timing definition; clock input

CLOCK

Vth(ON)	Vth(OFF)
Vth(OFF)
tCLK(MIN)L	tCLK(MIN)H	D01IN1318

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Electrical characteristics		L6228Q
	Figure 6. Minimum timing definition; logic inputs
	CLOCK	Vth(ON)

LOGIC INPUTS

tS(MIN) tH(MIN)

RESET	Vth(ON)
	Vth(OFF)

tR(MIN)	D01IN1319
	tRCLK(MIN)

Figure 7. Overcurrent detection timing definition

IOUT

ISOVER

ON

BRIDGE

OFF

VEN
90%
10%
tOCD(ON)	D02IN1399
	tOCD(OFF)

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