ST L6226Q User Manual

ST L6226Q User Manual

L6226Q

DMOS dual full bridge driver

Features

Operating supply voltage from 8 to 52 V

2.8 A output peak current (1.4 A DC)

RDS(on) 0.73 Ω typ. value @ TJ = 25 °C

Operating frequency up to 100 kHz

Programmable high side overcurrent detection and protection

Diagnostic output

Paralleled operation

Cross conduction protection

Thermal shutdown

Under voltage lockout

Integrated fast free wheeling diodes

Applications

Bipolar stepper motor

Dual or quad DC motor

Description

The L6226Q is a DMOS dual full bridge designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. Available in QFN32 5x5 package, the L6226Q features thermal shutdown and a non-dissipative overcurrent detection on the high side power MOSFETs plus a diagnostic output that can be easily used to implement the overcurrent protection.

Figure 1. Block diagram

VBOOT VBOOT

VCP

CHARGE

PUMP

 

PROGCLA

 

OVER

OCDA

OCDA

CURRENT

 

 

DETECTION

THERMAL

PROTECTION

ENA

GATE

IN1A

LOGIC

 

IN2A

 

VOLTAGE

10V

 

REGULATOR

5V

VBOOT

VSA

VBOOT

 

OUT1A

10V

OUT2A

10V

 

SENSEA

OCDB

 

BRIDGE A

 

 

 

OVER

 

OCDB

CURRENT

 

 

DETECTION

VSB

PROGCLB

 

 

OUT1B

 

 

ENB

GATE

OUT2B

LOGIC

SENSEB

IN1B

 

 

IN2B

 

BRIDGE B

D99IN1088A

August 2010 Doc ID 14335 Rev 5 1/29

www.st.com

Contents

L6226Q

 

 

Contents

1

Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 3

 

1.1

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3

 

1.2

Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3

 

1.3

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4

2

Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

4

Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

 

4.1

Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

 

4.2

Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

11

 

4.3

Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

 

4.4

Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . .

12

 

4.5

Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

5

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

6

Paralleled operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

19

7

Output current capability and IC power dissipation . . . . . . . . . . . . . .

23

8

Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

24

9

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

25

10

Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

27

11

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

28

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Doc ID 14335 Rev 5

L6226Q

Electrical data

 

 

1 Electrical data

1.1Absolute maximum ratings

Table 1.

Absolute maximum ratings

 

 

 

Symbol

 

Parameter

Parameter

Value

Unit

 

 

 

 

 

 

VS

 

Supply voltage

VSA = VSB = VS

60

V

 

 

Differential voltage between

VSA = VSB = VS = 60 V,

 

 

VOD

 

VSA, OUT1A, OUT2A, SENSEA and

60

V

 

VSENSEA = VSENSEB = GND

 

 

VSB, OUT1B, OUT2B, SENSEB

 

 

 

 

 

 

 

OCDA,OCDB

OCD pins voltage range

 

-0.3 to + 10

V

PROGCLA,

 

PROGCL pins voltage range

 

-0.3 to + 7

V

PROGCLB

 

 

 

 

 

 

 

VBOOT

 

Bootstrap peak voltage

VSA = VSB = VS

VS + 10

V

VIN,VEN

 

Input and enable voltage range

 

-0.3 to + 7

V

VSENSEA,

 

Voltage range at pins SENSEA and

 

-1 to + 4

V

VSENSEB

 

SENSEB

 

 

 

 

 

Pulsed supply current (for each VS

VSA = VSB = VS,

3.55

A

IS(peak)

 

pin), internally limited by the

 

tPULSE < 1 ms

 

 

overcurrent protection

 

 

 

 

 

 

 

 

IS

 

RMS supply current (for each VS pin)

VSA = VSB = VS

1.4

A

Tstg, TOP

 

Storage and operating temperature

 

-40 to 150

°C

 

range

 

1.2Recommended operating conditions

Table 2.

Recommended operating conditions

 

 

 

Symbol

 

Parameter

Parameter

Min

Max

Unit

 

 

 

 

 

 

 

VS

 

Supply voltage

VSA = VSB = VS

8

52

V

 

 

Differential voltage between

VSA = VSB = VS,

 

 

 

VOD

 

VSA, OUT1A, OUT2A, SENSEA and

 

52

V

 

VSENSEA = VSENSEB

 

 

 

VSB, OUT1B, OUT2B, SENSEB

 

 

 

 

 

 

 

 

 

VSENSEA,

 

Voltage range at pins SENSEA and

(pulsed tW < trr)

-6

6

V

VSENSEB

 

SENSEB

(DC)

-1

1

V

IOUT

 

RMS output current

 

 

1.4

A

TJ

 

Operating junction temperature

 

-25

+125

°C

fsw

 

Switching frequency

 

 

100

kHz

Doc ID 14335 Rev 5

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Electrical data

L6226Q

 

 

1.3Thermal data

Table 3.

Thermal data

 

 

Symbol

Parameter

Value

Unit

 

 

 

 

Rth(JA)

Thermal resistance junction-ambient max. (1)

42

°C/W

1.Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6 cm2 ground layer connected through 18 via holes (9 below the IC).

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L6226Q

Pin connection

 

 

2 Pin connection

Figure 2. Pin connection (top view)

Note: 1 The pins 2 to 8 are connected to die PAD.

2 The die PAD must be connected to GND pin.

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Pin connection

 

L6226Q

 

 

 

 

Table 4.

Pin description

 

 

 

 

 

Pin

Type

Function

 

 

 

 

1, 21

GND

GND

Signal ground terminals.

 

 

 

 

9

OUT1B

Power output

Bridge B output 1.

 

 

 

 

 

 

Open drain

Bridge B overcurrent detection and thermal protection pin. An internal open

11

OCDB

drain transistor pulls to GND when overcurrent on bridge B is detected or in

output

 

 

case of thermal protection.

 

 

 

 

 

 

 

12

SENSEB

Power supply

Bridge B source pin. This pin must be connected to power ground directly or

through a sensing power resistor.

 

 

 

 

13

IN1B

Logic input

Bridge B input 1

 

 

 

 

14

IN2B

Logic input

Bridge B input 2

 

 

 

 

 

 

 

Bridge B overcurrent level programming. A resistor connected between this

15

PROGCLB

R pin

pin and ground sets the programmable current limiting value for the bridge B.

By connecting this pin to ground the maximum current is set. This pin cannot

 

 

 

 

 

 

be left non-connected.

 

 

 

 

 

 

 

Bridge B enable. LOW logic level switches OFF all power MOSFETs of

16

ENB

Logic input

bridge B.

 

 

 

If not used, it has to be connected to +5 V.

 

 

 

 

17

VBOOT

Supply

Bootstrap voltage needed for driving the upper power MOSFETs of both

voltage

bridge A and bridge B.

 

 

 

 

 

 

19

OUT2B

Power output

Bridge B output 2.

 

 

 

 

20

VSB

Power supply

Bridge B power supply voltage. It must be connected to the supply voltage

 

 

 

together with pin VSA.

 

 

 

 

22

VSA

Power supply

Bridge A power supply voltage. It must be connected to the supply voltage

together with pin VSB.

 

 

 

 

23

OUT2A

Power output

Bridge A output 2.

 

 

 

 

24

VCP

Output

Charge pump oscillator output.

 

 

 

 

 

 

 

Bridge A enable. LOW logic level switches OFF all power MOSFETs of

25

ENA

Logic input

bridge A.

 

 

 

If not used, it has to be connected to +5 V.

 

 

 

 

 

 

 

Bridge A overcurrent level programming. A resistor connected between this

26

PROGCLA

R pin

pin and ground sets the programmable current limiting value for the bridge A.

By connecting this pin to ground the maximum current is set. This pin cannot

 

 

 

 

 

 

be left non-connected.

 

 

 

 

27

IN1A

Logic input

Bridge A logic input 1.

 

 

 

 

28

IN2A

Logic input

Bridge A logic input 2.

 

 

 

 

29

SENSEA

Power supply

Bridge A source pin. This pin must be connected to power ground directly or

 

 

 

through a sensing power resistor.

 

 

Open drain

Bridge A overcurrent detection and thermal protection pin. An internal open

30

OCDA

drain transistor pulls to GND when overcurrent on bridge A is detected or in

output

 

 

case of thermal protection.

 

 

 

 

 

 

 

31

OUT1A

Power output

Bridge A output 1.

 

 

 

 

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L6226Q

Electrical characteristics

 

 

3 Electrical characteristics

 

TA = 25 °C, Vs = 48 V, unless otherwise specified

 

 

 

 

Table 5.

Electrical characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

 

 

Test condition

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

 

VSth(ON)

Turn-on threshold

 

 

 

5.8

6.3

6.8

V

VSth(OFF)

Turn-off threshold

 

 

 

5

5.5

6

V

IS

Quiescent supply current

All bridges OFF;

 

5

10

mA

T = -25 °C to 125 °C (1)

 

 

 

 

J

 

 

 

 

 

TJ(OFF)

Thermal shutdown temperature

 

 

 

 

165

 

°C

Output DMOS transistors

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RDS(on)

High-side + low-side switch ON

TJ = 25 °C

 

1.47

1.69

Ω

resistance

TJ = 125 °C (1)

 

2.35

2.70

Ω

 

 

IDSS

Leakage current

EN = Low; OUT = VS

 

 

2

mA

EN = Low; OUT = GND

-0.3

 

 

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

Source drain diodes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VSD

Forward ON voltage

ISD = 2.8 A, EN = LOW

 

1.15

1.3

V

trr

Reverse recovery time

If = 1.4 A

 

300

 

ns

tfr

Forward recovery time

 

 

 

 

200

 

ns

Logic input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Low level logic input voltage

 

 

 

-0.3

 

0.8

V

VIH

High level logic input voltage

 

 

 

2

 

7

V

IIL

Low level logic input current

GND logic input voltage

-10

 

 

µA

IIH

High level logic input current

7 V logic input voltage

 

 

10

µA

Vth(ON)

Turn-on input threshold

 

 

 

 

1.8

2.0

V

Vth(OFF)

Turn-off input threshold

 

 

 

0.8

1.3

 

V

Vth(HYS)

Input threshold hysteresis

 

 

 

0.25

0.5

 

V

Switching characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tD(on)EN

Enable to out turn ON delay time (2)

ILOAD =1.4 A, resistive load

500

 

800

ns

tD(on)IN

Input to out turn ON delay time

ILOAD =1.4 A, resistive load

 

1.9

 

µs

(dead time included)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tRISE

Output rise time (2)

ILOAD =1.4 A, resistive load

40

 

250

ns

tD(off)EN

Enable to out turn OFF delay time (2)

ILOAD =1.4 A, resistive load

500

800

1000

ns

tD(off)IN

Input to out turn OFF delay time

ILOAD =1.4 A, resistive load

500

800

1000

ns

t

Output fall time (2)

I

LOAD

=1.4 A, resistive load

40

 

250

ns

FALL

 

 

 

 

 

 

 

Doc ID 14335 Rev 5

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Electrical characteristics

 

 

 

 

L6226Q

 

 

 

 

 

 

 

 

 

 

Table 5.

Electrical characteristics

(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

 

Test condition

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

 

 

tdt

Dead time protection

 

 

0.5

1

 

µs

 

fCP

Charge pump frequency

 

-25 °C < TJ < 125 °C

 

0.6

1

MHz

 

Over current detection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input supply over current detection

-25 °C<TJ<125 °C;RCL=39 kΩ

-10%

0.29

+10%

A

 

Is over

-25 °C<TJ<125 °C;RCL= 5 kΩ

-10%

2.21

+10%

A

 

threshold

 

 

 

 

 

-25 °C<TJ<125 °C;RCL= GND

-30%

2.8

+30%

A

 

ROPDR

Open drain ON resistance

 

I = 4 mA

 

40

60

Ω

 

tOCD(ON)

OCD turn-on delay time(3)

 

I = 4 mA; CEN < 100 pF

 

200

 

ns

 

tOCD(OFF)

OCD turn-off delay time (3)

 

I = 4 mA; CEN < 100 pF

 

100

 

ns

 

1.Tested at 25 °C in a restricted range and guaranteed by characterization.

2.See Figure 3

3.See Figure 4

Figure 3. Switching characteristic definition

(1

9WK 21

9WK 2))

W

,287

W

' ,1

W)$//

W5,6(

W' 2)) (1

W' 21 (1

8/29

Doc ID 14335 Rev 5

L6226Q

Electrical characteristics

 

 

Figure 4. Overcurrent detection timing definition

,287

 

2&'

 

7KUHVKROG

 

 

W

92&'

 

 

 

 

 

 

W

W2&' 21

' ,1

W2&' 2))

Doc ID 14335 Rev 5

9/29

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