ST L6226Q User Manual

Features

■ Operating supply voltage from 8 to 52 V

■ 2.8 A output peak current (1.4 A DC)

■ R

0.73 Ω typ. value @ TJ = 25 °C

DS(on)

■ Operating frequency up to 100 kHz

■ Programmable high side overcurrent detection

and protection

■ Diagnostic output

■ Paralleled operation

■ Cross conduction protection

■ Thermal shutdown

■ Under voltage lockout

■ Integrated fast free wheeling diodes

Applications

■ Bipolar stepper motor

■ Dual or quad DC motor

Figure 1. Block diagram

L6226Q

DMOS dual full bridge driver

Description

The L6226Q is a DMOS dual full bridge designed
for motor control applications, realized in
BCDmultipower technology, which combines
isolated DMOS power transistors with CMOS and
bipolar circuits on the same chip. Available in
QFN32 5x5 package, the L6226Q features
thermal shutdown and a non-dissipative
overcurrent detection on the high side power
MOSFETs plus a diagnostic output that can be
easily used to implement the overcurrent
protection.

VBOOT

VCP

PROGCL

OCD

EN

IN1

IN2

OCD

PROGCL

EN

IN1

IN2

A

A

A

A

A

B

B

B

B

B

V

BOOT

CHARGE

PUMP

VOLTAGE

REGULATOR

OCD

THERMAL

PROTECTION

OCD

10V

5V

VS

V

BOOT

OVER

A

B

CURRENT

DETECTION

GATE

LOGIC

OVER

CURRENT

DETECTION

GATE

LOGIC

10V 10V

V

BOOT

BRIDGE A

BRIDGE B

D99IN1088A

A

OUT1

OUT2

SENSE

V

S

B

OUT1

OUT2

SENSE

A

A

A

B

B

B

August 2010 Doc ID 14335 Rev 5 1/29

www.st.com

29

Contents L6226Q

Contents

1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1 Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2 Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.4 Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . 12

4.5 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6 Paralleled operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7 Output current capability and IC power dissipation . . . . . . . . . . . . . . 23

8 Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

10 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2/29 Doc ID 14335 Rev 5

L6226Q Electrical data

1 Electrical data

1.1 Absolute maximum ratings

Table 1. Absolute maximum ratings

Symbol Parameter Parameter Value Unit

V

S

Supply voltage

Differential voltage between

V

OD

OCD

,OCDBOCD pins voltage range -0.3 to + 10 V

A

PROGCL

PROGCL

V

BOOT

V

IN,VEN

V

SENSEA,

V

SENSEB

VSA, OUT1A, OUT2A, SENSEA and

, OUT1B, OUT2B, SENSE

VS

B

,

A

PROGCL pins voltage range -0.3 to + 7 V

B

B

Bootstrap peak voltage

Input and enable voltage range -0.3 to + 7 V

Voltage range at pins SENSEA and
SENSE

B

Pulsed supply current (for each VS

I

S(peak)

pin), internally limited by the
overcurrent protection

I

S

T

, T

stg

RMS supply current (for each VS pin)

Storage and operating temperature

OP

range

VSA =

VSB = V

VSA =

VSB = VS = 60 V,

V

VSA =

VSA =
t

PULSE

VSA =

SENSEA

VSB = V

VSB = VS,

< 1 ms

VSB = V

= V

S

SENSEB

S

S

1.2 Recommended operating conditions

= GND

60 V

60 V

VS + 10 V

-1 to + 4 V

3.55 A

1.4 A

-40 to 150 °C

Table 2. Recommended operating conditions

Symbol Parameter Parameter Min Max Unit

V

S

V

OD

V

SENSEA,

V

SENSEB

I

OUT

T

J

f

sw

Supply voltage

Differential voltage between

, OUT1A, OUT2A, SENSEA and

VS

A

, OUT1B, OUT2B, SENSE

VS

B

B

Voltage range at pins SENSEA and
SENSE

B

VSA =

VSB = V

VSA =

VSB = VS,

V

SENSEA

= V

SENSEB

(pulsed tW < trr)
(DC)

S

852V

52 V

-6

-1

6
1

RMS output current 1.4 A

Operating junction temperature -25 +125 °C

Switching frequency 100 kHz

Doc ID 14335 Rev 5 3/29

V
V

Electrical data L6226Q

1.3 Thermal data

Table 3. Thermal data

Symbol Parameter Value Unit

R

th(JA)

1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6
cm2 ground layer connected through 18 via holes (9 below the IC).

Thermal resistance junction-ambient max.

(1)

42 °C/W

4/29 Doc ID 14335 Rev 5

L6226Q Pin connection

2 Pin connection

Figure 2. Pin connection (top view)

Note: 1 The pins 2 to 8 are connected to die PAD.

2 The die PAD must be connected to GND pin.

Doc ID 14335 Rev 5 5/29

Pin connection L6226Q

Table 4. Pin description

N° Pin Type Function

1, 21 GND GND Signal ground terminals.

9 OUT1B Power output Bridge B output 1.

11 OCDB

12 SENSEB Power supply

13 IN1B Logic input Bridge B input 1

14 IN2B Logic input Bridge B input 2

15 PROGCLB R pin

16 ENB Logic input

17 VBOOT

19 OUT2B Power output Bridge B output 2.

20 VSB Power supply

22 VSA Power supply

Open drain

output

Supply
voltage

Bridge B overcurrent detection and thermal protection pin. An internal open
drain transistor pulls to GND when overcurrent on bridge B is detected or in
case of thermal protection.

Bridge B source pin. This pin must be connected to power ground directly or
through a sensing power resistor.

Bridge B overcurrent level programming. A resistor connected between this
pin and ground sets the programmable current limiting value for the bridge B.
By connecting this pin to ground the maximum current is set. This pin cannot
be left non-connected.

Bridge B enable. LOW logic level switches OFF all power MOSFETs of
bridge B.

If not used, it has to be connected to +5 V.

Bootstrap voltage needed for driving the upper power MOSFETs of both
bridge A and bridge B.

Bridge B power supply voltage. It must be connected to the supply voltage
together with pin VSA.

Bridge A power supply voltage. It must be connected to the supply voltage
together with pin VSB.

23 OUT2A Power output Bridge A output 2.

24 VCP Output Charge pump oscillator output.

Bridge A enable. LOW logic level switches OFF all power MOSFETs of

25 ENA Logic input

26 PROGCLA R pin

27 IN1A Logic input Bridge A logic input 1.

28 IN2A Logic input Bridge A logic input 2.

29 SENSEA Power supply

30 OCDA

31 OUT1A Power output Bridge A output 1.

6/29 Doc ID 14335 Rev 5

Open drain

output

bridge A.
If not used, it has to be connected to +5 V.

Bridge A overcurrent level programming. A resistor connected between this
pin and ground sets the programmable current limiting value for the bridge A.
By connecting this pin to ground the maximum current is set. This pin cannot
be left non-connected.

Bridge A source pin. This pin must be connected to power ground directly or
through a sensing power resistor.

Bridge A overcurrent detection and thermal protection pin. An internal open
drain transistor pulls to GND when overcurrent on bridge A is detected or in
case of thermal protection.

L6226Q Electrical characteristics

3 Electrical characteristics

TA = 25 °C, Vs = 48 V, unless otherwise specified

Table 5. Electrical characteristics

Symbol Parameter Test condition Min Typ Max Unit

V

Sth(ON)

V

Sth(OFF)

I

T

J(OFF)

S

Turn-on threshold 5.8 6.3 6.8 V

Turn-off threshold 5 5.5 6 V

Quiescent supply current

Thermal shutdown temperature 165 °C

Output DMOS transistors

R

DS(on)

I

DSS

High-side + low-side switch ON
resistance

Leakage current

Source drain diodes

V

SD

t

rr

t

fr

Forward ON voltage ISD = 2.8 A, EN = LOW 1.15 1.3 V

Reverse recovery time If = 1.4 A 300 ns

Forward recovery time 200 ns

Logic input

V

V

I

V

th(ON)

V

th(OFF)

V

th(HYS)

IH

I

IL

IH

Low level logic input voltage -0.3 0.8 V

IL

High level logic input voltage 2 7 V

Low level logic input current GND logic input voltage -10 µA

High level logic input current 7 V logic input voltage 10 µA

Turn-on input threshold 1.8 2.0 V

Turn-off input threshold 0.8 1.3 V

Input threshold hysteresis 0.25 0.5 V

Switching characteristics

t

D(on)EN

t

D(on)IN

t

RISE

t

D(off)EN

t

D(off)IN

t

FAL L

Enable to out turn ON delay time

Input to out turn ON delay time

Output rise time

Enable to out turn OFF delay time

Input to out turn OFF delay time I

Output fall time

(2)

(2)

(2)

All bridges OFF;
TJ = -25 °C to 125 °C

= 25 °C 1.47 1.69 Ω

T

J

T

= 125 °C

J

(1)

EN = Low; OUT = V

(1)

S

510mA

2.35 2.70 Ω

EN = Low; OUT = GND -0.3 mA

I

=1.4 A, resistive load 500 800 ns

LOAD

I

=1.4 A, resistive load

LOAD

(dead time included)

I

LOAD

(2)

I

LOAD

LOAD

I

LOAD

=1.4 A, resistive load 40 250 ns

=1.4 A, resistive load 500 800 1000 ns

=1.4 A, resistive load 500 800 1000 ns

=1.4 A, resistive load 40 250 ns

1.9 µs

2mA

Doc ID 14335 Rev 5 7/29

Electrical characteristics L6226Q

Table 5. Electrical characteristics (continued)

Symbol Parameter Test condition Min Typ Max Unit

t

dt

f

CP

Dead time protection 0.5 1 µs

Charge pump frequency

-25 °C < TJ < 125 °C 0.6 1 MHz

Over current detection

I

s over

R

OPDR

t

OCD(ON)

t

OCD(OFF)

1. Tested at 25 °C in a restricted range and guaranteed by characterization.

2. See Figure 3

3. See Figure 4

Input supply over current detection
threshold

Open drain ON resistance I = 4 mA 40 60 Ω

OCD turn-on delay time

OCD turn-off delay time

(3)

(3)

-25 °C<T

-25 °C<T

-25 °C<TJ<125 °C;RCL= GND

I = 4 mA; CEN < 100 pF 200 ns

I = 4 mA; CEN < 100 pF 100 ns

<125 °C;RCL=39 kΩ

J

<125 °C;RCL= 5 kΩ

J

Figure 3. Switching characteristic definition

(1

9

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287

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-10%

-30%

0.29

2.21

2.8

+10%
+10%
+30%

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A
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8/29 Doc ID 14335 Rev 5

W

'21(1

W

5,6(

W

L6226Q Electrical characteristics

Figure 4. Overcurrent detection timing definition

,

287

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W

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Doc ID 14335 Rev 5 9/29