L6226Q
DMOS dual full bridge driver
Features
■Operating supply voltage from 8 to 52 V
■2.8 A output peak current (1.4 A DC)
■RDS(on) 0.73 Ω typ. value @ TJ = 25 °C
■Operating frequency up to 100 kHz
■Programmable high side overcurrent detection and protection
■Diagnostic output
■Paralleled operation
■Cross conduction protection
■Thermal shutdown
■Under voltage lockout
■Integrated fast free wheeling diodes
Applications
■Bipolar stepper motor
■Dual or quad DC motor
Description
The L6226Q is a DMOS dual full bridge designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. Available in QFN32 5x5 package, the L6226Q features thermal shutdown and a non-dissipative overcurrent detection on the high side power MOSFETs plus a diagnostic output that can be easily used to implement the overcurrent protection.
VBOOT VBOOT
VCP |
CHARGE |
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PUMP |
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PROGCLA |
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OVER |
OCDA |
OCDA |
CURRENT |
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DETECTION |
THERMAL |
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PROTECTION |
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ENA |
GATE |
IN1A |
LOGIC |
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IN2A |
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VOLTAGE |
10V |
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REGULATOR |
5V |
VBOOT |
VSA |
VBOOT |
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OUT1A |
10V |
OUT2A |
10V |
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SENSEA |
OCDB |
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BRIDGE A |
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OVER |
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OCDB |
CURRENT |
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DETECTION |
VSB |
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PROGCLB |
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OUT1B |
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ENB |
GATE |
OUT2B |
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LOGIC |
SENSEB |
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IN1B |
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IN2B |
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BRIDGE B |
D99IN1088A
August 2010 Doc ID 14335 Rev 5 1/29
www.st.com
Contents |
L6226Q |
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Contents
1 |
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 3 |
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1.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
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1.2 |
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
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1.3 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
2 |
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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4 |
Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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4.1 |
Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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4.2 |
Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11 |
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4.3 |
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
12 |
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4.4 |
Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . |
12 |
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4.5 |
Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
16 |
5 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
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6 |
Paralleled operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
19 |
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7 |
Output current capability and IC power dissipation . . . . . . . . . . . . . . |
23 |
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8 |
Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
24 |
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9 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
25 |
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10 |
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
27 |
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11 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
28 |
2/29 |
Doc ID 14335 Rev 5 |
L6226Q |
Electrical data |
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1.1Absolute maximum ratings
Table 1. |
Absolute maximum ratings |
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Symbol |
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Parameter |
Parameter |
Value |
Unit |
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VS |
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Supply voltage |
VSA = VSB = VS |
60 |
V |
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Differential voltage between |
VSA = VSB = VS = 60 V, |
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VOD |
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VSA, OUT1A, OUT2A, SENSEA and |
60 |
V |
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VSENSEA = VSENSEB = GND |
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VSB, OUT1B, OUT2B, SENSEB |
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OCDA,OCDB |
OCD pins voltage range |
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-0.3 to + 10 |
V |
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PROGCLA, |
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PROGCL pins voltage range |
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-0.3 to + 7 |
V |
PROGCLB |
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VBOOT |
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Bootstrap peak voltage |
VSA = VSB = VS |
VS + 10 |
V |
VIN,VEN |
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Input and enable voltage range |
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-0.3 to + 7 |
V |
VSENSEA, |
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Voltage range at pins SENSEA and |
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-1 to + 4 |
V |
VSENSEB |
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SENSEB |
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Pulsed supply current (for each VS |
VSA = VSB = VS, |
3.55 |
A |
IS(peak) |
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pin), internally limited by the |
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tPULSE < 1 ms |
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overcurrent protection |
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IS |
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RMS supply current (for each VS pin) |
VSA = VSB = VS |
1.4 |
A |
Tstg, TOP |
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Storage and operating temperature |
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-40 to 150 |
°C |
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range |
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1.2Recommended operating conditions
Table 2. |
Recommended operating conditions |
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Symbol |
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Parameter |
Parameter |
Min |
Max |
Unit |
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VS |
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Supply voltage |
VSA = VSB = VS |
8 |
52 |
V |
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Differential voltage between |
VSA = VSB = VS, |
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VOD |
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VSA, OUT1A, OUT2A, SENSEA and |
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52 |
V |
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VSENSEA = VSENSEB |
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VSB, OUT1B, OUT2B, SENSEB |
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VSENSEA, |
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Voltage range at pins SENSEA and |
(pulsed tW < trr) |
-6 |
6 |
V |
VSENSEB |
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SENSEB |
(DC) |
-1 |
1 |
V |
IOUT |
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RMS output current |
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1.4 |
A |
TJ |
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Operating junction temperature |
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-25 |
+125 |
°C |
fsw |
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Switching frequency |
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100 |
kHz |
Doc ID 14335 Rev 5 |
3/29 |
Electrical data |
L6226Q |
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1.3Thermal data
Table 3. |
Thermal data |
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Symbol |
Parameter |
Value |
Unit |
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Rth(JA) |
Thermal resistance junction-ambient max. (1) |
42 |
°C/W |
1.Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6 cm2 ground layer connected through 18 via holes (9 below the IC).
4/29 |
Doc ID 14335 Rev 5 |
L6226Q |
Pin connection |
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Note: 1 The pins 2 to 8 are connected to die PAD.
2 The die PAD must be connected to GND pin.
Doc ID 14335 Rev 5 |
5/29 |
Pin connection |
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L6226Q |
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Table 4. |
Pin description |
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N° |
Pin |
Type |
Function |
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1, 21 |
GND |
GND |
Signal ground terminals. |
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9 |
OUT1B |
Power output |
Bridge B output 1. |
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Open drain |
Bridge B overcurrent detection and thermal protection pin. An internal open |
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11 |
OCDB |
drain transistor pulls to GND when overcurrent on bridge B is detected or in |
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output |
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case of thermal protection. |
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12 |
SENSEB |
Power supply |
Bridge B source pin. This pin must be connected to power ground directly or |
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through a sensing power resistor. |
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13 |
IN1B |
Logic input |
Bridge B input 1 |
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14 |
IN2B |
Logic input |
Bridge B input 2 |
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Bridge B overcurrent level programming. A resistor connected between this |
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15 |
PROGCLB |
R pin |
pin and ground sets the programmable current limiting value for the bridge B. |
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By connecting this pin to ground the maximum current is set. This pin cannot |
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be left non-connected. |
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Bridge B enable. LOW logic level switches OFF all power MOSFETs of |
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16 |
ENB |
Logic input |
bridge B. |
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If not used, it has to be connected to +5 V. |
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17 |
VBOOT |
Supply |
Bootstrap voltage needed for driving the upper power MOSFETs of both |
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voltage |
bridge A and bridge B. |
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19 |
OUT2B |
Power output |
Bridge B output 2. |
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20 |
VSB |
Power supply |
Bridge B power supply voltage. It must be connected to the supply voltage |
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together with pin VSA. |
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22 |
VSA |
Power supply |
Bridge A power supply voltage. It must be connected to the supply voltage |
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together with pin VSB. |
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23 |
OUT2A |
Power output |
Bridge A output 2. |
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24 |
VCP |
Output |
Charge pump oscillator output. |
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Bridge A enable. LOW logic level switches OFF all power MOSFETs of |
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25 |
ENA |
Logic input |
bridge A. |
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If not used, it has to be connected to +5 V. |
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Bridge A overcurrent level programming. A resistor connected between this |
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26 |
PROGCLA |
R pin |
pin and ground sets the programmable current limiting value for the bridge A. |
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By connecting this pin to ground the maximum current is set. This pin cannot |
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be left non-connected. |
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27 |
IN1A |
Logic input |
Bridge A logic input 1. |
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28 |
IN2A |
Logic input |
Bridge A logic input 2. |
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29 |
SENSEA |
Power supply |
Bridge A source pin. This pin must be connected to power ground directly or |
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through a sensing power resistor. |
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Open drain |
Bridge A overcurrent detection and thermal protection pin. An internal open |
|
30 |
OCDA |
drain transistor pulls to GND when overcurrent on bridge A is detected or in |
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output |
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case of thermal protection. |
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31 |
OUT1A |
Power output |
Bridge A output 1. |
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6/29 |
Doc ID 14335 Rev 5 |
L6226Q |
Electrical characteristics |
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TA = 25 °C, Vs = 48 V, unless otherwise specified |
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Table 5. |
Electrical characteristics |
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Symbol |
Parameter |
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Test condition |
Min |
Typ |
Max |
Unit |
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VSth(ON) |
Turn-on threshold |
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5.8 |
6.3 |
6.8 |
V |
VSth(OFF) |
Turn-off threshold |
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5 |
5.5 |
6 |
V |
IS |
Quiescent supply current |
All bridges OFF; |
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5 |
10 |
mA |
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T = -25 °C to 125 °C (1) |
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J |
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TJ(OFF) |
Thermal shutdown temperature |
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165 |
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°C |
Output DMOS transistors |
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RDS(on) |
High-side + low-side switch ON |
TJ = 25 °C |
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1.47 |
1.69 |
Ω |
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resistance |
TJ = 125 °C (1) |
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2.35 |
2.70 |
Ω |
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IDSS |
Leakage current |
EN = Low; OUT = VS |
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2 |
mA |
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EN = Low; OUT = GND |
-0.3 |
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mA |
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Source drain diodes |
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VSD |
Forward ON voltage |
ISD = 2.8 A, EN = LOW |
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1.15 |
1.3 |
V |
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trr |
Reverse recovery time |
If = 1.4 A |
|
300 |
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ns |
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tfr |
Forward recovery time |
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200 |
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ns |
Logic input |
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VIL |
Low level logic input voltage |
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-0.3 |
|
0.8 |
V |
VIH |
High level logic input voltage |
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2 |
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7 |
V |
IIL |
Low level logic input current |
GND logic input voltage |
-10 |
|
|
µA |
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IIH |
High level logic input current |
7 V logic input voltage |
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|
10 |
µA |
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Vth(ON) |
Turn-on input threshold |
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1.8 |
2.0 |
V |
Vth(OFF) |
Turn-off input threshold |
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0.8 |
1.3 |
|
V |
Vth(HYS) |
Input threshold hysteresis |
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0.25 |
0.5 |
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V |
Switching characteristics |
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tD(on)EN |
Enable to out turn ON delay time (2) |
ILOAD =1.4 A, resistive load |
500 |
|
800 |
ns |
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tD(on)IN |
Input to out turn ON delay time |
ILOAD =1.4 A, resistive load |
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1.9 |
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µs |
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(dead time included) |
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tRISE |
Output rise time (2) |
ILOAD =1.4 A, resistive load |
40 |
|
250 |
ns |
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tD(off)EN |
Enable to out turn OFF delay time (2) |
ILOAD =1.4 A, resistive load |
500 |
800 |
1000 |
ns |
||
tD(off)IN |
Input to out turn OFF delay time |
ILOAD =1.4 A, resistive load |
500 |
800 |
1000 |
ns |
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t |
Output fall time (2) |
I |
LOAD |
=1.4 A, resistive load |
40 |
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250 |
ns |
FALL |
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Doc ID 14335 Rev 5 |
7/29 |
Electrical characteristics |
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L6226Q |
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Table 5. |
Electrical characteristics |
(continued) |
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Symbol |
Parameter |
|
Test condition |
Min |
Typ |
Max |
Unit |
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tdt |
Dead time protection |
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0.5 |
1 |
|
µs |
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fCP |
Charge pump frequency |
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-25 °C < TJ < 125 °C |
|
0.6 |
1 |
MHz |
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Over current detection |
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Input supply over current detection |
-25 °C<TJ<125 °C;RCL=39 kΩ |
-10% |
0.29 |
+10% |
A |
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Is over |
-25 °C<TJ<125 °C;RCL= 5 kΩ |
-10% |
2.21 |
+10% |
A |
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threshold |
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-25 °C<TJ<125 °C;RCL= GND |
-30% |
2.8 |
+30% |
A |
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ROPDR |
Open drain ON resistance |
|
I = 4 mA |
|
40 |
60 |
Ω |
|
tOCD(ON) |
OCD turn-on delay time(3) |
|
I = 4 mA; CEN < 100 pF |
|
200 |
|
ns |
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tOCD(OFF) |
OCD turn-off delay time (3) |
|
I = 4 mA; CEN < 100 pF |
|
100 |
|
ns |
|
1.Tested at 25 °C in a restricted range and guaranteed by characterization.
2.See Figure 3
3.See Figure 4
(1
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8/29 |
Doc ID 14335 Rev 5 |
L6226Q |
Electrical characteristics |
|
|
,287 |
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2&' |
|
7KUHVKROG |
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W |
92&' |
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Doc ID 14335 Rev 5 |
9/29 |