ST L6208 User Manual

DMOS DRIVER FOR BIPOLAR STEPPER MOTOR

■

OPERATING SUPPLY VOLTAGE FROM 8 TO 52V

■ 5.6A OUTPUT PEAK CURRENT (2.8A RMS)

■ R

■ OPERATING FREQUENCY UP TO 100KHz

■ NON DISSIPATIVE OVERCURRENT

PROTECTION

■ DUAL INDEPENDENT CONSTANT t

CURRENT CONTROLLERS

■ FAST/SLOW DECAY MODE SELECTION

■ FAST DECAY QUASI-SYNCHRONOUS

RECTIFICATION

■ DECODING LOGIC FOR STEPPER MOTOR

FULL AND HALF STEP DRIVE

■ CROSS CONDUCTION PROTECTION

■ THERMAL SHUTDOWN

■ UNDER VOLTAGE LOCKOUT

■

INTEGRATED FAST FREE WHEELING DIODES

TYPICAL APPLICATIONS

■ BIPOLAR STEPPER MOTOR

DESCRIPTION

The L6208 is a DMOS Fully Integrated Stepper Motor
Driver with non-dissipative Overcurrent Protection,
realized in MultiPower-BCD technology, which com-

BLOCK DIAGRAM

0.3Ω TYP. VA LUE @ Tj = 25°C

DS(ON)

OFF

PWM

L6208

PowerDIP24

PowerSO36

(20+2+2)

ORDERING NUMBERS:

L6208N (PowerDIP24)
L6208PD (PowerSO36)
L6208D (SO24)

bines isolated DMOS Power Transistors with CMOS
and bipolar circuits on the same chip. The device in­cludes all the circuitry needed to drive a two-phase
bipolar stepper motor including: a dual DMOS Full
Bridge, the constan t off tim e PWM Current C ontroller
that performs the chopping regulation and the Phase
Sequence Generator, that generates the stepping
sequence. Available in PowerDIP24 (20+2+2),
PowerSO36 and SO24 (20+2+2) packages, the
L6208 features a non-dissipative overcurrent protec­tion on the high side Power MOSFETs and thermal
shutdown.

SO24

(20+2+2)

September 2003

VBOOT

VCP

CONTROL

HALF/FULL

CLOCK
RESET

CW/CCW

V

BOOT

CHARGE

PUMP

THERMAL

EN

PROTECTION

STEPPING

SEQUENCE

GENERATION

VOLTAGE

REGULAT OR

5V10V

OCD

OCD

A

B

OVER

CURRENT

DETECTION

GATE

LOGIC

OVER

CURRENT

DETECTION

GATE

LOGIC

V

BOOT

10V 10V

ONE SHOT

MONOSTABLE

MASKING

PWM

TIME

V

BOOT

SENSE

COMPARATOR

BRIDGE A

BRIDGE B

+

-

D01IN1225

VS

A

OUT1
OUT2

SENSE

VREF

RC

A

VS

B

OUT1
OUT2
SENSE
VREF
RC

B

A
A

A

A

B
B

B

B

1/27

L6208

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Test conditions Value Unit

V

S

V

OD

V

BOOT

V

IN,VEN

V

REFA

V

REFB

V

RCA, VRCB

V

SENSEA,

V

SENSEB

I

S(peak)

I

S

, T

T

stg

Supply Voltage
Differential Voltage between

VSA, OUT1A, OUT2A, SENSEA and
VSB, OUT1B, OUT2B, SENSE

Bootstrap Peak Voltage

VSA =

VSB = V

VSA =

VSB = VS = 60V;

V

SENSEA

B

VSA =

VSB = V

= V

S

SENSEB

S

= GND

60 V
60 V

VS + 10 V

Input and Enable Voltage Range -0.3 to +7 V

,

Voltage Range at pins V
and V

REFB

REFA

Voltage Range at pins RCA and
RC

B

Voltage Range at pins SENSEA
and SENSE

B

Pulsed Supply Current (for each

pin), internally limited by the

V

S

VSA =
t

PULSE

VSB = VS;

< 1ms

-0.3 to +7 V

-0.3 to +7 V

-1 to +4 V

7.1 A

overcurrent protection
RMS Supply Current (for each

pin)

V

S

Storage and Operating

OP

VSA =

VSB = V

S

2.8 A

-40 to 150 °C

Temperature Range

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Test Conditions MIN MAX Unit

V

V

OD

V

REFA

V

REFB

V

SENSEA,

V

SENSEB

I

OUT

T

f

sw

Supply Voltage

S

Differential Voltage Between
VSA, OUT1A, OUT2A, SENSEA and
VSB, OUT1B, OUT2B, SENSE

,

Voltage Range at pins V
and V

REFB

Voltage Range at pins SENSEA
and SENSE

B

REFA

VSA =
VSA =

V

SENSEA

B

(pulsed tW < trr)
(DC)

VSB = V
VSB = VS;

= V

SENSEB

S

852V

-0.1 5 V

-6

-1
RMS Output Current 2.8 A
Operating Junction Temperature -25 +125 °C

j

Switching Frequency 100 KHz

52 V

6
1

V
V

2/27

L6208

THERMA L D ATA

Symbol Description PowerDIP24 SO24 PowerSO36 Unit

R

th-j-pins

R

th-j-case

R

th-j-amb1

R

th-j-amb1

R

th-j-amb1

R

th-j-amb2

(1) Mounted on a multi-layer FR4 PCB with a dissipati ng copper surface on the bottom side of 6cm2 (with a thickness of 35µm).
(2) Mounted on a multi-layer FR4 PCB with a dissipati ng copper surface on the top side of 6cm2 (with a thic kness of 35µm ).
(3) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35µm), 16 via holes

and a groun d l ayer.

(4) Mounted on a multi-layer FR4 PCB without any hea t s i nking surfac e on the board.

Maximum Thermal Resistance Junction-Pins 18 14 - °C/W
Maximum Thermal Resistance Junction-Case - - 1 °C/W

Maximum Thermal Resistance Junction-Ambient
Maximum Thermal Resistance Junction-Ambient
Maximum Thermal Resistance Junction-Ambient
Maximum Thermal Resistance Junction-Ambient

(1)

(2)

(3)

(4)

43 51 - °C/W

--35°C/W

--15°C/W

58 77 62 °C/W

PIN CONNECTIONS (Top View)

RC

GND
GND

RC

1
2
3

A

4

A

5

A

6
7
8

B

9

B

10

B

11

B

12

D99IN1083

CLOCK

CW/CCW

SENSE

OUT1

OUT1

SENSE

VREF

HALF/FULL

PowerDIP24/SO24

(5) The slug is internally connected to pins 1,18,19 and 36 (GND pins).

VREF

24
23
22
21
20

18
17
16
15
14
13

A

RESET
VCP
OUT2

A

VS

A

GND19
GND
VS

B

OUT2

B

VBOOT
EN
CONTROL

GND

N.C.
N.C.

VS

OUT2

N.C. N.C.
VCP

RESET

VREF

CLOCK

CW/CCW

SENSE

RC
N.C.

OUT1

N.C.
N.C. N.C.

GND GND

1
2
3
4

A

5

A

6
7
8
9

A

10 27
11
12

A

13 24

A

14
15

A

16
17
18

D99IN1084

PowerSO36

36
35
34
33
32
31
30
29
28

26
25

23
22
21
20
19

(5)

GND
N.C.
N.C.
VS

B

OUT2

B

VBOOT
EN
CONTROL
HALF/FULL
VREF

B

SENSE

B

RC

B

N.C.
OUT1

B

N.C.

3/27

L6208

PIN DESCRIPTION

PACKAGE

SO24/

PowerDIP24

PowerSO36

Name Type Function

PIN # PIN #

1 10 CLOCK Logic Input Step Clock input. The state machine makes one step on

each rising edge.

2 11 CW/CCW Logic Input Selects the direction of the rotation. HIGH logic level sets

clockwise direction, whereas LOW logic level sets
counterclockwise direction.
If not used, it has to be connected to GND or +5V.

3 12 SENSE

Power Supply Bridge A Source Pin. This pin must be connected to Power

A

Ground through a sensing power resistor.

413RC

A

RC Pin RC Network Pin. A parallel RC network connected

between this pin and ground sets the Current Controller
OFF-Time of the Bridge A.

5 15 OUT1

6, 7,

18, 19

1, 18,

19, 36

GND GND Ground terminals. In PowerDIP24 and SO24 packages,

Power Output Bridge A Output 1.

A

these pins are also used for heat dissipation toward the
PCB. On PowerSO36 package the slug is connected to

these pins.
8 22 OUT1
924RC

Power Output Bridge B Output 1.

B

B

RC Pin RC Network Pin. A parallel RC network connected

between this pin and ground sets the Current Controller

OFF-Time of the Bridge B.

10 25 SENSE

Power Supply Bridge B Source Pin. This pin must be connected to Power

B

Ground through a sensing power resistor.

11 26 VREF

Analog Input Bridge B Current Controller Reference Voltage.

B

Do not leave this pin open or connected to GND.

12 27 HALF/FULL Logic Input Step Mode Selector. HIGH logic level sets HALF STEP

Mode, LOW logic level sets FULL STEP Mode.

If not used, it has to be connected to GND or +5V.

13 28 CONTROL Logic Input Decay Mode Selector. HIGH logic level sets SLOW DECAY

Mode. LOW logic level sets FAST DECAY Mode.

If not used, it has to be connected to GND or +5V.

(6)

14 29 EN

Logic Input

Chip Enable. LOW logic level switches OFF all Power

MOSFETs of both Bridge A and Bridge B. This pin is also

connected to the collector of the Overcurrent and Thermal

Protection to implement over current protection.

If not used, it has to be connected to +5V through a

resistor.

15 30 VBOOT Supply

Voltage
16 32 OUT2
17 33 VS

20 4 VS

Power Output Bridge B Output 2.

B

Power Supply Bridge B Power Supply Voltage. It must be connected to

B

Power Supply Bridge A Power Supply Voltage. It must be connected to

A

Bootstrap Voltage needed for driving the upper Power
MOSFETs of both Bridge A and Bridge B.

the Supply Voltage together with pin VS

the Supply Voltage together with pin VS

A

B

4/27

L6208

PIN DESCRIPTION

(continued)

PACKAGE

SO24/

PowerDIP24

PowerSO36

Name Type Function

PIN # PIN #

21 5 OUT2

Power Output Bridge A Output 2.

A

22 7 VCP Output Charge Pump Oscillator Output.
23 8 RESET Logic Input Reset Pin. LOW logic level restores the

Home

State
(State 1) on the Phase Sequence Generator State
Machine.
If not used, it has to be connected to +5V.

24 9 VREF

Analog Input Bridge A Current Controller Reference Voltage.

A

Do not leave this pin open or connected to GND.

(6) Also connected at the output drain of the Over current and Thermal protection MOSFET. Therefore, it has to be driven putting in series

a resistor with a value in the range of 2.2KΩ - 180KΩ, recommended 100KΩ.

ELECTRICAL CHARACTERISTICS

(T

= 25°C, Vs = 48V, unless otherwise specified)

amb

Symbol Parameter Test Conditions Min Typ Max Unit

V

Sth(ON)

V

Sth(OFF)

Turn-on Threshold 6.6 7 7.4 V
Turn-off Threshold 5.6 6 6.4 V

I

Quiescent Supply Current All Bridges OFF;

S

T

j(OFF)

= -25°C to 125°C

T

j

Thermal Shutdown Temperature 165 °C

(7)

Output DMOS Transistors

R

DS(ON)

I

High-Side Switch ON Resistance Tj = 25 °C 0.34 0.4 Ω

T

=125 °C

j

Low-Side Switch ON Resistance T

Leakage Current EN = Low; OUT = V

DSS

= 25 °C 0.28 0.34 Ω

j

T

=125 °C

j

(7)

(7)

S

EN = Low; OUT = GND -0.15 mA

Source Drain Diodes

V

Forward ON Voltage ISD = 2.8A, EN = LOW 1.15 1.3 V

SD

t

Reverse Recovery Time If = 2.8A 300 ns

rr

Forward Recovery Time 200 ns

t

fr

Logic Inputs (EN, CONTROL, HALF/FULL, CLOCK, RESET, CW/CCW)

V

Low level logic input voltage -0.3 0.8 V

IL

510mA

0.53 0.59 Ω

0.47 0.53 Ω

2mA

V

High level logic input voltage 2 7 V

IH

5/27

L6208

ELECTRICAL CHARACTERISTICS (continued)

(T

= 25°C, Vs = 48V, unless otherwise specified)

amb

Symbol Parameter Test Conditions Min Typ Max Unit

I

Low Level Logic Input Current GND Logic Input Voltage -10 µA

IL

I

High Level Logic Input Current 7V Logic Input Voltage 10 µA

IH

V

th(ON)

V

th(OFF)

V

th(HYS)

Turn-on Input Threshold 1.8 2.0 V
Turn-off Input Threshold 0.8 1.3 V
Input Threshold Hysteresis 0.25 0.5 V

Switching Characteristics

t

D(ON)EN

t

D(OFF)EN

t

RISE

t

FALL

t

DCLK

t

CLK(min)L

t

CLK(min)

f

t

S(MIN)

t

H(MIN)

t

R(MIN)

Enable to Output Turn-on Delay

(8)

Time
Enable to Output Turn-off Delay

(8)

Time
Output Rise Time
Output Fall Time
Clock to Output Delay Time
Minimum Clock Time
Minimum Clock Time

H

Clock Frequency 100 KHz

CLK

Minimum Set-up Time
Minimum Hold Time
Minimum Reset Time

(8)

(8)

(10)

(10)

(11)

(11)

(11)

(9)

I

=2.8A, Resistive Load 100 250 400 ns

LOAD

I

=2.8A, Resistive Load 300 550 800 ns

LOAD

I

=2.8A, Resistive Load 40 250 ns

LOAD

I

=2.8A, Resistive Load 40 250 ns

LOAD

I

=2.8A, Resistive Load 2 µs

LOAD

1µs
1µs

1µs
1µs
1µs

t

RCLK(MIN

Minimum Reset to Clock Delay

)

t

DT

f

CP

(11)

Time
Dead Time Protection 0.5 1 µs

Charge Pump Frequency

PWM Comparator and Monostable

I

RCA, IRCB

V

Source Current at pins RCA and
RC

B

Offset Voltage on Sense

offset

Comparator

t

PROP

t

BLANK

Turn OFF Propagation Delay
Internal Blanking Time on

SENSE pins

t

ON(MIN)

Minimum On Time 1.5 2 µs

6/27

1µs

Tj = -25°C to 125°C

V

= V

RCA

V

REFA, VREFB

(12)

RCB

(7)

0.6 1 MHz

= 2.5V 3.5 5.5 mA

= 0.5V ±5 mV

500 ns

1µs

L6208

ELECTRICAL CHARACTERISTICS (continued)

(T

= 25°C, Vs = 48V, unless otherwise specified)

amb

Symbol Parameter Test Conditions Min Typ Max Unit

t

I

BIAS

PWM Recirculation Time R

OFF

Input Bias Current at pins VREFA

OFF

R

OFF

= 20KΩ; C
= 100KΩ; C

OFF

OFF

= 1nF

= 1nF

and VREFB

Over Current Protection

I

SOVER

R

OPDR

t

OCD(ON)

t

OCD(OFF)

(7) Tested at 25°C in a restricted range and guaranteed by characterization.
(8) See Fig. 1.
(9) See Fig. 2.
(10) See Fig. 3.
(11) See Fig. 4.
(12) Measured applyin g a voltage of 1V to pi n SENSE and a voltage drop fr om 2V to 0V to pin VR EF.
(13) See Fig. 5.

Input Supply Overcurrent
Protection Threshold

= -25°C to 125°C

T

j

Open Drain ON Resistance I = 4mA 40 60 Ω
OCD Turn-on Delay Time (13) I = 4mA; CEN < 100pF 200 ns
OCD Turn-off Delay Time (13) I = 4mA; CEN < 100pF 100 ns

(7)

4 5.6 7.1 A

Figure 1. Switching Characteristic Definition

EN

13
61

µs
µs

10 µA

V

th(ON)

V

th(OFF)

I

OUT

90%

10%

D01IN1316

t

D(OFF)EN

t

FALL

t

D(ON)EN

t

RISE

t

t

7/27

L6208

Figure 2. Clock to Output Delay Time

CLOCK

I

OUT

V

th(ON)

t

D01IN1317

Figure 3. Minimum Timing Definition; Clock Input

CLOCK

V

V

th(OFF)

th(ON)

t

CLK(MIN)L

Figure 4. Minimum Timing Definition; Logic Inputs

CLOCK

LOGIC INPUTS

V

th(ON)

t

V

th(OFF)

t

CLK(MIN)H

t

DCLK

D01IN1318

8/27

RESET

V

th(OFF)

V

th(ON)

t

R(MIN)

t

S(MIN)

t

RCLK(MIN)

t

H(MIN)

D01IN1319

Figure 5. Ove rcurrent Detect i on Timi ng Definition

I

OUT

I

SOVER

ON

BRIDGE

OFF

V

EN

90%

10%

L6208

t

OCD(ON)

t

OCD(OFF)

D02IN1399

CIRCUIT DESCRIPTION

POWER STAGES and CHARGE PUMP

The L6208 integrates two independent Power MOS Full Bridges. Each Power MOS has an R

DS(ON)

= 0.3Ω (typ­ical value @ 25°C), with i ntrinsic fast freew heeling diode. Switchi ng patterns are generated by the PWM Current
Controller and the Phase Sequence Generator (see below). Cross conduction protection is achieved using a
dead time (t

= 1µs typical value) between the sw itch off and s witch on of tw o Power MOSFETSs in one leg of

DT

a bridge.
Pins VS

voltage in the range from 8V to 52V. It has to be noticed that the R

and VSB MUST be connected together to the supply voltage VS. The device operates with a supply

A

increases of some percents when the

DS(ON)

supply voltage is in the range from 8V to 12V (see Fig. 34 and 35).
Using N-Channel Power MOS for the upper transistors in the bridge requires a gate drive voltage above the

power supply vol tage. The bootstrapped supply voltage V

is obtained through an internal Oscillator and few

BOOT

external components to realize a charge pump circuit as shown in Figure 6. The oscillator output (VCP) is a
square wave at 600KHz (typic al) with 10V amplitud e. Recommended va lues/part number s for the c harge pump
circuit are shown in Table 1.

Table 1. Charge Pump External Components Values

C

BOOT

C

P

R

P

D1 1N4148
D2 1N4148

220nF
10nF
100Ω

9/27