L6207Q
DMOS dual full bridge driver
Features
■Operating supply voltage from 8 to 52 V
■5.6 A output peak current
■RDS(on) 0.3 Ω typ. value @ TJ = 25 °C
■Operating frequency up to 100 kHz
■Non-dissipative overcurrent protection
■Dual independent constant tOFF PWM current controllers
■Slow decay synchronous rectification
■Cross conduction protection
■Thermal shutdown
■Undervoltage lockout
■Integrated fast freewheeling diodes
Applications
■Bipolar stepper motor
■Dual or quad DC motor
QFN-48 (7 x 7 mm)
Description
The L6207Q is a DMOS dual full bridge designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. The device also includes two independent constant OFF time PWM current controllers that perform the chopping regulation. Available in QFN48 7x7 package, the L6207Q features thermal shutdown and a non-dissipative overcurrent detection on the high-side Power MOSFETs.
VBOOT |
VBOOT |
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VSA |
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VBOOT |
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VBOOT |
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CHARGE |
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VCP |
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PUMP |
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OCDA |
OVER |
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CURRENT |
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DETECTION |
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OUT1A |
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THERMAL |
10V |
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10V |
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OUT2A |
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PROTECTION |
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ENA |
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GATE |
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IN1A |
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LOGIC |
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SENSEA |
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IN2A |
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VOLTAGE |
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PWM |
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REGULATOR |
ONE SHOT |
MASKING |
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MONOSTABLE |
TIME |
SENSE |
- |
VREFA |
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COMPARATOR |
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10V |
5V |
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RCA |
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BRIDGE A |
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OVER |
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VSB |
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OUT1B |
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OCDB |
CURRENT |
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DETECTION |
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OUT2B |
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GATE |
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SENSEB |
ENB |
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VREFB |
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LOGIC |
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IN1B |
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RCB |
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IN2B |
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BRIDGE B |
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AM02555v1
November 2011 |
Doc ID 018993 Rev 2 |
1/28 |
www.st.com
Contents |
L6207Q |
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Contents
1 |
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 3 |
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1.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
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1.2 |
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
2 |
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
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3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4 |
Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.1 |
Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.2 |
Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.3 |
PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.4 |
Slow decay mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.5 |
Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . |
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4.6 |
Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Output current capability and IC power dissipation . . . . . . . . . . . . . . |
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7 |
Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8 |
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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10 |
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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11 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
27 |
2/28 |
Doc ID 018993 Rev 2 |
L6207Q |
Electrical data |
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1.1Absolute maximum ratings
Table 1. |
Absolute maximum ratings |
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Symbol |
Parameter |
Parameter |
Value |
Unit |
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VS |
Supply voltage |
VSA = VSB = VS |
60 |
V |
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VOD |
Differential voltage between VSA, |
VSA = VSB = VS = 60 V; |
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OUT1A, OUT2A, SENSEA and VSB, |
VSENSEA = VSENSEB = |
60 |
V |
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OUT1B, OUT2B, SENSEB |
GND |
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VBOOT |
Bootstrap peak voltage |
VSA = VSB = VS |
VS + 10 |
V |
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VIN,VEN |
Input and enable voltage range |
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-0.3 to +7 |
V |
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VREFA, |
Voltage range at pins VREFA and VREFB |
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-0.3 to +7 |
V |
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VREFB |
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VRCA,VRCB |
Voltage range at pins RCA and RCB |
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-0.3 to +7 |
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VSENSEA, |
Voltage range at pins SENSEA and |
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-1 to +4 |
V |
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VSENSEB |
SENSEB |
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Pulsed supply current (for each VS |
VSA = VSB = VS; |
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IS(peak) |
pin), internally limited by the |
7.1 |
A |
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tPULSE < 1 ms |
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overcurrent protection |
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IS |
RMS supply current (for each VS pin) |
VSA = VSB = VS |
2.5 |
A |
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Tstg, TOP |
Storage and operating temperature |
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-40 to 150 |
°C |
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range |
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1.2Recommended operating conditions
Table 2. |
Recommended operating conditions |
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Symbol |
Parameter |
Parameter |
Min. |
Max. |
Unit |
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VS |
Supply voltage |
VSA = VSB = VS |
8 |
52 |
V |
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Differential voltage between VSA, |
VSA = VSB = VS; |
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VOD |
OUT1A, OUT2A, SENSEA and VSB, |
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52 |
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VSENSEA = VSENSEB |
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OUT1B, OUT2B, SENSEB |
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VSENSEA, |
Voltage range at pins SENSEA and |
Pulsed tW < trr |
-6 |
6 |
V |
VSENSEB |
SENSEB |
DC |
-1 |
1 |
V |
IOUT |
RMS output current |
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2.5 |
A |
Tj |
Operating junction temperature |
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-25 |
+125 |
°C |
fsw |
Switching frequency |
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100 |
kHz |
Doc ID 018993 Rev 2 |
3/28 |
Pin connection |
L6207Q |
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RCA |
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NC |
SENSEA |
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SENSEA |
IN2A |
IN1A |
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VREFA |
ENA |
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VCP |
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OUT2A |
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OUT2A |
NC |
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48 |
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46 |
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42 |
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41 |
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40 |
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39 |
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38 |
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37 |
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NC |
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NC |
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1 |
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36 |
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OUT1A |
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2 |
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EPAD |
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35 |
VSA |
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OUT1A |
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VSA |
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3 |
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34 |
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NC |
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NC |
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33 |
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NC |
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NC |
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5 |
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32 |
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GND |
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GND |
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6 |
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31 |
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NC |
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NC |
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7 |
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30 |
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NC |
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NC |
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8 |
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29 |
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NC |
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NC |
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9 |
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28 |
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OUT1B |
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VSB |
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10 |
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27 |
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OUT1B |
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VSB |
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11 |
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26 |
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NC |
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NC |
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25 |
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13 |
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14 |
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15 |
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16 |
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24 |
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RCB |
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NC |
SENSEB |
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SENSEB |
IN1B |
IN2B |
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VREFB |
ENB |
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VBOOT |
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OUT2B |
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OUT2B |
NC |
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AM02556v1 |
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Note: |
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The exposed PAD must be connected to GND pin. |
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Table 3. |
Pin description |
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Pin |
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Name |
Type |
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Function |
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43 |
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IN1A |
Logic input |
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Bridge A logic input 1. |
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44 |
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IN2A |
Logic input |
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Bridge A logic input 2. |
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45, 46 |
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SENSEA |
Power supply |
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Bridge A source pin. This pin must be connected to power ground |
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through a sensing power resistor. |
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48 |
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RCA |
RC pin |
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RC network pin. A parallel RC network connected between this pin and |
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ground sets the current controller OFF time of bridge A. |
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2, 3 |
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OUT1A |
Power output |
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Bridge A output 1. |
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6, 31 |
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GND |
GND |
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Signal ground terminals. These pins are also used for heat dissipation |
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toward the PCB. |
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10, 11 |
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OUT1B |
Power output |
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Bridge B output 1. |
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RCB |
RC pin |
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RC network pin. A parallel RC network connected between this pin and |
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ground sets the current controller OFF time of bridge B. |
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15, 16 |
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SENSEB |
Power supply |
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Bridge B source pin. This pin must be connected to power ground |
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through a sensing power resistor. |
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17 |
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IN1B |
Logic input |
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Bridge B input 1 |
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4/28 |
Doc ID 018993 Rev 2 |
L6207Q |
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Pin connection |
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Table 3. |
Pin description (continued) |
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Pin |
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Name |
Type |
Function |
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18 |
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IN2B |
Logic input |
Bridge B input 2 |
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19 |
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VREFB |
Analog input |
Bridge B current controller reference voltage. Do not leave this pin open |
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or connect to GND. |
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Bridge B enable. Low logic level switches off all power MOSFETs of |
20 |
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ENB |
Logic input (1) |
Bridge B. This pin is also connected to the collector of the overcurrent |
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and thermal protection transistor to implement overcurrent protection. If |
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not used, it must be connected to +5 V through a resistor. |
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21 |
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VBOOT |
Supply voltage |
Bootstrap voltage needed for driving the upper power MOSFETs of both |
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Bridge A and bridge B. |
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22, 23 |
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OUT2B |
Power output |
Bridge B output 2. |
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26, 27 |
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VSB |
Power supply |
Bridge B power supply voltage. It must be connected to the supply |
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voltage together with pin VSA. |
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34, 35 |
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VSA |
Power supply |
Bridge A power supply voltage. It must be connected to the supply |
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voltage together with pin VSB. |
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38, 39 |
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OUT2A |
Power output |
Bridge A output 2. |
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40 |
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VCP |
Output |
Charge pump oscillator output. |
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Bridge A enable. Low logic level switches off all power MOSFETs of |
41 |
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ENA |
Logic input (1) |
bridge A. This pin is also connected to the collector of the overcurrent |
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and transistor to implement overcurrent protection. If not used, it must be |
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connected to +5 V through a resistor. Thermal protection |
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42 |
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VREFA |
Analog input |
Bridge A current controller reference voltage. Do not leave this pin open |
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or connect to GND. |
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1.Also connected at the output drain of the overcurrent and thermal protection MOSFET. Therefore, it must be driven putting in series a resistor with a value in the range of 2.2 kΩ - 180 kΩ, recommended 100 kΩ.
Doc ID 018993 Rev 2 |
5/28 |
Electrical characteristics |
L6207Q |
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VS = 48 V, TA = 25 °C, unless otherwise specified.
Table 4. |
Electrical characteristics |
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Symbol |
Parameter |
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Test condition |
Min. |
Typ. |
Max. |
Unit |
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VSth(ON) |
Turn-on threshold |
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6.6 |
7 |
7.4 |
V |
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VSth(OFF) |
Turn-off threshold |
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5.6 |
6 |
6.4 |
V |
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IS |
Quiescent supply current |
All bridges OFF; Tj = -25 °C to |
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5 |
10 |
mA |
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125 °C (1) |
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Tj(OFF) |
Thermal shutdown temperature |
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165 |
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°C |
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Output DMOS transistors |
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High-side switch ON resistance |
Tj = 25 °C |
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0.34 |
0.4 |
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RDS(ON) |
Tj =125 °C (1) |
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0.53 |
0.59 |
Ω |
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Low-side switch ON resistance |
Tj = 25 °C |
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0.28 |
0.34 |
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Tj =125 °C (1) |
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0.47 |
0.53 |
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IDSS |
Leakage current |
EN = low; OUT = VS |
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2 |
mA |
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EN = low; OUT = GND |
-0.15 |
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mA |
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Source drain diodes |
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VSD |
Forward ON voltage |
ISD = 2.5 A, EN = low |
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1.15 |
1.3 |
V |
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trr |
Reverse recovery time |
If = 2.5 A |
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300 |
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ns |
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tfr |
Forward recovery time |
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200 |
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ns |
Logic input |
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VIL |
Low level logic input voltage |
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-0.3 |
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0.8 |
V |
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VIH |
High level logic input voltage |
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2 |
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7 |
V |
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IIL |
Low level logic input current |
GND logic input voltage |
-10 |
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µA |
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IIH |
High level logic input current |
7 V logic input voltage |
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10 |
µA |
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Vth(ON) |
Turn-on input threshold |
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1.8 |
2 |
V |
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Vth(OFF) |
Turn-off input threshold |
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0.8 |
1.3 |
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V |
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Vth(HYS) |
Input threshold hysteresis |
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0.25 |
0.5 |
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V |
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Switching characteristics |
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t |
D(on)EN |
Enable to out turn ON delay time (2) |
I |
LOAD |
=2.5 A, resistive load |
100 |
250 |
400 |
ns |
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tD(on)IN |
Input to out turn ON delay time |
ILOAD =2.5 A, resistive load (dead |
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1.6 |
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µs |
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time included) |
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t |
RISE |
Output rise time (2) |
I |
LOAD |
=2.5 A, resistive load |
40 |
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250 |
ns |
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t |
D(off)EN |
Enable to out turn OFF delay time (2) |
I |
LOAD |
=2.5 A, resistive load |
300 |
550 |
800 |
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tD(off)IN |
Input to out turn OFF delay time |
ILOAD =2.5 A, resistive load |
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600 |
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ns |
6/28 |
Doc ID 018993 Rev 2 |
L6207Q |
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Electrical characteristics |
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Table 4. |
Electrical characteristics (continued) |
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Symbol |
Parameter |
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Test condition |
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Min. |
Typ. |
Max. |
Unit |
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t |
Output fall time (2) |
I |
LOAD |
=2.5 A, resistive load |
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40 |
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250 |
ns |
FALL |
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tdt |
Dead time protection |
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0.5 |
1 |
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µs |
fCP |
Charge pump frequency |
-25 °C<Tj <125 °C |
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0.6 |
1 |
MHz |
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PWM comparator and monostable |
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IRCA, IRCB |
Source current at pins RCA and |
VRCA = VRCB = 2.5 V |
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3.5 |
5.5 |
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mA |
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RCB |
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Voffset |
Offset voltage on sense comparator |
VREFA, VREFB = 0.5 V |
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±5 |
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mV |
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tPROP |
Turn OFF propagation delay (3) |
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500 |
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tBLANK |
Internal blanking time on SENSE |
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1 |
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µs |
pins |
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tON(MIN) |
Minimum ON time |
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1.5 |
2 |
µs |
tOFF |
PWM recirculation time |
ROFF = 20 kΩ; COFF = 1 nF |
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13 |
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µs |
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ROFF = 100 kΩ; COFF = 1 nF |
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61 |
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µs |
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IBIAS |
Input bias current at pins VREFA and |
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10 |
µA |
VREFB |
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Over current detection |
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Isover |
Input supply overcurrent detection |
-25 °C<Tj <125 °C |
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4 |
5.6 |
7.1 |
A |
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threshold |
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ROPDR |
Open drain ON resistance |
I = 4 mA |
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40 |
60 |
Ω |
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tOCD(ON) |
OCD turn-on delay time (4) |
I = 4 mA; CEN < 100 pF |
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200 |
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tOCD(OFF) |
OCD turn-off delay time (4) |
I = 4 mA; CEN < 100 pF |
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100 |
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1.Tested at 25 °C in a restricted range and guaranteed by characterization.
2.See Figure 3.
3.Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin VREF.
4.See Figure 4.
Doc ID 018993 Rev 2 |
7/28 |
Electrical characteristics |
L6207Q |
|
Figure 3. Switching characteristic definition |
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EN |
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Vth(ON) |
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Vth(OFF) |
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t |
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IOUT |
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90% |
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10% |
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D01IN1316 |
t |
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tRISE |
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tFALL |
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tD(OFF)EN |
tD(ON)EN |
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AM02557v1 |
IOUT
ISOVER
ON
BRIDGE
OFF
VEN |
90% |
10% |
tOCD(ON) tOCD(OFF)
AM02558v1
8/28 |
Doc ID 018993 Rev 2 |
L6207Q |
Circuit description |
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The L6207Q integrates two independent power MOSFET full bridges, each power MOSFET
has an RDS(ON) = 0.3 Ω (typical value @ 25 °C) with intrinsic fast freewheeling diode. Cross conduction protection is implemented by using a dead time (tDT = 1 µs typical value) set by
internal timing circuit between the turn-off and turn-on of two power MOSFETs in one leg of a bridge.
Pins VSA and VSB must be connected together to the supply voltage (VS).
Using an N-channel power MOSFET for the upper transistors in the bridge requires a gate drive voltage above the power supply voltage. The bootstrapped supply (VBOOT) is obtained through an internal oscillator and a few external components to realize a charge pump circuit, as shown in Figure 5. The oscillator output (pin VCP) is a square wave at 600 kHz (typically) with 10 V amplitude. Recommended values/part numbers for the charge pump circuit are shown in Table 5.
Table 5. |
Charge pump external component values |
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Component |
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Value |
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CBOOT |
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220 nF |
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CP |
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10 nF |
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RP |
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100 Ω |
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D1 |
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1N4148 |
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D2 |
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1N4148 |
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VS |
D1 |
CBOOT |
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D2 |
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RP |
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CP |
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VCP |
VBOOT |
VSA |
VSB |
AM02559v1
Doc ID 018993 Rev 2 |
9/28 |