ST L5983 User Manual
Features
■ 1.5 A DC output current
■ 2.9 V to 18 V input voltage
■ Output voltage adjustable from 0.6 V
■ 250 kHz switching frequency, programmable
up to 1 MHz
■ Internal soft-start and inhibit
■ Low dropout operation: 100 % duty cycle
■ Voltage feed-forward
■ Zero load current operation
■ Overcurrent and thermal protection
■ VFQFPN8 3 x 3 mm package
Applications
■ Consumer: STB, DVD, DVD recorder, car
audio, LCD TV and monitors
■ Industrial: chargers, PLD, PLA, FPGA
■ Networking: XDSL, modems, DC-DC modules
■ Computer: optical storage, hard disk drive,
printers, audio/graphic cards
■ LED driving
Figure 1. Application circuit
L5983
1.5 A step-down switching regulator
VFQFPN8 3 x 3 mm
Description
The L5983 is a step-down switching regulator with
a 2.0 A (min.) current limited embedded power
MOSFET, so it is able to deliver an output current
in excess of 1.5 A DC to the load.
The input voltage can range from 2.9 V to 18 V,
while the output voltage can be set starting from
0.6 V to V
2.9 V, the device is suitable for also for 3.3 V bus.
Requiring a minimum set of external components,
the device includes an internal 250 kHz switching
frequency oscillator that can be externally
adjusted up to 1 MHz.
The VFQFPN package with exposed pad allows
reducing the R
°C/W.
. Having a minimum input voltage of
IN
down to approximately 60
thJA
November 2010 Doc ID 13005 Rev 7 1/43
www.st.com
43
Contents L5983
Contents
1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.5 Inhibit function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.6 Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3 Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.4.1 Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.4.2 Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.5 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.6 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.7 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.1 Positive buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2 Inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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L5983 Contents
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Doc ID 13005 Rev 7 3/43
Pin settings L5983
1 Pin settings
1.1 Pin connection
Figure 2. Pin connection (top view)
OUT
1.2 Pin description
OUT
SYNCH
SYNCH
INH
INH
COMP
COMP
V
V
CC
CC
GND
GND
FSW
FSW
FB
FB
Table 1. Pin description
N. Type Description
1 OUT Regulator output
Master/slave synchronization. When it is left floating, a signal with a
phase shift of half a period with respect to the power turn on is present at
the pin. When connected to an external signal at a frequency higher than
2 SYNCH
3INH
4 COMP Error amplifier output to be used for loop frequency compensation
5FB
6F
SW
7 GND Ground
8VCCUnregulated DC input voltage
the internal one, then the device is synchronized by the external signal,
with zero phase shift.
Connecting together the SYNCH pin of two devices, the one with the
higher frequency works as master and the other as slave; so the turn on
of the two power switches has a phase shift of half a period.
A logical signal (active high) disables the device. With INH higher than
1.9 V the device is OFF and with INH lower than 0.6 V the device is ON.
Feedback input. Connecting the output voltage directly to this pin the
output voltage is regulated at 0.6 V. To have higher regulated voltages an
external resistor divider is required from Vout to the FB pin.
The switching frequency can be increased connecting an external
resistor from the FSW pin and ground. If this pin is left floating the deice
works at its free-running frequency of 250 kHz.
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L5983 Maximum ratings
2 Maximum ratings
2.1 Absolute maximum ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
OUT Output DC voltage -0.3 to V
FSW, COMP, SYNCH Analog pin -0.3 to 4
INH Inhibit pin -0.3 to V
FB Feedback voltage -0.3 to 1.5
P
TOT
T
J
T
stg
2.2 Thermal data
Table 3. Thermal data
Symbol Parameter Value Unit
R
thJA
1. Package mounted on demonstration board.
Input voltage 20
CC
CC
Power dissipation at TA < 60 °C 1.5 W
Junction temperature range -40 to 150 °C
Storage temperature range -55 to 150 °C
Maximum thermal resistance
junction-ambient
(1)
VFQFPN 60 °C/W
V
Doc ID 13005 Rev 7 5/43
Electrical characteristics L5983
3 Electrical characteristics
TJ = 25 °C, V
= 12 V, unless otherwise specified.
CC
Table 4. Electrical characteristics
Val ues
Symbol Parameter Test condition
Min Typ Max
V
CC
V
CCON
V
CCHYSVCC
R
DS(on)
I
LIM
Operating input voltage
range
Turn on VCC threshold
UVLO hysteresis
MOSFET on resistance
Maximum limiting current 2.0 2.3 2.6 A
Oscillator
V
F
FSW
SW
Switching frequency
FSW pin voltage 1.254 V
D Duty cycle 0 100 %
F
ADJ
Adjustable switching
frequency
(1)
(1)
(1)
2.9 18
0.175 0.3
140 170
(1)
140 220
225 250 275
(1)
= 33 kΩ 1000 kHz
R
FSW
220 275
2.9
Unit
V
mΩ
kHz
Dynamic characteristics
V
FB
Feedback voltage 2.9 V < V
CC
< 18 V
(1)
0.593 0.6 0.607 V
DC characteristics
I
Q
I
QST-BY
Quiescent current
Total standby quiescent
current
Duty cycle = 0,
V
= 0.8 V
FB
2.4 mA
20 30 μA
Inhibit
Device ON level 0.6
INH threshold voltage
V
Device OFF level 1.9
INH current INH = 0 7.5 10 μA
Soft-start
T
SS
Soft-start duration
FSW pin floating 7.4 8.2 9.1
F
= 1 MHz,
R
SW
FSW
= 33 kΩ
2
ms
Error amplifier
6/43 Doc ID 13005 Rev 7
L5983 Electrical characteristics
Table 4. Electrical characteristics
Val ues
Symbol Parameter Test condition
Min Typ Max
Unit
V
CH
V
CL
I
FB
I
O SOURCE
I
O SINK
G
High level output voltage V
Low level output voltage V
Bias source current V
Source COMP pin V
Sink COMP pin V
Open loop voltage gain
V
< 0.6 V 3
FB
> 0.6 V 0.1
FB
= 0 V to 0.8 V 1 μA
FB
FB
FB
(2)
= 0.5 V, V
= 0.7 V, V
=1 V 20 mA
COMP
=1 V 25 mA
COMP
100 dB
Synchronization function
High input voltage 2 3.3
Low input voltage 1
Slave sink current V
Master output amplitude I
SOURCE
= 2.9 V 0.7 0.9 mA
SYNCH
= 4.5 mA 2.0 V
Output pulse width SYNCH floating 110
Input pulse width 70
Protection
I
FBDISC
T
SHDN
1. Specification referred to TJ from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range are
assured by design, characterization and statistical correlation.
2. Guaranteed by design
FB disconnection source
current
Thermal shutdown 150
(2)
Hysteresis
30
1 μA
V
V
ns
°C
Doc ID 13005 Rev 7 7/43
Functional description L5983
4 Functional description
The L5983 is based on a “voltage mode”, constant frequency control. The output voltage
V
is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing
OUT
an error signal that, compared to a fixed frequency sawtooth, controls the ON and OFF time
of the power switch.
The main internal blocks are shown in the block diagram in Figure 3. They are:
● A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the
synchronization signal. Its switching frequency can be adjusted by an external resistor.
The voltage and frequency feed forward are implemented.
● The soft-start circuitry to limit inrush current during the start-up phase
● The voltage mode error amplifier
● The pulse width modulator and the relative logic circuitry necessary to drive the internal
power switch
● The high-side driver for embedded p-channel power MOSFET switch
● The peak current limit sensing block, to handle over load and short-circuit conditions
● A voltage regulator and internal reference. It supplies internal circuitry and provides a
fixed internal reference.
● A voltage monitor circuitry (UVLO) that checks the input and internal voltages
● A thermal shutdown block, to prevent thermal run-away
Figure 3. Block diagram
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L5983 Functional description
4.1 Oscillator and synchronization
Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a
constant frequency clock. Its frequency depends on the resistor externally connected to the
FSW pin. In case the FSW pin is left floating the frequency is 250 kHz; it can be increased
as shown in Figure 6 by the external resistor connected to ground.
To improve the line transient performance, keeping the PWM gain constant versus the input
voltage, the voltage feed forward is implemented by changing the slope of the sawtooth
according to the input voltage change (see Figure 5.a).
The slope of the sawtooth also changes if the oscillator frequency is increased by the
external resistor. In this way a frequency feed forward is implemented (Figure 5.b) in order to
keep the PWM gain constant versus the switching frequency (see Section 5.4 for PWM gain
expression).
The synchronization signal is generated on the SYNCH pin. This signal has a phase shift of
180° with respect to the clock. This delay is useful when two devices are synchronized
connecting the SYNCH pins together. When SYNCH pins are connected, the device with a
higher oscillator frequency works as master, so the slave device switches at the frequency
of the master but with a delay of half a period. This minimizes the RMS current flowing
through the input capacitor (see the L5988D; 4 A continuous (more than 5 A pulsed) step-
down switching regulator with synchronous rectification, datasheet).
Figure 4. Oscillator circuit block diagram
Clock
ClockClock
FSW
FSW
Clock
Clock
Generator
Generator
Synchronization
Synchronization
Ramp
Ramp
Generator
Generator
SYNCH
SYNCH
Sawtooth
Sawtooth
The device can be synchronized to work at a higher frequency feeding an external clock
signal. The synchronization changes the sawtooth amplitude, changing the PWM gain
(Figure 5.c). This change has to be taken into account when the loop stability is studied. To
minimize the change of the PWM gain, the free running frequency should be set (with a
resistor on the FSW pin) only slightly lower than the external clock frequency. This preadjusting of the frequency changes the sawtooth slope in order to render the truncation of
sawtooth negligible, due to the external synchronization.
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Functional description L5983
Figure 5. Sawtooth: voltage and frequency feed forward; external synchronization
Figure 6. Oscillator frequency vs. FSW pin resistor
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L5983 Functional description
4.2 Soft-start
The soft-start is essential to assure correct and safe startup of the step-down converter. It
avoids inrush current surge and makes the output voltage increase monothonically.
The soft-start is performed by a staircase ramp on the non-inverting input (V
) of the error
REF
amplifier. So the output voltage slew rate is:
Equation 1
R1
⎛⎞
⋅=
VREF
⎝⎠
1
------- -+
R2
where SR
SR
is the slew rate of the non-inverting input while R1 and R2 is the resistor
VREF
OUT
SR
divider to regulate the output voltage (see Figure 7). The soft-start staircase consists of 64
steps of 9.5 mV each, from 0 V to 0.6 V. The time base of one step is of 32 clock cycles. So
the soft-start time and then the output voltage slew rate depend on the switching frequency.
Figure 7. Soft-start scheme
Soft-start time results:
Equation 2
SS
TIME
For example, with a switching frequency of 250 kHz the SS
Doc ID 13005 Rev 7 11/43
32 64⋅
-----------------=
Fsw
TIME
is 8 ms.
Functional description L5983
4.3 Error amplifier and compensation
The error amplifier (E/A) provides the error signal to be compared with the sawtooth to
perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V
voltage reference, while its inverting input (FB) and output (COMP) are externally available
for feedback and frequency compensation. In this device the error amplifier is a voltage
mode operational amplifier so with high DC gain and low output impedance.
The uncompensated error amplifier characteristics are the following:
Table 5. Uncompensated error amplifier characteristics
Error amplifier Value
Low frequency gain 100 dB
GBWP 4.5 MHz
Slew rate 7 V/μs
Output voltage swing 0 to 3.3 V
Maximum source/sink current 25 mA/40 mA
In continuous conduction mode (CCM), the transfer function of the power section has two
poles due to the LC filter and one zero due to the ESR of the output capacitor. Different
kinds of compensation networks can be used depending on the ESR value of the output
capacitor. In case the zero introduced by the output capacitor helps to compensate the
double pole of the LC filter a type II compensation network can be used. Otherwise, a type
III compensation network has to be used (see Section 5.4 for details of the compensation
network selection).
However, the methodology to compensate the loop is to introduce zeros to obtain a safe
phase margin.
12/43 Doc ID 13005 Rev 7
L5983 Functional description
4.4 Overcurrent protection
The L5983 implements the overcurrent protection sensing current flowing through the power
MOSFET. Due to the noise created by the switching activity of the power MOSFET, the
current sensing is disabled during the initial phase of the conduction time. This avoids an
erroneous detection of a fault condition. This interval is generally known as “masking time”
or “blanking time”. The masking time is about 200 ns.
When the overcurrent is detected, two different behaviors are possible depending on the
operating condition.
1. Output voltage in regulation. When the overcurrent is sensed, the power MOSFET is
switched off and the internal reference (V
error amplifier, is set to zero and kept in this condition for a soft-start time (T
clock cycles). After this time, a new soft-start phase takes place and the internal
reference begins ramping (see Figure 8.a).
2. Soft-start phase. If the overcurrent limit is reached, the power MOSFET is turned off
implementing the pulse by pulse overcurrent protection. During the soft-start phase,
under the overcurrent condition, the device can skip pulses in order to keep the output
current constant and equal to the current limit. If, at the end of the “masking time”, the
current is higher than the overcurrent threshold, the power MOSFET is turned off and it
skips one pulse. If, at the next switching on at the end of the “masking time”, the current
is still higher than the threshold, the device skips two pulses. This mechanism is
repeated and the device can skip up to seven pulses. While, if at the end of the
“masking time” the current is lower than the overcurrent threshold, the number of
skipped cycles is decreased by one unit. At the end of the soft-start phase the output
voltage is in regulation and if the overcurrent persists, the behavior explained above
takes place (see Figure 8.b).
), that biases the non-inverting input of the
REF
SS
, 2048
So the overcurrent protection can be summarized as a “hiccup” intervention when the output
is in regulation and a constant current during the soft-start phase.
If the output is shorted to ground when the output voltage is in regulation, the overcurrent is
triggered and the device starts cycling with a period of 2048 clock cycles between “hiccup”
(power MOSFET off and no current to the load) and “constant current” with very short ON
time and with reduced switching frequency (up to one eighth of normal switching frequency).
See Figure 32 for short-circuit behavior.
Doc ID 13005 Rev 7 13/43
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