Page 1
APPLICATION NOTE
DESIGNING WIT H THE L2 96 M ONO LIT HIC
POWER SWITCHING REGULATOR
A cost-effec tive repl acement for costly hybrids, t he L296 P ower Switc hing Regu lator d elivers 4A at an outpu t
voltage of 5.1V to 40V and includes many popular supply features. This comprehensive application guide
explains ho w t he de vi c e oper at e s an d how it is used. T y pic al application cir c uits ar e als o presented.
The SGS THOMSON L296 is the first monolithic
switching regulator in plastic package which includes the power section. Moreover, the circuit includes all the functions which make it specially suited
for microproc es s or su pply .
Before the introduction of L296, which realizes the
step down configuration, this function was implemented with discrete power components driven be
integrated PWM regulator circuits (giving a maximum output curr ent of 300 to 400m A) or with h ybrid
circuits. B oth of these solutions are ch aracterized by
a low e fficienc y o f the powe r t ransis tor. For thi s rea son it is genera lly nec essary to oper at e at freq uen-
AN244/12 88
cies in the 20kHz to 40kHz range. Of the two alternatives dis crete solutions are usually les s expensive
because they do not include as many functions as
the L296.
With the new L2 96 r egul at or the dr iv ing pro blem of
the power cont r ol s tage has been eliminated. B es i des a higher overall efficiency, it is therefore also
possible to op erate directly at f requencies as high as
100kHz. At 200 kHz the dev ice still op erates (fu rther
reducing the cost of the L and C external components) when a r eduction o f a few perc ent in effic iency is acceptable.
1/43
Page 2
APPLICATION NOTE
The device deliv ers a maximu m current of 4 A to the
load, at an output voltage adjustable from 5.1 to
40V ; the maximum operating input voltage is 46V.
The high vo ltage and the high cu rrent capab ilities of
the device are a result of the special technology
used and the spe cial care tak en in designi ng the power transis tor. Essentia l requirements fo r a good power transis tor are hi gh gain a nd high curr ent lev els,
low saturat ion volta ge and go od sec ond bre akdown
robustness . To achieve hig h gain at h igh c urrent levels, the po wer transis tor has to be de signed to maximize the em itt er ’s per imet er /ar ea r at io.
In the L296 power transistor, realized with a high
voltage (50V) process, current densities in the magnitude orde r of 10m A /M il
2
are achieve d.
In its most complete configuration, in which all the
available fu nc tions ar e being used, a si gnificant reduction of the exter nal component count is achieved
compared w ith dis c r et e c om pone nt so lution.
The L296 is mounted in a MULTIWATT plastic
package with 15 pins, minimizing the cost per watt
and allowing a low therm al re sista nce of 3°C /W be tween junction and package and of 35°C/W between junc tion and ambient. This thermal resi stance
Figure 1 :
The Basic Step-down Sw itc hing Regulato r C onfiguration.
(inclucing the contact resistance) is comparable to
that of the more c os tl y meta l T O- 3 pac k ages.
THE STEP-DOWN CONFIGURATION
Fig. 1 shows the sim plified blo ck di agram of the cir cuit realizing the step-down configuration. This circuit operates as follow s : Q1 acts as a switc h at the
frequency f and the O N and O FF t im es a re s uitably
controlled by the pulse width modulator circuit.
When Q1 is satur ated , energy is a bsorbed fro m the
input which is transferred to the output through L.
The emitter v olt ag e of Q1, V
ON and -V
( with VF the forward volt age across the
F
, is Vi-Vsat when Q is
E
D diode as indicated) when Q1 is OFF. During this
second phase the current circulates again through
L and D. Consequently a rectangular shaped voltage appears on the emitter of Q1 and this is then
filtered by the L-C-D network and converted into a
continuou s mean value ac r os s the c apacitor C a nd
therefore across the load. The current through L
consists of a continuous component, I
LOAD
, and a
triangular-shaped component super-imposed on it,
∆
I
, due to the volt age a cr os s L.
L
2/43
Page 3
APPLICATION NOTE
Figure 2 :
Princip al Ci rc ui t W av ef or ms of t he figure 1 Circuit .
3/43
Page 4
APPLICATION NOTE
Fig. 2 shows the behaviour of the most significant
waveforms, in different points of the circuit, which
help to under stand better the o peration of the po wer
section of the switching regulator. For the sake of
simplicity , the ser ies r esist ance of the coi l ha s bee n
neglected. Fi g. 2a s hows the beha viour of the em itter voltage (which is practically the voltage across
the recircul ation diode), wh ere the p ower saturat ion
and the forwar d V
drop acro ss the diode e ra take n
F
into account .
The ON and OFF times are established by the fol-
lowing expression :
T
Vo = (Vi – V
sat
)
ON
+ T
T
ON
OFF
Fig. 2b shows the current acr oss the s witching tr ansistor. Th e current sha pe is trapez oidal and the operation is in continuous mode. At this stage, the
phenomena due to the catch diod e, that we consi der
as dynamically ideal, are neglected. Fig. 2c shows
the current cir culating in the reci rculation diod e. The
sum of the currents circulating in the power and in
the diode is the current circulating in the coil as
shown in fig . 2e. In balanced con ditions the ∆I
rent increase occuring during T
to the ∆I
mean value o f I
–
decrease occurring during T
L
correspond s to the charge c urrent.
L
has to be equal
ON
OFF
+
cur-
L
. The
The current ripple is given by the following formula :
(V
– V
i
IL+ = ∆IL
–
=T
V
+ V
o
=T
L
∆
It is a good rule to respect to Io
sat) – V
L
F
OFF
=
ON
≥ IL/2 relation-
MIN
ship, that implies good operation in continuous
mode. When this is not done, the regulator starts
operating in discontinuous mode. This operation is
still safe but variations of the switching frequency
may occur and th e output regulati on de cr ea se s.
Fig. 2d shows the behaviour of the voltage across
coil L. In balanced condit ions, the mean val ue of the
voltage acro ss the coil is z ero. Fig. 2f show s the current flowing through the capacitor, which is the difference between I
and I
L
LOAD
.
In balanced conditions , the mean current is equal to
zero, and ∆I
= ∆IL. The current IC through the ca-
C
pacitor gives r is e to t he v oltage ripple.
This ripple c onsists of two co mponents : a capa citive
component, ∆V
∆
V
, due to the ESR eq uivalent se ries resi stance
ESR
, and a resistive component,
C
of the capacito r. F ig . 2g sh ows the capaciti ve c om -
ponent ∆V
of the voltage ripple, which is the inte-
C
gral of a triangular-shaped current as a function of
time. Moreover, it should be observed that v
in quadrature with i
age V
. The quantity of charge ∆Q+ supplied to
ESR
(t) and therefore with the volt-
C
(t) is
C
the capacitor is given by the area enclosed by the
ABC triang le in fig. 2f :
1T
∆
Q =
..
222
∆
I
L
which theref or e gi ve s :
∆
∆
V
Q
==
C
C8fc
Fig. 2h sh ows the vol tage ripple V
I
L
due to the r e-
ESR
sistive c omponen t of the c apacitor. Th is com ponent
is V
ple V
(t) = iC (t) ⋅ ESR. Fig. 2i s hows the overall ri p-
ESR
, which is the sum of the two pr evious co mpo-
o
nents. As t he frequenc y increas es (> 20kH z), whic h
is required to reduc e both t he c os t and t he siz e s of
L and C, the V
component becomes dominant.
ESR
Often it is necessary to use capacitors with greater
capacitanc e (or more capacitors connected in para llel to limit the v alue of ES R with in the requir ed level.
We will now exam ine the s tep down conf igur ation in
more detail, referring to fig. 1 and taking the behaviour show n in fig . 2 int o ac c oun t.
Starting from the initial conditions, where Q = ON,
v
= Vo and iL = iD = 0, usi ng Kirckoff sec ond principle
C
we may wri te th e following expr es s ion :
V
= vL + vC (V
i
di
Vi = L + vC = L + V
L
dt dt
is neglected against Vi).
sat
di
L
o
(1)
which give s :
di
(Vi – Vo)
L
=(2)
dt L
The current t hr oug h th e ind uc t anc e is gi ve n by :
(V
– Vo)
I
L
When V
i
=t (3)
L
, Vo, and L are constant, IL varies linearly
i
with t. Therefore, it follows that :
(V
– Vo) T
i
+
∆
I
=(4)
L
ON
L
When Q is OFF t he curre nt throug h the co il has reached its m aximum value, I
and because it cannot
peak
very instantaneously, the voltage across the coil is
inverted and the diode D becomes forward biased
to allow the recirculation of the current through the
load.
4/43
Page 5
APPLICATION NOTE
When Q switches OFF, the following situation is present :
v
(t) = Vo, iL (t) = iD (t) = I
C
peak
And the equation associated to the following loop
may be written :
di
+ L + vC = 0 (5)
V
F
L
dt
where :
v
= V
C
o
dI
L
= – (VF + Vo)/L (6)
dt
It follows theref or e that :
V
+ V
F
iL (t) = – t (7)
o
L
The negativ e sign may be interpre tated with the fact
that the current is now decreasing. Assuming that V
F
may be neglected against Vo, during the OFF time
the following behaviour o ccur s :
V
o
IL =t (8)
L
therefore :
V
∆
I
– =T
L
o
OFF
L
(9)
But, because
+
∆
I
L
(V
which allows us to ca lc ula te V
Vo = V
–
= ∆I
if follows that :
L
– Vo) T
i
ONVo TOFF
=
LL
T
i
T
ON
ON
+ T
OFF
= V
:
o
T
ON
i
T
(10)
where T is the switching period.
Expressio n (10) l inks th e output voltage V
put voltage V
and to the d uty cycle. Th e relation-shi p
i
to the in-
o
between the cur r ents is th e following :
T
ON
I
iDC
= IoDC
.
T
EFFICIENCY
The system efficiency is expressed by the following
formula :
P
η
% = 100
where Po = VoI
is the output power to the load and P
wer absor be d by the system. P
o
P
i
o
(with Io = I
is th e input po -
i
is given by Po, plus
i
LOAD
)
all the other system losses. The expression of the efficiency bec om es ther ef or e the following :
P
η
=(12)
P
+ P
o
o
+ PD + PL + Pq + p
sat
sw
DC LO SSES
P
: saturation losses of the power transistor Q.
sat
These losses increase as V
T
P
= V
sat
sat
where = and V
T
ON
. I
ON
TV
= V
o
V
sat Io
TV
o
i
decre ases.
i
V
o
i
is the power
sat
(13)
transistor s atur at ion at cu rrent Io.
P
: losses due to the recirculation diode. These
D
losses increase as V
increases, as in this
i
case the ON time of the diode is greater .
V
– Vo Vo
P
= VF I
D
where V
diode at curren t I
P
: losses due to th e se ri es resistance RS of the
L
coil
P
= RS I
L
P
: losses due t o t he s t an d-b y c ur r ent and to the
q
i
o
is the forward voltage of the recirculation
F
2
(15)
o
= VF Io (1 – ) (14)
Vi
V
i
.
o
power driv ing c ur r ent :
T
Pq = Vi I’3q + Vi I’’
3q
ON
T
(16)
where being :
T
Pq = Vi I’3q + Vo I’’
I’
3q
I’’
3q
V
ON
TV
= I
o
= it follows that :
i
in which :
3q (0 % d.c.)
3q
= I
3q(100 % d.c.)
3q
at 0 % duty cyc le
- I
SWITCHING LOSSES
P
: switching losses of the po wer t ra ns is tor :
sw
t
+ t
r
Psw = Vi I
o
f
2T
The switching losses of the recirculation diode are
neglected (which are a ny way n egli gible) as it i s assumed that diode is used with recovery time much
smaller than the rise time of the power transist or .
We can neglect loss es in the coil (it is assume d that
∆
I
is very small comp ared to Io) and in the output
L
capacitor, which is assu me d t o sh ow a low E S R .
5/43
Page 6
APPLICATION NOTE
Calculation of the inductance value, L
Calculation T
ON
and T
through (4) and (9) re-
OFF
spectively it f ollo ws t hat :
L+
∆I
. L
=T
T
ON
Vi – V
o
OFF
∆
V
I
L
–
. L
o
But be c ause :
+
= ∆I
–
= ∆IL,
L
T
ON
+ T
= T and
OFF
∆
I
L
it follows that :
∆
V
I
L
– V
i
∆
. L
+ = T
IL . L
V
o
o
Calculatin g L, t he pr ev io us rel at ion bec om es :
(V
– Vo) V
i
L = T (18)
V
∆I
i
o
L
Fixing the current ripple in the coil required by the
design (for i ns t anc e 3 0% of I
), and introdu c ing th e
o
frequency in stead of the perio d, it follows that :
(V
– Vo) V
L = where L is in He nr y a nd f in Hz
i
. 0.3 . Io . f
V
i
o
Calculation of the output capacitor C
From the output node in fig. 3 it may be seen that
the current throug h the output capaci tor is given by :
i
(t) = iL (t) – I
c
Figure 3 :
o
Equivalent Circuit Showing Recirculation when Q1 is Turned Off.
From the beh av iour shown in f i g. 2 it may be calcu lated that the charge current of the o utput ca pacitor,
within a perio d, is ∆I
/4, whic h is su ppl ied for a time
L
T/2. It follows t her efor e t hat :
∆
I
∆
V
C
L
== = (19)
4C 2 8C 8fC
T
∆
IL T∆I
L
but, re membering e xpress ion (4) :
– Vo) T
(V
i
+
∆
I
= and TON =T
L
ON
LV
Vo
i
therefore equation (19) becomes :
(V
– Vo) V
=
i
8 V
∆
V
C
f2 L C
i
o
Finally, ca lc ula ti ng C it fol lows that :
(V
– Vo) V
8 V
i
∆VC f2 L
i
C = (20)
o
where : L is in Henrys
C is in Farads
f is in Hz
Finally, the f ollo wing express ion should be tru e :
∆
V
ESR
=(21)
max
Cmax
∆
I
L
It may happen tha t to s atis f y rel ation (21) a capacitance value m uch gr eater tha n the v alue c alc ulated
through (20) must be used.
TRANSIENT RESPONSE
Sudden variations of the load current give rise to
overvoltage s and undervol tages on the output voltage. Since i
instantaneous variation of the load current ∆I
= C (dvc/dt) (22), where dvc = ∆Vo, the
c
o
is
supplied dur ing the transien t by the output capacitor.
During the transient, also current through the coil
tends to chang e its va lue.
Moreover, the fo llow ing is true :
di
vL = L (23) where diL = ∆Io.
v
= Vi – V
L
v
= V
L
L
dt
o
o
for a load incr eas e
for a load de crease
Calculating dt from (22) and (23) and equalizing, it
follows that :
di
L= C
v
L
dv
L
c
i
c
Calculating dvc and equalizing it to ∆Vo, it follows
that :
2
L∆I
∆
V
= (24) for + ∆I
o
∆
Vo = (25) for – ∆I
o
C(Vi – Vo)
2
L∆I
o
CV
o
o
o
From these two expressions the dependence of
overshoots and under shoo ts on the L and C val ues
may be observed. To minim ize ∆V
it is therefor e ne-
o
cessary to redu ce the ind ucta nce value L and to in crease the capacitance value C. Should other
auxiliary functions be r equired in the circuit l ike reset
or crowbar pro tecti ons and very v ariable lo ads m ay
be present, it is worthwhile to take special care for
minimizing these overshoots, which could cause
spurious operation of the crowbar, and the undershoot, whic h co uld trigger the rese t fun ctio n.
6/43
Page 7
APPLICATION NOTE
DEVICE DESCRIPTION
Fig. 4 shows the package in which the device is
mounted and the pin f unc tion assignments.
The internal structure of the device is shown in fig. 5.
Each block will now be exa m ined.
Power supply
The device is provid ed with an i nternal st abilized po wer supply that, besides supplying the reference
Figure 4 :
Pin Assignments of the L296.
voltage of 5 .1 V for th e w hole system, a ls o s upplied
the internal an alog blocks.
Special fe atur es of the v o lt age r ef er enc e are its ac curacy, tem perature stability a nd high line r ejection.
Through zenze-zap trimming, the voltage is within
±
2% limits.
Figure 5 :
Block Di agr am of th e L29 6. In Ad dit io n t o the B as ic Regulation L oop the Device incl udes Functions such a s R es et , Cro wbar and Current Li mi ting.
7/43
Page 8
APPLICATION NOTE
OSCILLATOR
The oscillator bloc k generates th e s a w- toot h w av e form that s ets the switchin g frequency of the system.
This signal , compar ed with the o utput volta ge of the
error ampl ifier, gener ates the PWM signal to b e sent
to the power output stage. The saw-tooth, whose
amplitude is between 1.2V and 3.2V, is generated
by chargi ng rapidly the C
scharges across the R
capacitor whi ch then di-
osc
resistance. As shown in
osc
fig. 6, the os cillator is realiz ed by a comparator (with
grounded compatible input) with hysteresis whose
thresholds are 1.2V and 3.2V respectively . The C
capacitor and the R
resis-tance ar e connecte d to
osc
osc
the non-in ve rtin g input of the com pa ra to r whi ch s et
the oscillating freque nc y is fix ed . W hen the voltage
on pin 11 is less than 3.2V, the switch S
and the c ur ren t generator ch ar ges the C
tor rapidly ; in t his phase S
is also closed. As soon
2
is closed
1
capaci-
osc
as 3.2V is r eache d the com para tor outpu t dri ves S
open (theref ore opening S1, too) ; the inver ting input
voltage is reduc ed to about 1.2V and the cap ac it or
Figure 6 :
Internal Schematic of the Osc i llat or .
starts to disc harge itself ac ross the R
I
effect is n eglected). W hen t he v ol t age rea c hes
bias
1.2V, S
and S1 close agai n and a n ew cycle star ts.
2
osc
The generated wav ef or m is sh own in f ig. 7.
To achieve a good accuracy of the switching fre-
quency it is es sentia l to have a c hargin g time of the
capacitor which is much smaller than the discharging time. In t his w ay, the o sci llatio n frequ ency only
depends on the ext ernal components C
For this reas on the capacitor charging curre nt (when
S
is ON) is typically around 10mA. For example,
1
with a 2.2nF capacitor to switch from 1.2V to 3.2V
about 400ns is requi red, whic h is neglig ible c ompa red to the 10µs period that occ ur s when the operation is performed at 100kHz. The diagrams shown
in fig. 8 all ow the ca lcula tion of the R
fig. 8) with C
as a parameter (C3 in fig. 8) when
osc
osc
the oscillat ion frequency requir ed for operation has
2
been previous l y fix ed.
resistor (the
and R
osc
osc
value (R1 in
.
8/43
Page 9
APPLICATION NOTE
Figure 7a :
Figure 7b :
Figure 8 :
Oscillator Waveform at Pin 11 with
f = 100Khz (R
C
= 2.2nF).
osc
= 4.3KΩ,
osc
Oscillator Waveform at Pin 11 with
f = 50Khz (R
C
= 2.2nF).
osc
= 9.1KΩ,
osc
Nomogram for the Choice of Osc il lat or
Component s.
Fig. 8 shows two s uggested v alues for the C
osc
capacitance . Exce ssive ly low ca pacit an ce value may
give ris e to an inacc uracy of th e upper thr eshold due
to the switch ing delays of the comparator . This inaccuracy in caused by an excessively short rise time
of the voltage. A capacitance value too high gives
rise to a charging time which is too com pared to the
discharging time. An additional inaccuracy cause
would be therefore present for the switching frequency, now due to spread of t he c ha rg e cu rr en t.
The oscillation frequency is given by the following
formula :
f
= (26)
osc
1
R
osc Cosc
PWM (se e fig. 9)
The PWM signal is generated on the comparator
output ; the triangular-shaped waveform and the
continuous signal coming from the output of the
transconductance error amplifier are sent to its inputs. The PWM s ign al is then transfer re d t o th e dr iving stage of the out p ut powe r tr ans is t or .
SOFT START (see fig. 9)
Soft start is an essential function for co rrect start-up,
to prevent stresses and possible breakdown from
occurring in the power tra nsistor and to ob tain a monotonical ly inc r eas ing out pu t voltage.
In particul ar, the L296, as it does not have any du ty
cycle li mitation a nd due to t he ty pe of curre nt l imitation does n ot allow the output to be for ced to a s teady state without the aid of the soft-start facility.
Soft-start operates at the sta rt-up of the s yste m, after the inhi bit ha s b een activated, a fte r a n intervention of the current limitatio n and after the intervention
of the thermal p rotection.
The soft-s tart f unc tion is realized through a cap ac itor connec te d to pin 5 whic h is c har ged at cons t ant
current (≅ 100µA) up to a value of about V
REF
. During the charging time, through PNP transist or Q58,
the voltage on pin 9 is forced to increase with the
same rising speed as on pin 5. S t ar ting f ro m the discharged capacitor condition (pin 5 voltage = 0V)
the power transistor is in the OFF condition, as the
voltage on pin 9 is smaller than the minimum level
of the ramp vol tage. As the c apacitor is cha rged, the
PWM sign al begins to be ge nerated as soon as the
error amplif ier output v oltage cr osses t he ramp ; t he
power stage starts t o switc h with stea dily in creasing
duty cycle. This behaviour is shown in fig. 10. As
soon as the steady conditi on is reac hed the duty cy cle sets itself to the right value due to the effect of
the feedback network while the soft-start capacitor
completes its charging to a value very close to V
REF
.
9/43
Page 10
APPLICATION NOTE
The soft-start effect is determined, apart from the
switch-on tim e, when the curre nt limitation operat es,
due to either an overload or a short circuit, to keep
the mean value of the current absorbed by the power supply low.
Moreover f rom f ig. 11 i t m ay be obs erved that s inc e
the voltage on pin 9 can decrease under the mini-
Figure 9 :
Partial Inte rna l S c hem at ic S how ing PWM and Sof t S t ar t Blo ck s .
mum ramp lev el and incre ase over the max imum level no limitat ions have been provide d on the duty cycle, whi ch there fore may vary bet ween 0 and 10 0%.
Figure 10 :
10/43
Soft Start Wav eforms. When power is applied, or after an inhi bit , t he L2 96’s output curren t
rises slowly under cont r ol of t he s oft start ci rcuit.
Page 11
APPLICATION NOTE
Figure 11 :
Waveform f or Calc ul at ion of Duty Cy c le an d S of t Star t Tim e.
CALCULATING THE DUTY CYCLE AND
SOFT-START TIME
Assume, for simplicity, that the rising edge of the
ramp is instantan eous ; V
error amplifie r and V
The PWM c om pa ra to r bl oc k s witches w he n V
is the ou tput voltage of the
r
the ramp voltage (see fig . 11).
c
= V
r
; therefore :
V
= Vc = E e R
r
–
t
osc Cosc
Consequent ly :
t = R
osc Cosc
The time obtained from this expression is the T
In
E
V
r
OFF
time of the pow er transistor. Th e duty cyc le d is given
by :
T
d = = =
= 1 – In =
T – R
ON
osc Cosc
TT
EVo
V
V
r
i
In
E
V
r
(27)
Consequently, starting with the capacitor discharged, the outp ut of the regu lator will be at the nom inal
level when the voltage at the terminal of the capacitor (which is charged by a constant current) has
reached V
t
start-up
=
– 0.5V.
r
C
ss
(Vr – 0.5V)
I
5so
where Css is the soft-start capacitor and I
charging c ur re nt.
Consider ing as the soft-star t tim e the t im e r eq uir ed
for the soft-start capacitor to charge from
(1.2 V – 0.5V) to V
c
t
=
ss
C
(Vr – 1.2)
ss
I
sso
– 0.5V, gives :
r
substituting Vr from (27) gives :
V
o
– ( 1 –
Vr = E e
)
V
i
substitu ting into (28) giv es :
V
o
C
I
ss
sso
tss = (E e – 1. 2)
(
– 1
V
i
)
SYNCHRONIZATION
The synchronization function is available on pin 7,
this function allows the device to be swi t ch ed at an
externally generated frequency (leaving pin 11
open), or to mutually synchronize several devices,
using one of them as mas ter and the o thers as slav e
(fig. 12).
This allows several devices to be operated at the
same frequen cy, avoiding un desirable interm odulation pheno mena. T he number if mutua lly syn chronizable devices is obviously much greater than the
three devic es s hown in the figure. It is a ny way diffi-
5so
is the
11/43
Page 12
APPLICATION NOTE
cult to establish an exact maximum number of devices, as it depends on diff er ent co nditions.
The first consideration concerns the accuracy which
must be achieved a nd maintained on the oscillation
frequency. Since the bias current on pin 7 is an output
current, the sum of all the bias currents must be much
smaller than the capacitor discharge current in close
proximity to the lower discharge threshold. Therefore,
assuming C
= 2.2nF and R
osc
= 4.3KΩ, it follows
osc
that :
1.2V
4.3K
Ω
= 280µA
Assuming that a 10% variation may be accepted, it
follows therefor e th at the num ber of sync hroni zable
devices is giv en b y :
N =
This means t hat if the overall I
28µA
I
bias max
is too high it m ay
bias
modify the dis c har gi ng t im e of t he c apa ci t or.
The second consideration concerns the layout de-
sign.
In the presence of a gre at num ber of devic es to be
synchronized, the leng ht of the paths ma y bec o me
significant and therefore the distributed inductance
introduced alo ng the pat hs may begi n to modify the
triangular shaped waveform, particularly the rising
edge which is very stee p. This effect would affec t the
devices that are physical ly located mo re distant from
the master d evice .
The ampli tude of the saw-too th to be externally connected must be wit h i n 0. 5V and 3. 5V , va lues also
represe nting the maximum swing o f the error a mplifier output.
CURRENT LIMITATION
The current limitation function has been realized in
a rather innova t iv e way to av oid overlo ad c on dit io n
during the short ci rcuit operation . In fact, while for al l
the other devices a constant current limitation is implemented b y acti ng on the d uty cycle (therefo re, i n
short circuit conditi ons an output curr ent is equal t o
the maximum limitation current), the new control approach allows operation in short circuit conditions
with a mean curren t much sm aller tha n the all owed
4A value. Ope ration of the curr ent limiter will n ow be
described .
Refer to the bloc k d iagr am , fig. 13.
The curre nt which is de liv er ed from the output tr ansistor to the load flows throu gh the cu rr en t sens ing
resistor R
. When the voltage drop on RS is equal
S
to the offset voltage of the current comparator, the
comparator generates a set pulse for the flip-flop,
with a delay of about 1µsec. The pu rpose of this delay is to avoid triggering of the protection circuit on
the curren t pe ak tha t o ccurs dur ing the recir culatio n
phase. There fore, the output
Q goes low and the power stage is immed iately switch ed off, while the o utput
Q goes high and acts directly on the soft-start
capacitor dischargng the soft-start capacitor at a
constant curr en t (about 50µA).
When the voltage on pin 5 reaches 0.4V the comparator triggers, supplying a reset pulse to the flipflop ; from now on, the power stage is enable and
the soft-start phas e starts again. When the limit ation
cause, eit her overlo ad or s hort circu it, is stil l pres ent
the cycle rep eats again. The waveform of the ou tput
current on pin 2 is s ho wn in fig. 14.
Figure 12 :
12/43
In multiple su ppl ies se v era l l296’s can be sync hr onized as show n her e.
Page 13
APPLICATION NOTE
From fig. 14 it m ay be observed how this curren t limitation techn ique allows the sh ort circuit operation
with a very lo w output curren t value.
It is possible to reduce the maximum current value
by acting o n pin 4. On this p in a voltage of about 3.3V
Figure 13 :
Partial S ch em at ic S how ing the Current Lim iter Circuit .
is present ; by connecting a resistance a constant
current, giv en by 3.3/R, is se nt to gro und. T h is cu rrent reduces the offset voltage of the current comparator, therefore anticipating its triggering
threshold.
Figure 14a :
Current Limiter Waveforms.
13/43
Page 14
APPLICATION NOTE
Figure 14b :
Figure 14 c :
Load Current in Sh ort Circ uit Condit ions
(V
= 40V, L = 300µH, f = 100KΩ).
i
Current at Pin 2 when the Output is
Short Circu ited.
RESET
The reset function is of great importance when the
device is used to suppl y micro proces sors, logic devices, and so on. This function differentiates the
L296 device from all previous devices. The block
diagram of the function is shown in fig. 15. A reset
signal is generated wh en the output voltage is within
the limits requi red to supply the m icroproces sor correctly.
The reset function is realized through the use of 3
pins : the reset input pin 12, the reset delay pin 13
and the reset output pin 14. When the voltage on pin
12 is sm al ler t h an 5V the c om par ator output is h igh
and the reset ca pac itor is not charged bec ause the
transistor Q is saturated and the voltage on pin 14
is at low level, since Q 2 is sat urated, t oo. Wh en the
voltage on pin 12 goes above 5V, the transistor Q
switches OFF and t he cap acitor can sta rt to char ge
through a cur re nt gen er at or of about 100µA. When
the voltage on pi n 13 goes ab ove 4.5V the output of
the related compa rato r switches low and t he pin 14
goes high . A s th e out put c onsis ts o f a n open col lector transistor , a pull-up extern al resis-ta nce is required. In contrast, when the reset input voltage goes
below 5V, less a hysteresis voltage of about 100mV,
the compara tor triggers again and instantan eously
sets the voltage on pin 14 low, therefore forcing to
saturation the Q1 transistor, that starts the rapid discharge of the capa citor . Obvio usly , the res et dela y
is again pres e nt when th e v oltage on pin 13 is allowed to go under 4.5V .
To achieve switching operations without uncertainties the two comparators have been provided with
an hysteresis of about 100mV. In every operating
condition the reset switching is guaranteed with a
minimum reset input of 4.75V, the value requi red for
correct ope ra ti on of the micropr oc es s or e ve n in the
presence of th e mi nim um V
REF
value.
Normally p in 12 is us e d c onnected t o p in 10. W hen
it is connected to the output, the function may be
more properly called "reset" ; on the other hand,
when it is connect ed throug h resist ive divide r, to the
input volta ge, the funct ion i s c alled " power fail" . Fig .
16 and fig. 17 sh ow t he tw o pos s ibl e us ages.
The "pow er-fail" function is used t o predict, wi th a given advance, the drop of the regulator output voltage, due to main failures, which is enough to save
the data being processed into protected memory
areas. Fig. 18 summarizes the reset function operation.
14/43
Page 15
APPLICATION NOTE
Figure 15 :
Figure 16 :
Partial Sc hem atic S howing Reset Circuit.
For Power - On res e t the res et block is conn ec t ed as s how n her e.
Figure 17 :
To obtain a power fa il s ig nal, the r es et blo ck is c onn ec te d lik e thi s.
15/43
Page 16
APPLICATION NOTE
Figure 18 :
Waveform of the Res et Circuit.
CROWBAR
This protection function is realized by a completely
independent block, using pin 1 as input and pin 15
as outpu t. It is us ed to preven t dan ger ous over voltages fro m occurring when the output ex ceeds 20%
of rated va lue. Pin 15 is able to output a 100mA current to be se nt to the gate of a SCR which, triggerin g,
short circuits either output or the input. When connected to the input, as the SCR is triggered a fuse
in series connected to pow er supply is blown and to
bring the system bac k to operation manual inter vention is reques te d. Fi gs . 19, 20 an d 21 s how the different con figur at io ns .
Figure 19 :
Connection of Cro wbar Circuit at O utput for 5. 1V Out pu t Applications .
When the voltage on pin 1 exceeds by about 20%
the V
value the output stage is ac tiv at ed , wh ic h
REF
sends a current to the SCR gate, after a delay of
about 5µsec to make t he system insensitive to low
duration spikes. When activated, the output stage
delivers a bout 100mA ; when not activate d, it dra ins
about 5mA and s hows a lo w impedan ce to the SCR
gate to avoid incorrec t triggering due to ran dom noise. If the crow bar func tio n is not us ed co nnect p in 1
to ground.
16/43
Page 17
APPLICATION NOTE
Figure 20 :
Figure 21 :
Connectio n of Cr owbar Circuit at O utput for Output Vo lt age s ab ov e 5. 1V .
Connectio n of Cr owbar Circuit to P ro te ct Input. When trigg ere d, the s cr blo ws t he fus e.
INHIBIT
The inhibit input (pin 6) is TT L compatible and is ac tivated when the v olta ge exceed s 2V an d deacti vated when the voltage goes under 0.8V. As may be
seen in the block diagram, the inhibit acts on the power transistor, instantaneously switching it off and
also acts on the soft-s tart, dischar ging i ts capacit or.
When the function is unused, pin 6 must be grounded.
THERMAL P ROTECTI ON
The thermal protection function operates when the
junction tempe rature reaches 150 °C ; it acts directly
on the power stage , immediately switchin g it off, and
on the soft-start capacitor, discharging it. The thermal protection is provided with hystere s is and, t herefore, after an intervention has occurred, it is
necessary to wait for the junc tion tempe rature to decrease of about 30°C below the intervention threshold.
APPLICATIONS
Though the L29 6 is de signe d for step- down regula tor configurat ions it may be us ed in a varie ty of other
applications. We will now examine these possibilities and show how th e capabilitie s of the d evice may
be extende d.
In fig. 22 the c om ple te typi ca l application is sh own,
where all the functions available on the device are
being used. This c ir cu it deli ve rs to t he lo ad a m ax imum current of 4A and a voltage which is established by the v oltage divider constituted by R
and R
7
resistanc es. The followi ng table is helpful f or a quick
calculation of some sta ndar d output voltag es :
Resistor Value for Standard Output Voltages
V
o
12 V
15 V
18 V
24 V
To obtain V
o
= V
REF
to the output, therefore eliminating both R
R
8
4.7 kΩ
4.7 kΩ
4.7 kΩ
4.7 kΩ
R
7
6.2 kΩ
9.1 kΩ
12 kΩ
18 kΩ
the pin 10 is d ir ec t ly c on nec t ed
and R8.
7
The switc hin g f req uen cy is 100 k Hz .
8
17/43
Page 18
APPLICATION NOTE
Figure 22 :
C7, C8 : EKR (ROE)
Schematic , PC B Lay out an d S uggested Comp onent Values for t he E v alu at ion C ir cu it us ed t o
characteri ze the L296. This is a t yp ic al s tepdown applic ation which exe rcis es all the devi ce ’s
functions.
SUGGESTED INDUCTOR (L1)
Core Type No
Magnetics 58930 A2MPP
Thomson GUP
20 x 16 x 7
18/43
Turns
43 1.0 mm.
65 0.8 mm. 1 mm.
Gauge
Wire
Air
Gap
SUGGESTED INDUCTOR (L1) (continued)
Core Type No
Turns
Siemens EC 35/17/10
(B6633
VOGT 250 µH Toroidal Coil, Part Number
5730501800
G0500 - x 127)
& -
40 2 x 0.8 mm.
Wire
Gauge
Page 19
APPLICATION NOTE
Figure 23 :
Oscillosc op e P hot og ra phs S howing
Main Wavef or m of the F i gur e 22
Circuit.
The oscilloscope photographs of the main waveforms ar e shown in fig. 23 . The o utput volt age ripple
∆
V
depends on the current ri pple in the coil and on
o
the perfor m anc e of the output c apac itor at the switching frequency (100kHz). A capacitor suitable for
this kind of applica tion must h ave a lo w ESR and be
able to accept a high current ripple, at the working
frequency . For this application the Roe derstein EK R
series capac itors have bee n selected, desi -gned for
high freque nc y ap plic a ti ons (> 20 0k Hz ) an d ma nufactured to s how low E S R value a nd to acce pt high
current r ipples . To min imiz e th e effect s of ESR, two
100µF/40V capacitors have been connected in parallel. The behav iour of the impedanc e as a function
of frequenc y is s hown in fig. 24.
Also the sel ection of the catc h diode requires s pecial
care. The best c hoice is a Sc hottk y diod e whic h m inimizes the losses because of its smaller forward
voltage drop and greater switching frequency rate.
A possi ble li mitat ion c omes f rom the b ackwar d v oltage, that gene ra lly re ac hes 40 V m ax .
When the full input voltage range of the device is required in this application it is possible to use super fast
siodes with 35 to 50ns rated recovery time, where no
more problems on the backward voltage occur (on the
other hand, they show a greater forward voltage). The
use of slower diodes, with trr = 100ns or more is not
recommended ; The photographs in fig. 25 show the
effects on the power current and on the voltage on pin
2, due to the diodes showing different speeds. Diodes
showing trr greater than 35-50ns will reduce the overall efficiency of the system, increasing the power dissipated by the device.
The third component requiring care is the inductor.
Fig. 22a shows the part numbers of some types
used for testi ng. Beside s having th e required in ductance value, the coil has to show a very high saturation current.
Therefore, a correct dimensioning requires a saturation current above the maximum value of I
2L
, the
current lim it t hr es hold .
To achieve high saturation with ferrite cores an air
gap between the two core halv es must b e provided ;
the air gap causes a leakage flux which is radiated
in the surroundin g space. To bet ter limit this phenomenon "pot cores" may be used, whose geometry
is such to better li mit the flux radiated t o the out side.
Using toroidal cores, for instance of Magnetic 58930A2 moly-permalloy kind, both the requirements of high
saturation and low leakage flux are satisfied. The saturation is softer that the saturation shown by the ferrite materials. The air gap is not concentrated in one
area, but is finely distributed along the whole core ; this
gives the low leakage flux value.
Careful selec tion of the exter nal compo nents therefore allows t he realizati on of a power s upply sy stem
whose benef its ar e s ignificant whe n c om par ed to a
system w ith the same performance bu t realized w ith
the linear tec hn ique.
19/43
Page 20
APPLICATION NOTE
Figure 24 :
Typical Impedance/Frequency curv es
for EK R Capa citors.
Figure 25 :
Oscillos co pe P hotographs S ho wing
the Wavefor m ob t aine d with Diodes
having Diffe ren t t
Values.
rr
LOW COST APPLICATION AND PREREGULATOR
Fig. 26 shows the low cost application of a 4A and
V
= 5.1V power sup ply . A mi nim um am oun t of es-
o
sential external components is required, which are
necessary for correct operation. It is impossible to
save other components, specially the soft-start capacitor. Without so ft-start, the syst em cann ot reach
the steady state and there is also a serious risk of
damaging t he d ev ic e.
This ap plication is very well su ited not on ly as a lowcost powe r supply, but als o as pre-reg ulator for postregulators distributed in different circuit points, or
even on different boards (fig. 27). The post-regulators may be selected among the low-d rop types, li ke
L4805 and L387 for example, still obtaining a high
efficiency, combined with an excellent regulation.
The use o f L387 devic e allows us to us e also the reset functio n, us eful t o po wer a m ic ro pr oc es so r.
20/43
Page 21
APPLICATION NOTE
SWITCHING vs LINEAR
Switching regulators are more efficient than linear
types so the tr ansfor mer and he atsink can be s mal ler and cheape r. B ut how mu ch ca n yo u gain ?
We can est imate the sav ings b y comp aring e qui valent linear and switching regulators. For example,
suppose that we wa nt a 4 A /5 V su pply .
(a good approximation is 8ms for t1 at mains frequency of 50Hz and 10.000µF for C, t he filt er cap acitor af ter t he br idge). T heref or e V
≅ 1.6V. Since
imin
operation mus t be guaranteed even when the mains
voltage fall s 20%, the nomina l voltage on load at the
terminals o f the reg ulat o r m us t be :
V
V
nom
i min
= = = 13.25V
0.8 0.8
10.6
To allow ev en a s m all margin we have to c hoos e :
= 14V
V
nom
The power that th e series elem ent must dis sipate is
therefore :
P
= (V
d
Vo) Io = 36W
nom
and a heatsink will be necessar y w it h a ther m al r esistance of :
R
th heats.
= 0.8°C/W
and the trans form er m us t sup ply a power of :
P
= 14 x 4 = 56W
diss
It must therefor e be dimensio ned for :
PD = = 62VA
56
0.9
Linear
For a goo d linear regula tor the min imum dropou t will
be at least 5V at 4A. The minimum input voltage is
given by :
V
= Vo + V
i min
where :
I
o t1
≅
V
ripple
Switching
drop
= = 3.2 V
C 10 x 10
(L296)
1
+V
4 x 8 x 10
ripple
2
– 3
– 3
Assuming the same nominal voltage (14V), the L296
data sheet indicates that the power dissipated in this
case is only 7W. And this power is dis si pated in two
elements ; the L296 itself and the recirculation diode.
It follows tha t the transformer mus t be roughly 30 VA
and the heatsi nk ther mal r esist ance about 11° C/W .
+Linear +Switching
Transformer
Heat sink
62 VA
0.8 °Χ/W
30 VA
11 Χ/W
This comparison shows that the L296 switching regulator allows a saving of roughly 50% on the cost of the
transformer and an impressive 80-90% on the cost of
the heatsink. Considering also the extra functions integrated by the L296 the total cost of active and passive
components is roughly the same for both types.
Finally , it is imp ortant to n ote that a l ower pow er dissipation m ea ns that the ambient t em p era t ure in the
regulator e nclosur e can b e lower - particul arly w hen
the circuit is enclosed in a box - with all the advantages cooler operation brin gs .
21/43
Page 22
APPLICATION NOTE
Figure 26 :
A Minimal C om pon ent Cou nt 5.1V / 4A Su ppl y.
Figure 27 :
(*) L2 and C2 are necessary to reduce the switching frequency spikes.
The L296 may als o be used as a prer egulator in dis trib ut ed s upp ly sy s tem s .
22/43
Page 23
APPLICATION NOTE
If for some reas on it is nec essary to use higher supply voltage s the sw itching technique , and he nce the
L296, becomes even more advantageous.
POWER SUPPLY COMP LETE WITH
TRANSFORMER
Fig. 28 show s a powe r supp ly com plete of trans former, bridge and filter, with regulation on the output
voltage fr om 5.1V to 15V .
As alre ady stated abo ve, the output c apacitors have
to show some speciale features, like low ESR and
high current ripple, to obtain low voltage ripple values and high reliability. The input filter capacitors
must not be neglected because they have to show
excellent features, too, having to supply a pulsed
current, re quir ed by the devic e at t he s wi t ch ing frequency. The current ripple is rather high, greater
than the load current. For this application, two parallel con nected 3300µF/50V EYF (ROE) capacitors
have been us ed.
Figure 28 :
A Typical V ar iab le S upply show ing the Mains Trans f or me r.
POWER SUPPLY WITH MAINS SWITCHING PREREGULATOR
When it is desirable to eliminate the 50/60Hz transformer - in po rtable or v olume- limited e quipm ent-a
mains preregu lator can be added t o reduce the in put
voltage to a lev el a cc ep ta ble fo r the L2 96.
In this case the pre-r egulator circui t is conn ected t o
the primary of the transformer which now operates
at the switching frequency and is therefore smaller
and lighter.
Using a UC3840 which includes the feed-forward
function it is possible to compensat e mains v ariation
within wide l imits. Th e secondar y voltage is there fore only affected by load variations. Using one or
more L296s as postre gulators, feedb ac k to the pri mary is no longer necessary, reduces the complexity and cos t of the transform er w hic h needs only a
single sec onda ry wi nding.
Fig. 28A shows a multi-output supply with a mains
preregulator.
Vo = 5.1 to 15V
I
= 4A max. (min. load current = 100mA)
o
ripple ≤ 20mV
load regulation (1A to 4A) = 10mV (V
line regulation (200V ± 15% and to I
= 5.1V)
o
= 3A) = 15mV (Vo = 5.1V)
o
23/43
Page 24
APPLICATION NOTE
Figure 28A:
A Multiple Output Supply using a Switching Preregulator rather than a Mains Trans-
POWER SUPPLY WITH 0 - 30V
ADJUSTABLE VOLTAGE
When output voltage s low er than 5V are requir ed,
the circuit s hown in fig. 29 ma y be us ed.
Calibrati on is performe d by groundi ng the P1 s lider.
Acting on P2, the current which flows through the
10kW resistor is fixed approximately 2.5mA to obtain an output vo ltage of 30V . The equiv alent c irc uit
is shown in fig. 30.
Acting now on the slider of P1, the current flowing
through the div ider may be v aried. The new equivalent circui t is s hown in fig. 31.
Reducing t he cu rr ent f l owing, also t h e v oltage drop
across the 10kΩ resistance is reduced, together
with V
that V
exceeds V
direction and V
When I
. When the current reaches zero, it follows
O
O
= V
1
. When the voltage on the slider of P1
REF
, the current start to flow in opposite
REF
begins to decre as e below 5V.
O
x 10kΩ = V
it follows that VO = 0.
REF
DUAL OUTPUT REGULATO R
The application shown in fig. 32 is specially interesting because it provides two output voltages. The
first voltage, the main one, is directly controlled by
the feedbac k circuit. Th e second volt age is obtai ned
through an aux ili ary w inding.
It often happens, when microprocessors, logic devices etc., have to be power supplied, that a main
5V outp ut and a n au xilia ry + 12V or –1 2V ou tput a re
required, the latter with lower current requirements
(100 to 200mA) and a s tabilization lev el not excessively h igh. As the auxiliary power supply is obtained
through a complet ely se parat ed win ding, it is poss ible to obtain either a positive or negative voltage
(compared to the m ain v oltag e or also a co mpletel y
isolated vo ltage. With V
40V, V
= 5.1V and IO = 2.5A, the auxiliary -
O
variable between 20V and
i
12V/0.2A vo ltage is within a ±2% tolera nc e.
24/43
Page 25
APPLICATION NOTE
Figure 29:
Variable 0-30V supply illustrating how output voltages below 5.1V are obtained.
Figure 30:
When setting up the figure 29 circuit
the slider of P1 is grounded, giving
the equivalent circuit shown here,
and P2 adjusted to give an output
voltage of 30V.
Figure 31:
Partial Schematic showing Output
Voltage Adjustment of Figure 29.
25/43
Page 26
APPLICATION NOTE
Figure 32:
Dual output regulator showing how an additional winding can be added to the inductor to
generate a secondary output.
PERSONAL COMPUTER POWER SUPPLY
Using two mutually synchronized devices it is possible to obtain a four output power supply suitable
for power a microprocessor system.
V
= 5.1V/4A
01
V
= 12V/2.5A (u p t o 4A )
02
26/43
V
= –5V/0.2A
03
V
= –12V/0.2A
04
The schema ti c diagr am is shown in fig. 33. The 5V
output is also provided with the reset function, that
is availab le also for the 12V out pu t.
Page 27
APPLICATION NOTE
Figure 33:
Microcomputer Supply with 5V, –5V, 12V and –12V Outputs.
27/43
Page 28
APPLICATION NOTE
Figure 34:
Battery charger circuit illustrating how the device is used to regulate the output current.
The feedback is direct, no other external c omponent
is used and no calibration is therefore required. An
output is obtained with the accuracy of the r eference
voltage (±2%). For the 12V output, by using a resistive divider with 1% resistance an output is obtained whose sp re ad is within ±4%.
The two devices are mutually synchronized not to
give rise to intermodulation which could generate
unpleasant noise and, at the same time, a further
component saving is achieved.
The crowbar function is implemented on both 5V
and 12V outputs, using a single SCR connected to
the input. The latter, by discharging to ground the
electrolytic filter capa ci tors , blows the f us e c on nected in series with the devices power supply. In this
way, should a f aulty be presen t on either of the main
outputs, the supply is switched off for whole system.
To inhibit bo th the dev ices with a sin gle input signal,
it is possi ble to conne ct the t wo inhi bit in puts (p in 6)
together; the 5kΩ resistanc e is used when the inh ibit
input is left open. If this inp ut is no t used it must be
grounded.
As may be noted in the diagram, to obtain the two
auxiliary vo ltages is very simp le and cost-effec t iv e.
It is suggested that the diodes are fast types (trr <
50ns); sho uld slower diodes be requ ired some more
turns have to be added to the aux il iar y winding.
BATTER Y CHARGER
When the device has to be used as current generator it is nec essar y to a void the i nternal cur rent limiter is operated fig. 34 shows the circuit realizing
constant current limitation. In this way it is possible
to obtain a 6V, 12V and 24V battery charger. For
each of thes e vol tages a max. c urrent of 4A i s av ailable, which is large enough for batteries up to 4045Ah (for 12V type). With reference to the electric
diagram through the 2kΩ potentiometer the max.
output curren t is set, whil e through the R 1 – R2 output divider the voltage is set. (R1 may be replaced
by either a potentiometer or a 3 position switch, to
directly ob tain the three 6 V, 12V and 24V vol tages).
HIGHER INPUT VOLTAGE
Since a maximum input voltage of 46V (operating
value) may be applied to the device the diagram
shown in fig. 35 may be used when it is necessary
to exceed th is lim it.
This system is particularly useful when operating at
low outpu t voltage s. In this c ase a m ean curr ent I
iDC
which has a low value when compared to IO is obtained. In fact, since V
I
(assumin g the devic e has an i deal e ffici ency ), it
iDC
follows that I
= IO (TON/T).
iDC
= Vi (TON/T) and Vo Io = V
o
i
28/43
Page 29
APPLICATION NOTE
Assuming t o be :
V
= 5V Io = 4A and V3 ≈ 37V
o
it follows that :
T
/T = Vo / Vi =
ON
= 4 x 0.135 = 0.54A .
I
iDC
With inp ut voltage 50V and I
5
= 0.135
37
= 4A, the external tran-
o
sistor dissipates about 7W. High good efficiency is
still achieved, around 74%; in the real case, considering also the device losses, an efficiency around
62% is achie v ed.
Figure 35:
The ma ximum i np ut v olta ge can be ra ise d abov e 46V by a dding a t ra nsist o r as sho wn h ere .
During out put s hort c irc uits the external tr ansist or i s
not overloaded because in this condition I
iDC
reduces to values lower than 100mA. It is not possible
to realize this application with series post-regulator
because the efficiency would be unac c eptable low.
MOTOR CONTROL
The L296 is also suitable for use in motor controls
applications. Fig. 36 shows how to use the device
to drive a motor with a maximum power of about
100W and provid ed with a tachometer generato r for
a good speed control.
Figure 36:
With a tac ho dy nam o sup plyi ng f eed back t he L 296 can be u sed as a mo tor spe ed c ontro lle r.
29/43
Page 30
APPLICATION NOTE
HIGHER CURRENT REGULATORS
It is possible to increase the output current to the
load above 4A throu gh the us e of an ex ternal p ower
transistor. Fig 37 shows a suitable circuit. The frequency is ar ound 40kHz to preven t t he device from
loosing exc essive power due to switching on the external power.
The circuits shown in fig. 38 and fig. 39 show how
current limitation may be realized in two different
ways: throu gh a sensing resistor connec ted in series
with the c ollector of the ext ernal power t ra ns is tor or
through a curr en t tr ans for m er .
Figure 37:
The output current may be increased by adding a power transistor as shown in this circuit.
In the first case, the sensing resis tor is a low value
resistor able to withstan d the max imum lo ad cur rent
required. The V
than its V
CEsat
ries to the collector V
of the power transistor is higher
CE
; when the re sistor i s connec ted in se-
is reduced; consequently
CE
since the overall dissipated power is constant, the
power dis sipated by t he sen sing res istor is s ubtrac ted from that dis s ipated by the po wer tra ns is to r.
The val ues i ndica ted in f igs . 38 and 39 reali ze ad justable current limitation for load currents around
10A.
30/43
Page 31
APPLICATION NOTE
Figure 38: This circuit shows how current limiting for the external transistor is obtained with a sensing
resistor.
Figure 39: A small transformer is used in this example for current limiting.
31/43
Page 32
APPLICATION NOTE
Figure 40: A step-up Converter using a Power MOS Transistors.
STEP-UP CONVERTER
With the L296 it is also easy to realize a step-up co nverter, by using a MOS power transistor. Fig. 40
shows the elec tric diagram of the step-up co nverter.
The frequency is 100kHz, operation is in discontinuous mode and the device internal current limiter
is used. Theref ore no other external protection is r equired.
The input voltage could be a 12V car battery, from
which an out put v olt ag e of 35V m ay be ob ta ine d.
Lower outpu t vol ta ge of 35V may be obt ain ed.
Lower outpu t voltage values may be obtained by reducing the value of R7.
DESCRIPTION OF OPERATION
Fig. 41 shows the diagram of the circuit realizing the
step-up con fi gur ation.
When the transistor Q1 is ON, the inductance L
charges its el f w ith a c ur re nt giv en b y:
V
i
i
=
t
L
L
The peak cur re nt in the c oil is:
V
i
=
I
peak
T
ON
L
In this configuration, unlike the step-down configuration, the peak current is not strictly related to the
load curre nt. The energy stor ed in the coil is succes sively discharged across the load when the transi-
Figure 41: Basic Schematic for Step-up Configu-
rations.
stor switches OFF. To calculate the I
load curre nt,
o
the following procedure m ay be used:
1
L I2peak = Vo Io T
2
2
2
peak
L I
=
I
o
2 V
V
=
T
2 L Vo T
o
2
T
i
ON
For a greater output power to be available, the internal limit ation mus t be replac ed by an ex ternal ci rcuit to protec t the external power devices and to limit
the current pea k to a conveni ent value. A dual comparator (L M393) w ith hyster esis is used to avoid uncertaintes when the current limitation operates.
The electr ic dia gr am is s ho wn in fig. 42.
32/43
Page 33
APPLICATION NOTE
Figure 42: High power step-up converter showing how the current limiting function is realized exter-
nally.
33/43
Page 34
APPLICATION NOTE
LAYOUT CONSIDERATIONS
Both for linear and switching power supplies when
the current exceeds 1A a careful layout becomes
important to achieve a good regulation. Th e problem
becomes more evident when designing switching
regulators in which pulsed currents are over imposed on dc curr ents. In dr awing the lay out, therefo re,
special care has to be taken to separate ground
paths for signal cur re nts an d gro und pat h s for load
currents, which generally show a much higher value.
distributed inductances, producing ringing phenomena and radi ating noise in to the surr oundi ng space.
The recir c ulation dio de mu s t be c onnected c lose to
pin2, to avoi d givi ng ris e to dang erous extr a negative voltages , due to t he dis t rib uted inductance .
Fig. 43 and fig. 44 res pectively sh ow the ele ctric diagram and the as sociated layout wh ich has been realized taking these problems into account. Greater
care must be taken to follow these rules when two
or more mutually synchronized devices are used.
When ope rating a t hi gh frequ encie s t he path le ngth
becomes ex tre m ely important. T he paths intro duc e
Figure 43: Typical application cir c uit s howing how the si gnal and power gr ou nds ar e c onnected.
SUGGESTED INDUCTOR ( L1)
Core Type No.
Magnetics 58930 A2MPP
Thomson GUP
20 x 16 x 7
Siemens EC 35 /17 /10
(B6633 & - G0500 x 127)
VOGT 250µH Toroidal Coil, Part Number 5730501800
34/43
Turns
43 1.0mm.
65 0.8mm. 1mm.
40 2 x 0.8mm.
Wire
Gauge
Air
Gap
Resistor Va lu e for Standard Output V ol t ages
V
12V
15V
18V
24V
o
R8 R7
4.7k
Ω
4.7k
Ω
4.7k
Ω
4.7k
Ω
6.2kW
9.1k
12k
Ω
18k
Ω
Ω
Page 35
APPLICATION NOTE
Figure 44: A Suitable PCB Layout for the Figure 43 Circuit realized in Accordance with the Sugges-
tions in the Text (1:1 scale).
HEATSINK DIMENSIONING
The heatsink dissipates the heat produced by the
device to prevent the internal temperature from reacing values which could be dangerous for device
operation a nd r elia bility.
C
C
C
h
R
jc
R
h
is the thermal capacitance of the die plus
that of the tab.
is the thermal capacitance of the heatsink
is the junction case thermal resistance
is the heatsink thermal resistance
Integrated ci rcuits in pla stic package m ust never ex ceed 150°C ev en in worst cond ition s. This lim it has
Figure 45.
been set becaus e t he enc aps ulating resin has pr oblems of vitr if ic ation if subjec t ed to tem per atur es of
more than 150°C for long periods or of more than
170°C for short periods. In any case the temperature accelerates the ageing process and therefore
influences the device life; an increase of 10°C can
halve the device life. A well designed heatsink
should keep the junction tem perature between 9 0°C
and 110°C. Fig. 45 shows the structure of a power
device. As demonstrated in thermo-dynamics, a
thermal circui t can be conside red to be an electr ical
circuit wher e R1, R2 represent the ther mal resistan-
Figure 46.
ce of the el ements (exp ressed in °C/W) (se e fig. 46).
C1,C2 are the thermal capacitance (expressed in
°C/W)
I is the dissipated power
V is the temperature difference with respect to
the reference (ground)
This circuit can be simplified as shown in fig. 47,
where:
35/43
Page 36
APPLICATION NOTE
Figure 47.
But since the ai m of this sectio n is not that of st uding
the trans istors, the c ircu it can be f urther re duced as
shown in fig ur e 48.
Figure 48.
If we now conside r the grou nd potent ial as amb ient
temperature, we hav e:
T
= Ta + (Rjc + Rh)Pd a)
j
T
– Ta – Rjc P
j
=
R
h
= Ta + Rh Pd c)
T
c
P
d
d
b)
Thermal c ontact resis tance depend s on variou s factors such as the mounting, contact a rea and planarity of the heatsink. With no material between
thedevice and heatsink the thermal resistance is
around 0.5°C/W; with silicone grease roughly
0.3°C/W and wit h s ili co ne gr ease plus a m ic a i ns ulator about 0.4° C /W . Se e fig. 49.
In application whe re one extern al transist or is used
together, the dissipated power must be calculated
for each c ompon ent. The var ious junc tion temper ature can be calculated by solving the circuit shown
in fig. 50.
This appl ies if the dissi pating elements are fairly close with res pec t to t he dis s ipator dime ns ions, other-
wise the di ssipator can no lo nger be consi der ed as
a concentrated constant and the calculation becomes difficult.
This conc ept is better e xp lained by the graph i n fig.
51 which shows the case (and therefore junction)
temperature variation as a function of the distance
between two dissipating elements with the same
type of heats ink and the same dis s ipa te d pow er .
Th graph in Fig. 51 refers to the specific case of two
elements dissipating the same power, fixed on a
rectangular aluminium plate with a ratio of 3 between the tw o s ides .
The temperature jump will depend on the total dissipated power and on the total di ssipated po wer and
on the devices geometrical positions. We want to
show that there exists an optimal position between
the two devic e s:
Figure 49.
Figure 50.
1
d =
⋅ side of the plate.
2
Fig. 52 s hows the t rend of th e tempe rature as a function of the distance between two dissipating ele-
36/43
Page 37
Figure 51.
Figure 52.
APPLICATION NOTE
37/43
Page 38
APPLICATION NOTE
APPENDIX A
CALCULATING SYSTEM STABILITY
This section is intended to help the designer in the
calculation of the stabili ty of the whole syst em.
Figure A1 shows t he entire control syst em of the
switching r egulator.
The problem which arises immediately is the transfer function of the PWM block and output stage,
which is non-linear. If this function can be considered linear the analysis is gre at ly s im plifi ed.
Since the circuit operates at a constant frequency
and the interna l logic is fairl y fast, the error introd uced by assuming that this function linear is minimized. Factors which could contribute to the
non-linearity are an excessive delay in the output
power transistor, ringing and parasitic oscillations
generated in the power stage and non-linearity in-
In the case of the L29 6, in which the power transistor
is internal and driv en by w ell-control led and efficient
logic, the contribution t o non-linea rity is furth er reduced.
For the as sumption of linearity to be valid t he cut- off
frequency of the LC filt er mu st be m uc h lowe r than
the switc hing freq uency. In fact, s witching operation
introduces singularities (poles) at rougly half the
switching frequency. Consequently, as long as the
LC filter is still dominant, its cut-off frequency must
be at least an order of magnitude lower than the
switching frequency . This con dition is not, how ever,
diffucult t o respect. The c haracteristics of LC filter affect the output voltage waveforms; is generally
much less than an order of magnitude below the
switching frequency.
troduced by magnetic part.
Figure A1: The control Loop of the Switching Regulator.
GAIN OF THE PWM BLOCK AND OUTPUT
STAGE
The equation which link s V
T
ON
= Vi
V
o
T
to Vi is:
o
A variatio n ∆ TON in the conduct ion tim e of the switching trans istor ca uses a cor responding v ariation in
the output volt ag e, ∆ Vo, giving:
∆V
∆T
ON
V
o
i
=
T
Indicating with Vr the output volt age of the e rror amplifier, and with V
the ampli tude of the ramp (the dif -
ct
ference between the maximum and minimum
values), T
lues), T
and equal to T when V
is zero when Vr is at the minimum v a-
ON
is zero when Vr is at the minimum value
ON
is at a maximum. Conse-
r
quently:
∆T
∆V
ON
T
=
V
ct
r
The gain is given by:
38/43
∆V
∆V
V
o
i
=
V
ct
r
Since Vct is absolute ly constant t he gain of t he PWM
block is directly pr oportional to the supply voltage V
Figure A2: Open Loop Frequency and Phase
Response of Error Amplifier
.
i
Page 39
APPLICATION NOTE
The error amplifier is a transconductance amplifier
(it trasforms a voltage variation at the input into a
current variation at the output). It is used in open
loop configuration inside the main control loop and
its gain and frequen cy resp onse are det ermined by
a compens ation network c onnected between its output and groun d.
In the application a series RC network is recommended which giv es high system gain at low fre quency
to ensure good pr ecis ion and mains ripp le reje ction
and a lower gain at high fre que nc ies t o e ns ur e s t ability of t he system. F igur e A2 shows t he gain and
phase curves of the uncompens ated error amplif ier.
The ampl ifier has one pole at abou t 7kHz and a phase shift which reaches about –90° at frequencies
around 1MHz .
The introdu ction of a series network R c Cc bet ween
the output an d ground modi fies the c ircuit as s hown
in figure A3.
Figure A4 shows the gain and phase curves of the
compensa ted er r or a mp lif ie r.
Figure A3: Compensation Network of the Error
Amplifier
CALCULATING THE STABILITY
For the stability calculation refer to the block diagram show n in fig ur e A 5.
The transfer func t ions of t he various blocks are rewritten as follows.
The simplified transfer function of the compensated
error amplif i er i s:
G
= gm Zc =
EA
1 + s R
s C
c Cc
c
g
1
2500
=
m
The DC gain must be considered equal to:
= gm R
A
o
o
PWM bloc k and output stage:
V
i
=
G
PWM
V
ct
LC FILTER:
G
LC
1 + s C ⋅ ESR
=
2
LC + s C ESR + 1
s
Where ES R is the equiv alent series resistance of t he
output capac itor which introduces a zero at high frequencies , indispensable for s ystem stability. Such a
filter introd uces two poles at the ang ular fr equenc y.
1
ω
=
ο
LC
√
Refer to the lit er atur e f or a mo re detail ed analysis.
Feedbac k: c ons is ts of the block labell ed α
α = 1 when V
= V
o
(and therefore Vo = 5.1V)
REF
and
R2
α =
R1 + R2
when Vo > V
REF
Figure A4: Bode Plot Showing Gain and Phase
of Compensated Error Amplifier.
Figure A5: Block Diagram Used in Stability Cal-
culation.
39/43
Page 40
APPLICATION NOTE
To analyse t he stability w e will use a Bode diag ram.
The values of L and C necessary to obtain the required regulator output performance, once the frequency is fixed, are calculated with the following
formulae:
L =
C =
(V
(V
– V
i
o
Vi f ∆I
– V
i
o
8L f2 ∆I
) V
L
) V
o
o
L
Since this filter introduces two poles at the angular
frequency
1
ω
=
ο
LC
√
we place the zero of t he Rc Cc network in the same
place:
ω
1
=
z
R
c Cc
Taking i nto accou nt also the gain of the PW M bloc k,
the Bode plo t of fig ure A 6 is obt ain ed.
The slope whe re the cur ve cros s es th e ax is at 0dB
is about 40d B /d ec ade t he refore the c ir c uit is unstable.
Taking into accou nt now the z er o introduced by the
equivalent series r esistance ( ESR) of the output capacitor, we have further condition for dimensioning
the R
network. Know ing the E SR (whic h is sup-
c Cc
plied by the manufacturer for the quality components) we c an det ermine t he v alue of R
so that the
c
axis is c ro s se d at 0 dB with a s in gle slope. The zer o
introduced by t he E S R i s at t he a ngular frequency :
=
ESR ⋅ C
1
ω
zESR
The overall Bode diagram is therefore as shown in
figure A7.
Figure A6: Bode Plot of System Taking Filter
and Compensation Network into Account.
Figure A7: Bode Plot of Complete System Tak-
ing into Consideration the Equivalent
Series Resistance of the Output Capacitor.
DC GAIN AND LINE REGULATION
Indicating the open-loop gain of the error amplifier
with A
A
When Vo = V
A
, the overal l open-l oop gain of the system is:
o
= Ao
t
= Ao
t
V
V
V
V
i
ct
i
ct
R2
⋅
R1 +R2
, the gain bec om es :
REF
Consider ing the block diag ram of figure A8 and calculating the outpu t variation ∆V
tion of V
∆V
V
, from the litera t ure we ob t ain:
i
∆ V
i
o
=
o
Ao V
V
ct
V
i
i
⋅
R1 + R2
R2
caused by a var ia-
o
This espr ession is o f general val idity. In our case the
percentage variation of the reference must be added by vec tor ad dit io n.
Figure A8: Block Diagram for Calculation of Line
Regulation.
40/43
Page 41
APPENDIX B
APPLICATION NOTE
REDUCING INTERFERENCE
The main disadvantage of the switching technique
is the ge neration of i nterfer ence wh ich can r each l evels which cause malfunctions and interfere with
other equip me nt.
For each ap plication it is therefore necessary to study specific mean s to reduce t his in terferen ce wi thin
the limits al low ed by the appropriate standards .
Among the main sources of noise are the parasitic
inductances and capacitances within the system
which are charged and discharged fastly. Parasitic
capacitances originate mainly between the device
case and the heatsink, the win dings of the indu c to r
and the con nection wir es. Paras itic indu ctances are
generally found distributed along the strips of the
printed circ ui t boar d.
Fast switc hing of the powe r transistors tends to cause ringing and oscillations as a result of the paras itic
elements. The use of a diode wit h a fas t rev erse recovery ti me (trr) contribut es to a reduct ion in the noise flowing by the cu rr ent peak genera ted when the
diode is rev er s e bias e d.
Radiated interference is usually reduced by enclosing the regulator in a metal box.
To reduce conducted electromagnetic interference
(or radio fr equency int erferences - RFI) to t he levels
permitted a suitably dimensioned filter is added on
the supply line. The best method, generally, to reduce con duc t ed noise is to filter eac h output te rm inal of the regulator. The use of a fixed switching
frequency allow the use of a filter with a relatively
narrow band width. For off-line switc hing eregulators
this filter is usually costly and bulky . In contrast, if the
device is supplied from a 50/60Hz transformer the
RFI filter pro blem is gr atly re duc ed.
Tests h ave been carr ied out the laboratories of Roederstein to determine the dimensions of a mains
supply filter which satisfies the VDE 0871/6.78,
class B standard. The meas ur em ent s (see figs. B1
and B2) refer to the application with the L296 supplied with a filtered se condary voltage of about 30 V,
with V
= 5.1V and Io = 4A . Th e s witchin g f reque ncy
o
is 100kHz .
Figure B1 sh ows the resul ts obtained by in troducing
on the transformer primary a 0.01µF/250V ~ class
X capac itor (ty pe ERO F 175 3-2 10- 124). To reduc e
interfere nce fur ther bel ow t he limit set by the sta ndards an addition al indu ctive filter must be add ed on
the primary of the transformer.
Figure B2 s hows the curve s obtained by in troducing
this induct iv e filter (type E RO F 1 753- 21 0- 124) .
Measur em ents hav e als o been perf or med be yon d
30MHz; the maximum value measured is still well
below the lim i t cur v e.
Figure B1: EMI Measurements with a Capacitor Connected across the Primary Transformer with
Screen Grounded (A)
41/43
Page 42
APPLICATION NOTE
Figure B2: EMI results with the addition of an inductive filter on the mains input.
42/43
Page 43
APPLICATION NOTE
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for
the consequences of use of suc h information nor for any infri ngement of patents or other rights of third parties which may resu lt from its
use. No li cense is granted by impl icati on or other wise under any patent or pat ent ri ghts of SGS-T HOMSON M icroel ectronic s. Specification
mentioned in this publ ication are subject to change without notice . This publication supersed es and replaces all information previously
supplied. SGS-THOMSON M icroelectronics produc ts are not authorized for use as critical components in life support devic es or systems
without express written appr oval of SGS-T HOMSON M icroelectr onics.
© 1996 SGS-THOMSON Microelec tronics – Printed in It aly – All Rights Res erved
SGS-THOMSON Microel ectronic s GROUP OF COMPAN IES
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43/43
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