■ Logical “0” input voltage up to 1.5 V (high noise
immunity)
■ Internal clamp diodes
Description
The device is a monolithic integrated high voltage,
high current four channel driver designed to
accept standard DTL or TTL logic levels and drive
inductive loads (such as relays solenoides, DC
and stepping motors) and switching power
transistors.
L2293Q
VFQFPN 5 mm x 5 mm 32L
To simplify use as two bridges each pair of
channels is equipped with an enable input. A
separate supply input is provided for the logic,
allowing operation at a lower voltage and internal
clamp diodes are included.
This device is suitable for use in switching
applications at frequencies up to 50 kHz.
The L2293Q is assembled in a VFQFPN-32L 5x5
package which has exposed pad available for
heatsinking.
Figure 2.Typical minimum logic supply voltage vs junction temperature
V
SS_min
[V]
2.8
2.7
T
j
0-10-20
Table 3.Thermal data
Symbol Parameter ValueUnit
R
th(JA)
1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus
6 cm2 ground layer connected through 18 via holes (9 below the IC).
Thermal resistance junction-ambient max.
(1)
[°C]
42°C/W
4/13Doc ID 14899 Rev 3
L2293QPin connection
BOTTOM LAYER
(connected to GND)
TOP LAYER
(connected to GND)
L2293Q
2 Pin connection
Figure 2.Pin connection (top view)
Note:NC
The exposed PAD must be connected to GND pins.
NC
Figure 3.Recommended PCB layout for R
(1)
These NC pins are connected to the exposed PAD.
(2)
These NC pins can be connected to GND pins and exposed PAD.
optimization
th(JA)
L2293Q
TOP LAYER
(connected to GND)
GND pins
BOTTOM LAYER
VIA holes
(connected to GND)
Doc ID 14899 Rev 35/13
Pin connectionL2293Q
Table 4.Pin description
Pin n°NameTypeFunction
1, 18, 19, 20,
21, 22, 23
NCNot connected
2, 3, 4, 5, 6, 7, NCPins connected to the exposed PAD
8, 9, 17, 24, 28,
32
GNDGround
10OUTPUT2OOutput 2
11INPUT2IInput 2
Supply voltage for the power output stages. A non-inductive
12, 13V
S
100 nF capacitor must be connected between these pins and
ground.
14ENABLE2I
Enable 2 input, the LOW state disables the Output 3 and
Output 4.
15INPUT3IInput 3
16OUTPUT3OOutput 3
25OUTPUT4OOutput 4
26INPUT4IInput 4
27V
SS
29ENABLE1I
Supply voltage for the logic blocks. A 100 nF capacitor must
be connected between this pin and ground.
Enable 1 input, the LOW state disables the output 1 and
Output 2.
30INPUT1IInput 1
31OUTPUT1OOutput 1
6/13Doc ID 14899 Rev 3
L2293QElectrical characteristics
3 Electrical characteristics
For each channel, VS = 24 V, VSS = 5 V, TA = 25 °C, unless otherwise specified.
Table 5.Electrical characteristics
SymbolPinParameterTest conditionMinTypMaxUnit
V
= L; IO = 0; Ven = H26mA
i
I
I
SS
V
V
I
I
V
en L
V
en H
I
en L
I
en H
V
CE(sat)H
V
CE(sat)L
V
S
IL
IH
IL
IH
F
12,13Total quiescent supply current
27
Total quiescent logic supply
current
11, 15,
26, 30
11, 15,
26, 30
11, 15,
26, 30
11, 15,
26, 30
Input low voltage– 0.31.5V
Input high voltage
Low voltage input currentV
High voltage input current2.3 V ≤ V
= H; IO = 0; Ven = H1624mA
V
i
V
= L4mA
en
Vi = L; IO = 0; Ven = H4460mA
= H; IO = 0; Ven = H1622mA
V
i
V
= L1624mA
en
V
≤ 7 V2.3V
SS
> 7 V2.37V
V
SS
= 1.5 V– 10μA
IL
≤ VSS – 0.6 V30100μA
IH
SS
14, 29Enable low voltage – 0.31.5V
V
≤ 7 V2.3
14, 29Enable high voltage
14, 29Low voltage enable current V
SS
V
> 7 V2.37V
SS
= 1.5 V– 30 – 100μA
en L
14, 29High voltage enable current 2.3 V ≤ V
10, 16,
25, 31
10, 16,
25, 31
Source output saturation voltage I
Sink output saturation voltageI
= – 0.6 A1.41.8V
O
= + 0.6 A1.21.8V
O
≤ VSS – 0.6 V± 10μA
en H
V
SS
Clamp diode forward voltageIO = 600 nA1.3V
V
V
Doc ID 14899 Rev 37/13
Electrical characteristicsL2293Q
VS = 24 V, VSS = 5 V, TA = 25 °C, unless otherwise specified.
Table 6.AC operation
SymbolParameterTest conditionMinTypMaxUnit
t
rRise time
Fall time
t
f
t
t
1. See Figure 4
on
off
Turn-on delay
Turn-off delay
(1)
(1)
(1)
(1)
0.1 to 0.9 V
0.9 to 0.1 V
O
O
0.5 Vi to 0.5 V
0.5 Vi to 0.5 V
250ns
250ns
O
O
750ns
200ns
Figure 4.Switching times
Table 7.Truth table (one channel)
InputEnable
HH H
LH L
HLZ
LLZ
1. Relative to the considered channel
2. Z = High output impedance
(1)
Output
(2)
(2)
8/13Doc ID 14899 Rev 3
L2293QPackage mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Table 8.VFQFPN 5x5x1.0 32L pitch 0.50
Databook (mm)
Dim.
MinTypMax
A0.800.850.95
b0.180.250.30
b10.1650.1750.185
D4.855.005.15
D23.003.103.20
D31.101.201.30
E4.855.005.15
E24.204.304.40
E30.600.700.80
e0.50
L0.300.400.50
ddd0.08
Note:1VFQFPN stands for thermally enhanced very thin profile fine pitch quad flat package no
lead. Very thin profile: 0.80 < A ≤ 1.00 mm.
2Details of terminal 1 are optional but must be located on the top surface of the package by
using either a mold or marked features.
Doc ID 14899 Rev 39/13
Package mechanical dataL2293Q
Figure 5.Package dimensions
10/13Doc ID 14899 Rev 3
L2293QOrder codes
5 Order codes
Table 9.Order code
Order codePackagePackaging
L2293QVFQFPN 5x5x1.0 32L Tube
Doc ID 14899 Rev 311/13
Revision historyL2293Q
6 Revision history
Table 10.Document revision history
DateRevisionChanges
10-Jul-20081First release
26-Feb-20092Updated Table 3 on page 4
12-Aug-20093Updated description in coverpage
12/13Doc ID 14899 Rev 3
L2293Q
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