Datasheet EMIF01-1003M3 Datasheet (ST)

EMIF01-1003M3
1 line IPAD™, EMI filter and ESD protection in Micro QFN package
Features
Single line EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consumption:
Very thin package: 0.6 mm max
High efficiency in ESD suppression
(IEC 61000-4-2 level 4)
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and wafer level packaging
Lead free package
Easy layout and flexibility due to single line
topology
Low capacitance
(JEDEC MO-236AA compliant)

Figure 1. Pin configuration (top view)

SOT-883
IN OUT
Complies with following standards
IEC 61000-4-2 level 4 input and output pins:
– 15 kV (air discharge) – 8 kV (contact discharge)
MIL STD 883G - Method 3015-7 Class 3B (all
pins)
Applications
Where EMI filtering in ESD sensitive equipment is required:
Keyboard for mobile phones
Computers and printers
Communication systems
MCU boards
GND

Figure 2. Basic cell configuration

Input
R = 100
C = 30 pF typ. @ 0 V
LINE
Ω
Output
Description
The EMIF01-1003M3 is a 1 line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference.
This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 15 kV on all pins.
TM: IPAD is a trademark of STMicroelectronics
November 2010 Doc ID 13976 Rev 2 1/11
www.st.com
11
Characteristics EMIF01-1003M3

1 Characteristics

Table 1. Absolute ratings (limiting values at T
= 25° C unless otherwise specified)
amb
Symbol Parameter Value Unit
V
T
ESD discharge IEC 61000-4-2 air discharge on input and output pins
PP
ESD discharge IEC 61000-4-2 contact discharge on input and output pins
Junction temperature 125 °C
T
j
Operating temperature range -40 to + 85 °C
T
op
Storage temperature range -55 to +150 °C
stg
15
8

Figure 3. Electrical characteristics (definitions)

I
Symbol Parameter
V = Breakdown voltage
BR
I = Leakage current @ V
RM RM
V = Stand-off voltage
RM
V = Clamping voltage
CL
R=
D
I = Peak pulse current
PP
I = Breakdown current
R
C = Line capacitance
line
F
= Cut-off frequency
O
Dynamic resistance
V
V
CL
BR
I
F
V
F
V
RM
I
RM
I
R
I
PP
V
kV
Table 2. Electrical characteristics (T
amb
= 25° C)
Symbol Test conditions Min. Typ. Max. Unit
V
BRIR
I
RM
R
I/O
C
line
= 1 mA 5 6.5 8 V
VRM = 3 V per line 100 nA
Tolerance ± 10% 100 Ω
VR= 0 VDC, V
= 30 mV, F = 1 MHz 30 39 pF
OSC
S21 F = 900 MHz -25 dB
2/11 Doc ID 13976 Rev 2
EMIF01-1003M3 Characteristics
Figure 4. S21 attenuation measurement
(V
= 0 V)
bias
dB
0.00
-5.00
-10.00
-15.00
-20.00
-25.00
F (Hz)
-30.00
100.0k 1.0M 10.0M 100.0M 1.0G
I-O
Figure 6. ESD response to IEC 61000-4-2
(+15 kV air discharge)
INPUT
Figure 5. Line capacitance versus reverse
voltage applied (typical value)
C
(pF)
3.50E+01
3.00E+01
2.50E+01
2.00E+01
1.50E+01
1.00E+01
5.00E+00
0.00E+00
LINE
VR(V)
012345
Figure 7. ESD response to IEC 61000-4-2
(- 15 kV air discharge)
INPUT
OUTPUT
OUTPUT
Doc ID 13976 Rev 2 3/11
Application schematic EMIF01-1003M3

2 Application schematic

Figure 8. Application schematic

Keypad protection
Key_Row_1
Key_Row_2
Key_Col_y
IN OUT
GND
IN OUT
GND
IN OUT
GND
4/11 Doc ID 13976 Rev 2
EMIF01-1003M3 Ordering information

3 Ordering information

Figure 9. Ordering information scheme

EMIF yy - xxx z Mx
EMI Filter
Number of lines
Information
x = resistance value (Ohms z = capacitance value / 10(pF)
Package
M3 = SOT-883
)
Doc ID 13976 Rev 2 5/11
Package information EMIF01-1003M3

4 Package information

Epoxy meets UL94, V0
Lead-free packages
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com ECOPACK

Table 3. SOT-883 dimensions

®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
E
Dimensions
Ref.
D
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
.
A 0.45 0.50 0.18 0.2
A1 0.00 0.05 0.00 0.02
A
A1
L1L
2
b
e
1
3
b1
b 0.10 0.15 0.20 0.04 0.06 0.08
b1 0.45 0.50 0.55 0.18 0.20 0.22
D 0.60 0.24
E 1.00 0.39
e 0.35 0.14
e1 0.65 0.26
L 0.20 0.25 0.30 0.08 0.10 0.12
e1
L1 0.20 0.25 0.30 0.08 0.10 0.12
Figure 10. Footprint (dimensions in mm) Figure 11. Marking
0.40
0.40
2
0.20
0.15
0.40
0.50
6/11 Doc ID 13976 Rev 2
3
F
1
EMIF01-1003M3 Package information

Figure 12. Tape and reel specification

1.75 ± 0.1 3.5 ±- 0.05
0.55 ± 0.05
All dimensions in mm
8.0 ± 0.3
1.15 ± 0.05
F
F
4.0 ± 0.1
F
2.0 ± 0.05
F
0.70 ± 0.05
User direction of unreeling
F
2.0 ± 0.1
Ø 1.55 ± 0.05
F
F
Note: Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose.
Doc ID 13976 Rev 2 7/11
Recommendation on PCB assembly EMIF01-1003M3

5 Recommendation on PCB assembly

5.1 Stencil opening design

1. General recommendation on stencil opening design
a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).

Figure 13. Stencil opening dimensions

L
T
W
b) General Design Rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio
Aspect Area
-----
1.5=
T
LW×
---------------------------­2T L W+()
0.66=
2. Reference design
a) Stencil opening thickness: 100 µm
b) Stencil opening for leads: Opening to footprint ratio is 90%.

5.2 Solder paste

1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed
4. Solder paste with fine particles: powder particle size is 20-45 µm.
8/11 Doc ID 13976 Rev 2
EMIF01-1003M3 Recommendation on PCB assembly

5.3 Placement

1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.

5.4 PCB design preference

1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.

5.5 Reflow profile

Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting

Temperature (°C)
Temperature (°C)
260°C max
260°C max
255°C
255°C
220°C
220°C
180°C
180°C
125 °C
125 °C
3°C/s max
3°C/s max
0
0
012345 67
012345 67
10-30 sec
10-30 sec
90 to 150 sec
90 to 150 sec
90 sec max
90 sec max
Note: Minimize air convection currents in the reflow oven to avoid component movement.
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
Time (min)
Time (min)
Doc ID 13976 Rev 2 9/11
Ordering information EMIF01-1003M3

6 Ordering information

Table 4. Ordering information

Part number Marking Package Weight Base qty Delivery mode
EMIF01-1003M3 F
1. The marking can be rotated by 90° to diferentiate assembly location
(1)
SOT-883 0.96 mg 12000 Tape and reel (7”)

7 Revision history

Table 5. Document revision history

Date Revision Changes
07-Oct-2007 1 Initial release.
03-Nov-2010 2 Updated base quantity Table 4.
10/11 Doc ID 13976 Rev 2
EMIF01-1003M3
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Doc ID 13976 Rev 2 11/11
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