12 V - 150 W resonant converter with synchronous rectification
using the L6563H, L6699 and SRK2000
By Claudio Spini
Introduction
This application note describes the EVL6699-150W-SR demonstration board features, a
12 V - 150 W converter tailored to a typical specification of an all-in-one (AIO) computer
power supply or a high power adapter.
The architecture is based on a two-stage approach: a front-end PFC pre-regulator based on
the L6563H TM PFC controller and a downstream LLC resonant half bridge converter using
the new L6699 resonant controller. The L6699 integrates some very innovative functions
such as self-adjusting adaptive deadtime, anti-capacitive mode protection and proprietary
“safe-start” procedure preventing hard switching at startup.
Thanks to the chipset used, the main features of this power supply are very high efficiency,
compliant with ENERGY STAR
external power supplies) and with the latest ENERGY STAR
computers (ENERGY STAR
efficiency at light load too, and compliance to the new EuP Lot 6 Tier 2 requirements. No
load input power consumption is very low as well, within the international regulation limits.
Figure 1.EVL6699-150W-SR: 150 W SMPS demonstration board
®
eligibility criteria for adapters (ENERGY STAR® rev. 2.0 for
®
ver. 6.0 for computers). The power supply also has very good
Main characteristics and circuit descriptionAN4027
1 Main characteristics and circuit description
The SMPS main features are listed below:
Table 1.Main characteristics and circuit description
ParameterValue
Input mains range90 - 264 V
Output voltage12 V at 12.5 A continuous operation
Mains harmonicsMeets EN61000-3-2 Class-D and JEITA-MITI Class-D
No load mains consumption
Avg. efficiency
Light load efficiencyAccording to EuP Lot 6 Tier 2 requirements
EMIWithin EN55022 Class-B limits
SafetyMeets EN60950
Dimensions65 x 154 mm, 28 mm component maximum height
PCBDouble side, 70 µm, FR-4, mixed PTH/SMT
< 0.17 W at 230 V
for external power supplies
> 91% at 115
for external power supplies
- frequency 45 to 65 Hz
ac
, according to ENERGY STAR® 2.0
ac
V
, according to ENERGY STAR® 2.0
ac
The circuit is made up of two stages: a front-end PFC using the L6563H, an LLC resonant
converter based on the L6699, and the SRK2000, controlling the SR MOSFETs on the
secondary side. The SR driver and the rectifier MOSFETs are mounted on a daughterboard.
The L6563H is a current mode PFC controller operating in transition mode and implements
a high-voltage startup to power on the converter.
The L6699 integrates all the functions necessary to properly control the resonant converter
with a 50 % fixed duty cycle and working with variable frequency.
The output rectification is managed by the SRK2000, an SR driver dedicated to LLC
resonant topology.
The PFC stage works as pre-regulator and powers the resonant stage with a constant
voltage of 400 V. The downstream converter operates only if the PFC is on and regulating.
In this way, the resonant stage can be optimized for a narrow input voltage range.
The L6699 LINE pin (pin 7) is dedicated to this function. It is used to prevent the resonant
converter from working with too low input voltage that can cause incorrect Capacitive mode
operation. If the bulk voltage (PFC output) is below 380 V, the resonant startup is not
allowed. The L6699 LINE pin internal comparator has a current hysteresis allowing the turnon and turn-off voltage to be independently set. The turn-off threshold has been set to 300 V
to let the resonant stage operate in the case of mains sag and consequent PFC output dip.
The transformer uses the integrated magnetic approach, incorporating the resonant series
inductance. Therefore, no external, additional coil is needed for the resonance. The
transformer configuration chosen for the secondary winding is centre tap.
On the secondary side, the SRK2000 core function is to switch on each synchronous
rectifier MOSFET whenever the corresponding transformer half-winding starts conducting
6/38Doc ID 022604 Rev 1
AN4027Main characteristics and circuit description
(i.e. when the MOSFET body diode starts conducting) and then to switch it off when the
flowing current approaches zero. For this purpose, the IC is provided with two pins (DVS1
and DVS2) sensing the MOSFETs drain voltage level.
The SRK2000 automatically detects light load operation and enters sleep mode, disabling
MOSFET driving and decreasing its own consumption. This function allows great power
saving at light load with respect to benchmark SR solutions.
In order to decrease the output capacitors size, aluminium solid capacitors with very low
ESR were preferred to standard electrolytic ones. Therefore, high frequency output voltage
ripple is limited and an output LC filter is not required. This choice allows the saving of
output inductor power dissipation which can be significant in the case of high output current
applications such as this.
1.1 Standby power saving
The board has a burst mode function implemented that allows power saving during light load
operation.
The L6699 STBY pin (pin 5) senses the optocoupler’s collector voltage (U3), which is
related to the feedback control. This signal is compared to an internal reference (1.24 V). If
the voltage on the pin is lower than the reference, the IC enters an idle state and its
quiescent current is reduced. As the voltage exceeds the reference by 30 mV, the controller
restarts the switching. The burst mode operation load threshold can be programmed by
properly choosing the resistor connecting the optocoupler to pin RFMIN (R34). Basically,
R34 sets the switching frequency at which the controller enters burst mode. Since the power
at which the converter enters burst mode operation heavily influences converter efficiency at
light load, it must be properly set. However, despite this threshold being well set, if its
tolerance is too wide, the light load efficiency of mass production converters has a
considerable spread.
The main factors affecting the burst mode threshold tolerance are the control circuitry
tolerances and, even more influential, the tolerances of the resonant inductance and
resonant capacitor. Slight changes of resonance frequency can affect the switching
frequency and, consequently, notably change the burst mode threshold. Typical production
spread of these parameters, which fits the requirements of many applications, are no longer
acceptable if very low power consumption in standby must be guaranteed.
As reducing production tolerance of the resonant components causes a rise in cost, a new
cost-effective solution is necessary.
The key point of the proposed solution is to directly sense the output load to set the burst
mode threshold. In this way the resonant elements parameters no longer affect this
threshold. The implemented circuit block diagram is shown in
Figure 2
.
Doc ID 022604 Rev 17/38
Main characteristics and circuit descriptionAN4027
Figure 2.Burst-mode circuit block diagram
TOP
OWERTRANSFORMER
2
#3
TO&"OPTOCOUPLER
TOLOAD
,!43-
3TANDBY
#OMP
6
2&-).
6
2
&"
34"9
2"-2
"-
2
LIM
##?/54
#OMP
2
(TS
The output current is sensed by a resistor (R
##/54
6?2%&
6
##
); the voltage drop across this resistor is
CS
43#
60
%!
2
(
2
,
6-
!-6
amplified by the TSC101, a dedicated high-side current sense amplifier; its output is
compared to a set reference by the TSM1014; if the output load is high, the signal fed into
the CC- pin is above the reference voltage, CC_OUT stays down and the optocoupler
transistor pulls up the L6699 STBY pin to the RFMIN voltage (2 V), setting continuous
switching operation (no burst mode); if the load decreases, the voltage on CC- falls below
the set threshold, CC_OUT goes high opening the connection between RFMIN and STBY
and allowing burst mode operation by the L6699. R
is dimensioned considering two
CS
constraints. The first is the maximum power dissipation allowed, based on the efficiency
target. The second limitation is imposed by the need to feed a reasonable voltage signal into
the TSM1014A inverting input. In fact, signals which are too small would affect system
accuracy.
On this board, the maximum acceptable power dissipation has been set to P
mW. R
maximum value is calculated as follows:
CS
loss,MAX
= 500
Equation 1
P
=R
MAXCS,
MAXlo ss,
2
I
MA Xout,
The burst mode threshold is set at 5 W corresponding to I
12 V. Choosing V
good signal to noise ratio, the R
= 50 mV as minimum reference of the TSM1014A, which permits a
CC+min
minimum value is calculated as follows:
CS
Equation 2
=R
minCS,
The actual value of the mounted resistor is 2 mΩ, corresponding to P
losses at full load. The actual resistor value at the burst mode threshold current provides an
output voltage by the TSC101 of 83 mV. The reference voltage of TSM1014 V
8/38Doc ID 022604 Rev 1
•
3.2mΩ=
= 417 mA output current at
BM
V
min+CC
I 100
BM
1.2mΩ=
= 312 mW power
loss
must be
cc+
AN4027Main characteristics and circuit description
set at this level. The resistor divider setting the TSM1014 threshold RH and RL should be in
the range of kΩ to minimize dissipation. Selecting R
as follows:
Equation 3
= 22 KΩ, the right RH value is obtained
L
The value of the mounted resistor is 330 kΩ.
RHts sets a small debouncing hysteresis and is in the range of mega ohms. Rlim is in the
range of tens of kΩ and limits the current flowing through the optocoupler's diode. Both
L6699 and L6563H implement their own burst mode function but, in order to improve the
power supply overall efficiency, at light load the L6699 drives the L6563H via the
PFC_STOP pin and enables the PFC burst mode: as soon as the L6699 stops switching
due to load drops, its PFC_STOP pin pulls down the L6563H PFC_OK pin, disabling PFC
switching. Thanks to this simple circuit, the PFC is forced into idle state when the resonant
stage is not switching and rapidly wakes up when the downstream converter restarts
switching.
1.2 Startup sequence
The PFC acts as master and the resonant stage can operate only if the PFC output is
delivering the rated output voltage. Therefore, the PFC starts first and then the LLC
converter turns on. At the beginning, the L6563H is supplied by the integrated high-voltage
startup circuit; as soon as the PFC starts switching, a charge pump circuit connected to the
PFC inductor supplies both PFC and resonant controllers, therefore, the HV internal current
source is disabled. Once both stages have been activated, the controllers are supplied also
by the auxiliary winding of the resonant transformer, assuring correct supply voltage even
during standby operation. As the L6563H integrated HV startup circuit is turned off, it greatly
contributes to power consumption reduction when the power supply operates at light load.
R
H
()
=
V
BM
V1.25VR
−
BML
309kΩ
=
1.3 L6563H brownout protection
Brownout protection prevents the circuit from working with abnormal mains levels. It is easily
achieved using the RUN pin (pin 12) of the L6563H: this pin is connected through a resistor
divider to the VFF pin (pin 5), which provides the information of the mains voltage peak
value. An internal comparator enables the IC operations if the mains level is correct, within
the nominal limits. At startup, if the input voltage is below 90 V
inhibited.
1.4 L6563H fast voltage feed-forward
The voltage on the L6563H VFF pin (pin 5) is the peak value of the voltage on the MULT pin
(pin 3). The RC network (R15+R26, C12) connected to VFF completes a peak-holding
circuit. This signal is necessary to derive information from the RMS input voltage to
compensate the loop gain that is mains voltage dependent.
Generally speaking, if the time constant is too small, the voltage generated is affected by a
considerable amount of ripple at twice the mains frequency, therefore causing distortion of
Doc ID 022604 Rev 19/38
(typ.), circuit operations are
ac
Main characteristics and circuit descriptionAN4027
the current reference (resulting in higher THD and lower PF). If the time constant is too
large, there is a considerable delay in setting the right amount of feed-forward, resulting in
excessive overshoot or undershoot of the pre-regulator's output voltage in response to large
line voltage changes.
To overcome this issue, the L6563H implements the fast voltage feed-forward function. As
soon as the voltage on the VFF pin decreases by a set threshold (40 mV typically), a mains
dip is assumed and an internal switch rapidly discharges the VFF capacitor via a 10 kΩ
resistor. Thanks to this feature, it is possible to set an RC circuit with a long time constant,
assuring a low THD, keeping a fast response to mains dip.
1.5 L6699 overload and short-circuit protection
The current into the primary winding is sensed by the lossless circuit R41, C27, R78, R79,
and C25 and it is fed into the ISEN pin (pin 6). In the case of overload, the voltage on the pin
surpasses an internal threshold (0.8 V) that triggers a protection sequence. An internal
switch is turned on for 5 µs and discharges the soft-start capacitor C18. This quickly
increases the oscillator frequency and thereby limits energy transfer. Under output shortcircuit conditions, this operation results in a peak primary current that periodically oscillates
below the maximum value allowed by the sense resistor R78.
The converter runs under this condition for a time set by the capacitor (C45) on pin DELAY
(pin 2). During this condition, C45 is charged by an internal 150 µA current generator and is
slowly discharged by the external resistor (R24). If the voltage on the pin reaches 2 V, the
soft-start capacitor is completely discharged so that the switching frequency is pushed to its
maximum value. As the voltage on the pin exceeds 3.5 V, the IC stops switching and the
internal generator is turned off, so that the voltage on the pin decays because of the external
resistor. The IC is soft-restarted as the voltage drops below 0.3 V. In this way, under shortcircuit conditions, the converter works intermittently with very low input average power.
This procedure allows the converter to handle an overload condition for a time lasting less
than a set value, avoiding IC shutdown in the case of short overload or peak power
transients. On the other hand, in the case of dead short, a second comparator referenced to
1.5 V immediately disables switching and activates a restart procedure.
1.6 L6699 anti-capacitive protection
The LLC resonant half bridge converter must operate with the resonant tank current lagging
behind the square-wave voltage applied by the half bridge leg. This is a necessary condition
in order to obtain correct soft switching by the half bridge MOSFETs. If the phase
relationship reverses, i.e. the resonant tank current leads the applied voltage, like in circuits
having a capacitive reactance, soft switching is lost. This condition is called capacitive mode
and must be avoided because of significant drawbacks coming from hard switching (refer to
the L6699 datasheet).
Resonant converters work in capacitive mode when their switching frequency falls below a
critical value that depends on the loading conditions and the input-to-output voltage ratio.
They are especially prone to run in capacitive mode when the input voltage is lower than the
minimum specified and/or the output is overloaded or short-circuited. Designing a converter
so that it never works in capacitive mode, even under abnormal operating conditions, is
certainly possible but this may pose unacceptable design constraints in some cases.
To prevent the severe drawbacks of capacitive mode operation, while enabling a design that
needs to ensure Inductive mode operation only in the specified operating range, neglecting
10/38Doc ID 022604 Rev 1
AN4027Main characteristics and circuit description
abnormal operating conditions, the L6699 provides the capacitive mode detection function.
The IC monitors the phase relationship between the tank current circuit sensed on the ISEN
pin and the voltage applied to the tank circuit by the half bridge, checking that the former
lags behind the latter (Inductive mode operation). If the phase shift approaches zero, which
is indicative of impending capacitive mode operation, the monitoring circuit activates the
overload procedure described above so that the resulting frequency rise keeps the
converter away from that dangerous condition. Also in this case, the DELAY pin is activated,
so that the OLP function, if used, is eventually tripped after a time TSH causing intermittent
operation and reducing thermal stress.
If the phase relationship reverses abruptly (which may happen in the case of dead short at
the converter's output), the L6699 is stopped immediately, the soft-start capacitor C18 is
totally discharged and a new soft-start cycle is initiated after 50 µs idle time. During this idle
period the PFC_STOP pin is pulled low to stop the PFC stage as well.
1.7 Output voltage feedback loop
The feedback loop is implemented by means of a typical circuit using the dedicated
operational amplifier of the TSM1014A modulating the current in the optocoupler diode. The
second operational amplifier embedded in the TSM1014A, usually dedicated to constant
current regulation, is here utilized for burst mode as previously described.
On the primary side, R34 and D17 connect the RFMIN pin (pin 4) to the optocoupler's photo
transistor closing the feedback loop. R31, which connects the same pin to ground, sets the
minimum switching frequency. The RC series R44 and C18 sets both soft-start maximum
frequency and duration.
1.8 Open loop protection
Both circuit stages, PFC and resonant, are equipped with their own overvoltage protection.
The PFC controller L6563H monitors its output voltage via the resistor divider connected to
a dedicated pin (PFC_OK, pin 7) protecting the circuit in case of loop failures or
disconnection. If a fault condition is detected, the internal circuitry latches the L6563H
operations and, by means of the PWM_LATCH pin (pin 8), it latches the L6699 as well via
the DIS pin (pin 8). The converter is kept latched by the L6563H internal HV startup circuit
that supplies the IC by charging the V
operation, mains restart is necessary. The LLC open loop protection is realized by
monitoring the output voltage through sensing the V
D12 breakdown voltage, Q9 pulls down the L6563H INV pin latching the converter. Even in
this case, to resume converter operation, mains restart is necessary.
capacitor periodically. To resume converter
cc
voltage. If Vcc voltage overrides the
cc
Doc ID 022604 Rev 111/38
Main characteristics and circuit descriptionAN4027
Figure 3.Electrical diagram
C16
RUN
R37
FASTON
R66
N.M.
R65
N.M.
D15
C29
1
4
R23
0R22
R23
R22
0R22
R22
C33
1N5
33R
R55
2K7
R55
2K7
2N2
2N2
11
PWM-STOP
C22
220K
C38
100N
R61
N.M.
R61
N.M.
Q6
N.M.
3
2
Q5
N.M.
1
3 2
1
2 1
N.M.
R56
C37
470uF-16V
470uF-16V
C50
470uF-16V
C49
C30
470uF-16V
470uF-16V
2
34567891011
10
11
9
C28
22NF
HS1
D6
R52
1K5
23
9
10
NC
HVS
8
220pF
C10
C10
D13
N.M.
R75
0R0
R75
0R0
N.M.
1N0
12
J2
FASTON
R68
STF8NM50N
100K
15
HVG
2K7
C6
N.M.
N.M.
R44
R33
5K6
C51
100N
R73
22R
R74
N.M.
7
6
5
8
VCC
GND
CV_OUT
CC_OUT
V_REF
CC+3CC-
U5
TSM1014AIST
1
2
C48
1N0
R70
R72
330K
R71
1K0
C32
470N
R49
91K
R49
R43
51R
R43
51R
C36
1uF - 50V
C36
1uF - 50V
R42
1K0
R42
1K0
56R
12
13
14
NC
VCC
OUT
C17
C17
330PF
330N
6K2
R31
R31
N.M.
R54
0R0
R77
1K0
91K
R47
N.M.
R47
N.M.
12
43
C41
N.M.
R41
100R
R78
33R
C27
220PF-630V
R79
270R
N.M.
R39
C25
1.5NF
JPX1JPX1
C26
10uF-50V
C40
100N
9
10
11
LVG
GND
PFC-STOP
DIS
8
7
R30
R30
C44
1.5NF
C44
1.5NF
C43
R36
1M8
R36
1M8
10N
C23
R32
47R
R32
47R
R34
8K2
20K
R60
10K
CV-
4
22K
C47
U3
SFH617A-2
10R
4N7
1N0
R51
R51
R50
R50
R48
47K
R48
47K
C34
100N
C34
100N
R40
0R68
D9
1 2
STPS2H100A
Rev 1.3
R64
10Meg
91K
91K
12K
12K
C35
N.M.
C35
N.M.
C24
220uF-50V
CONNECTION MADE BY REWORK
U4
12
43
SFH617A-2
D17
12
LL4148
AM11397v1
R62
N.M.
R62
12
13
12138
14
7
6
100K
D19
56R
R24
1M0
1M0
C45
220NF
220NF
4u7F
C18
C18
23
1
R67
N.M.
R29
1K0
R29
1K0
BZV55-C43
Q4
213
R59
R38
LL4148
1 2
C19
100N
16
VBOOT
CSS1DELAY2CF3RFMIN4STBY5ISEN6LINE
U2
L6699D
D16
N.M.
N.M.
12
R16
R4
N.M.
C46
213
Q3
STF8NM50N
R58
D18
LL4148
R25
1 2
HEAT-SINK
LL4148
R53
R53
2K2
1
Q2
BC857
R27
470R
Q7
N.M.
C31
N.M.
C31
R15
56K
R15
56K
R26
1M0
R26
1N0
C52
C12
1uF
D12
R76
33K
21
1
32
BC847C
Q9
J3
C42
100N
0R0
R63
5
U6
1
STL140N4LLF5
R501
10R
7
8
VCC
SRK2000
SGND1EN2DVS13DVS2
R506
2M2
R11
R3
2M2
C8
10uF-50V
D2
LL4148
6M8
R1
Q502
STL140N4LLF5
R502
D502
BAS316
10R
5
6
GD2
GD1
PGND
4
N.M.
C505
C504
N.M.
R508
N.M.
R509
N.M.
R507
330R
10
11
D21
Q8
330R
D505
N.M.
D503
N.M.
12
13
R12
2M2
R8
2M2
LL4148
1 2
R69
32
1
1
BC847C
D7
2
R2
5M6
24K
D20
D20
BZV55-B15
2
STPS140Z
STPS140Z
1
EVLSRK2000-L-40
R13
9K1
56K
R10
R10
R9
160K
C14
68N
68N
R19
C39
C39
C15
47uF-50V
U1
L6563H
Q501
D501
BAS316
R503
10R
C503
1uF
U501
C502
100NF
R504
150K
R505
33k
C501
4nF7
RX1
0R0
123456789
JP501JP501
2N2-Y1
C20
2N2-Y1
C21
C9
100uF - 450V
R17
2M2
R7
2M2
R6
NTC 2R5-S237
12
D4
STTH5L06
D3
1N4005
1N4005
12
F1
L2
1975.0004
D1
L1
2019.0002
FUSE T4A
J1
GBU8J
GBU8J
MKDS 1,5/ 3-5,08
5
9
113
4
+
+
~
~
2
124
C2
2N2-Y1
1
2
C4
C1
C1
3
C5
C5
470N-X2
470N-X2
_
_
31
C3
~
~
3
2N2-Y1C32N2-Y1
90-264Vac
12
D5
LL4148
1 2
C7
100N
R5
75R
470N - 520V
12V-12.5A
4
Vm
Vcc
R57
R002
TSC101
Out
GND2Vp
3
1860.0069
T1
2
R35
180K
R28
33K
Q1
STF21NM65M5
213
R46
100K
R46
R45
3R3
3R3
R21
22R
R20
D14
LL4148
LL4148
1 2
56K
56K
100N
14
15
16
13
12
GD
ZCD
VCC
GND
INV1COMP2MULT3CS4VFF5TBO6PFC-OK7PWM-LATCH
82K
R18
680N
C13
2N2
C11
R14
100K
12/38Doc ID 022604 Rev 1
Loading...
+ 26 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.