ST AN3973 Application note

AN3973

Application note

Electronic ballast with active PFC using STD3N62K3 power MOSFET and STD845DN40 BJT device

Introduction

In the most recent developments regarding energy saving, optimization and correct selection of design components are considered a must in order to have improved electric efficiency. An increasing sensitivity regarding energy problems has made companies and consumers more demanding. In this context, cooperation and support between silicon makers and customers is paramount: an exchange of experience leads to a better and quicker way to realize new projects. In this article, we present an electronic ballast project designed thanks to customer input. This application note describes the demonstration board for 2X28 W electronic lamp ballast with active PFC. The ballast is formed by a part of the PFC section and a self-oscillating half bridge converter. The circuit has been designed for a nominal input voltage of 230 Vrms±15% and 50-60 Hz. The key components are the power bipolar transistor (STD845DN40), the MOSFET device (STD3N62K3), and an ST power switching driver for the PFC section. The purpose of this application note is to show a simple and cheap lighting application optimized in terms of power factor (PFC), THD harmonic distortion, and electric efficiency. The DC-AC converter section presents a layout solution that offers the customer the possibility of using a bipolar transistor, or DIP 8 or SOT-82 package.

November 2011

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Contents	AN3973

Contents

1	System description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	4
2	Power factor section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	5
	2.1 PFC section design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6

2.1.1 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.3 Boost inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.4 Power MOSFET selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.5 L6562A biasing circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3	DC-AC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
	3.1 System description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11

3.1.1 Preheating phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.2 Ignition phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1.3 Steady-state phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4	Driving optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
	4.1	MOSFET circuit optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
	4.2	BJT circuit optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
5	Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		18
6	Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		19
7	Layout layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		20
8	Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		21
9	Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		22
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23

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AN3973	List of figures

List of figures

Figure 1. Ballast model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. PFC section, boost converter diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Inductor and input current waveform. MOSFET timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. PFC section, relevant elements for THD and PFC factor . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5. DC-AC converter section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Voltage and current lamp waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Zoom of the highlighted section (in Figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 8. Voltage and current lamp waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 9. Zoom of the highlighted section (in Figure 8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 10. Voltage and current lamp waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 11. Zoom of the highlighted section (in Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 12. Snubber and driving circuit of MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 13. MOSFET turn-off without snubber circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 14. MOSFET turn-off with snubber circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 15. MOSFET turn-on @ R7=10 W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 16. MOSFET turn-on R7=47 W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 17. BJT in low side. Snubber and driving circuit of BJT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 18. Steady-state operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 19. Zoom of the highlighted section 1 (in Figure 18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 20. Zoom of the highlighted section 2 (in Figure 18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 21. Bottom layout layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 22. Top layout layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 23. Silkscreen top . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 24. Silkscreen bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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System description	AN3973

1 System description

Figure 1. Ballast model

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The system description is subdivided into two main sections, namely the PFC boost section and half bridge converter. The system description starts with the PFC section and then continues with the DC-AC converter. In the PFC section the method and the electrical elements concerning the optimization of PFC and THD parameters are pointed out. In the DC-AC converter section, the focus is the optimization of transistor bipolar driving.

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AN3973	Power factor section

2 Power factor section

The PFC section (boost converter) mainly consists of STD3N62K3 MOSFET SuperMESH3 technology and the L6562A power switching driver. The new SuperMESH3 technology is obtained through the combination of fine tuning between standard SuperMESH and MDMESH technology. This has resulted in the development of a new technology that

represents the optimization of the basic standard SuperMESH in terms of RDS(on)* area and dynamic features. SuperMesh has integrated Zener diodes gate-to-source in order to

protect its gate-oxide from voltage spikes. The L6562A is a current-mode PFC controller operating in transition mode. It has an improved performance compared to its predecessor, the L6561.

Figure 2 shows the PFC section schematic plus the component values.

Figure 2. PFC section, boost converter diagram

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The power factor consists of the displacement factor related to phase angle and the distortion factor related to wave shape. The displacement factor is the ratio between the real power (transferred to the output) and the apparent power (RMS line voltage times RMS line current) drawn from the main, while the distortion factor is the ratio between the fundamental component of the current and the total current:

Equation 1

Therefore, the section is designed in order to minimize input current distortion and forces the input current to be in phase with the input voltage.

This system operates in transition mode, the boundary between continuous and discontinuous current mode. The control simplicity and the inductor size, due to the low inductance value needed, are the main advantages of this conduction current mode.

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Power factor section	AN3973

2.1PFC section design

The first step is to define the converter specifications that the user must set for the new PFC boost topology project.

Table 1.	Converter specification data and fixed parameters
	Name	Symbol		Value
Input voltage range		VINmin-VINmax		180 Vac to 264 Vac
Nominal output voltage		Vout		400 V
Nominal output power		Pout		60 W
Target efficiency		n		90%
Minimum switching frequency		fs		35 kHz
Expected power factor		PF		0.99

At switching frequency, the inductor current is a triangle shape and the average value is half of the peak of triangle. The resulting inductor current is shown in Figure 3, where it is also shown that, by geometric relationships, the average value is the peak of sinewave input current. The system operates the boundary between continuous and discontinuous (transition mode current):

Figure 3. Inductor and input current waveform. MOSFET timing

AM10586v1

Therefore the main operating conditions are:

● RMS input current	Iin =	Pin		=	Pout		= 0.374A
		V	PF		η * V	PF
		ACmin				AC min

●Peak inductor current ILpk = 2 2Iin

● RMS inductor current IL		= 2 I
	RMS	3 in

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AN3973	Power factor section

2.1.1Input capacitor

The input filter capacitor (Cin) must reduce the high frequency voltage ripple across Cin and the switching noise due to the high frequency inductor current ripple. The input capacitor depends on the voltage ripple (r) and it is usually between 5% and 20% of the minimum input voltage:

●Ripple voltage coefficient (%): r = 0.1

● Input capacitor CIN =		Iin		≈100nF
	2πf	* V	* r
	SWmin	AC min

In the applicative conditions, a polyester capacitor was chosen. It offers benefits in terms of voltage stability and power factor (PF).

2.1.2Output capacitor

The output capacitor is a function of voltage ripple ( Vout) and of the capacitor impedance. Vout is usually selected at around 1.5% of the output voltage capacitor:

● Output capacitor C	=		Pout		≈ 47uF
		4πf	* V
Out				V
		main	out	out

An electrolytic capacitor has been selected because it has low impedance (ESR) and therefore provides good energy storage and improves the transient performance.

2.1.3Boost inductor

The inductor boost depends on the several parameters and different approaches which can be used. First, the inductor value is usually calculated so that the minimum switching frequency is greater than the maximum frequency of the L6562A internal starter. Assuming

	unity PF, it is possible to write:				1	VAC2 (VOut − 2VAC sin(θ))
	●	Instantaneous switching frequency	fsw	=
					2LPIN	Vout

Therefore, the inductor value is determined at the top of the sinusoid ( switching frequency is the minimum:

● Inductor value L(V ) =	V2	(V	− 2V )
	AC	Out	AC
AC	2fSWmin Vout * PIN

θ= π ) where the 2

The optimum dynamic performances of the MOSFET device, selected for this application, have allowed higher operation minimum frequency and consequently lower boost inductance. In this case a 1.8 mH boost inductance was selected.

2.1.4Power MOSFET selection

MOSFET SuperMESH3 technology perfectly matches boost converter characteristics. In fact, this technology has got a dynamic performance better than that of the standard SuperMESH but not as good as MDMESH. That translates into having low switching power losses and commutation which is not so fast that it implies ringing phenomenon such as decreased PF and THD factors. MOSFET selection is based mainly on maximum voltage rating, total power losses, and maximum operating temperature. In this case a MOSFET device with minimum voltage rating 500 V (1.2*VBUS=480 V) must be selected: 20% of VBUS

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Power factor section	AN3973

indicates the safe margin. In the end, the MOSFET selection depended on power losses and maximum operating temperature. MOSFET total power losses depend on conduction and switching losses. The conduction losses at minimum input voltage are calculated by:

●Conduction losses Pc = RDS(on) I2SWrms

● RMS switch current I	= I senθ*	VBUS − 2Vinminsenθ
SWrms	Lpk	3VBUS

The switching losses in the MOSFET occur only during turn-off, because this boost topology works in transition mode. Basically they can be expressed by:

● Switching power losses Psw =	Qgd * VBUS *ILRMS	f (I )
		s LRMS
	2 *Ig

where Qgd is the gate drain charge, ILRMS is RMS inductor current, Ig is the gate current and fs(ILRMS) is switch frequency calculated for value.

Based on the information above, the MOSFET choice was the STD3N62K3 device. The final results show that STD3N62K3 ensures good performance in terms of electrical and thermal behavior.

2.1.5L6562A biasing circuitry

The dimensioning of biasing circuitry of the L6562A driver is reported for only a few elements. In particular, the dimensioning is shown for those components that have been relevant in terms of THD harmonic distortion and power factor (PF).

Figure 4. PFC section, relevant elements for THD and PFC factor

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Pin2 (COMP). A feedback compensation network is put between this pin and INV in order to fix narrow bandwidth and avoid high distortion of the input current waveform. In this way a

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