Electrostatic discharge (ESD)is not a new phenomenon. It is often used to describe high
voltage that may produce permanent damage. ESD can be destructive and may leave a
sytem in an unknown state from which recovery is impossible. Fortunately, it can be
prevented by several methods. Some of these methods are cheap whilst some modify the
behavior of the equipment. The ideal situation is to balance both of these factors to obtain a
robust application which is not too expensive and which is unlikely to behave erratically.
This document describes ESD, its causes and risks. Several models and standards relating
to ESD simulation are outlined. Typical ESD protection techniques are explained. Test
results are presented for the STM8T142-EVAL evaluation board which was tested against
ESD events using some of the protection methods detailed in this application note.
ESD is the sudden and momentary electric current that flows between two objects at
different electrical potentials.
ESD immunity is a category of electromagnetic compatibility (EMC) - the branch of electrical
sciences which studies the unintentional generation, propagation and reception of
electromagnetic energy with reference to its unwanted effects.
EMC describes the ability of a piece of equipment or a system to function satisfactorily in its
electromagnetic environment without introducing intolerable electromagnetic disturbances
to anything in that environment.
1.1 Causes of ESD
One of the causes of ESD events is static electricity. Static electricity is often generated
through the separation of electric charges when two materials are brought into contact and
then separated, for example, rubbing a plastic comb against dry hair, removing some types
of plastic packaging. In these cases, the friction between two materials creates a difference
of electrical potential that can lead to an ESD stress.
Another cause of ESD damage is through electrostatic induction. This occurs when an
electrically charged object is placed near a conductive object isolated from ground. The
presence of the charged object creates an electrostatic field that causes electrical charges
on the surface of the other object to redistribute. Even though the net electrostatic charge of
the object has not changed, it now has regions of excess positive and negative charges. An
ESD stress may occur when the object comes into contact with a conductive path. For
example, charged regions on the surfaces of styrofoam cups or plastic bags can induce
potential on nearby ESD sensitive components via electrostatic induction and an ESD
stress may occur if the component is touched with a metallic tool.
2 Risks of ESD
ESD is a serious issue in solid state electronics, such as integrated circuits (ICs). ICs are
made from semiconductor materials such as silicon and insulating materials like silicon
dioxide. Either of these materials can suffer permanent damage when subjected to high
voltages.
The damaging effects of ESD poses unacceptable risks in many areas of technology and it
is necessary to control such interference and reduce the risks to acceptable levels through
the:
●Simulation and testing of electronic devices using models
●Definition of standards
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Risks of ESDAN3960
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2.1 Simulation and testing of electronic devices using models
Several models describe how to simulate an ESD stress. The schematic circuit ofFigure 1,
shows how to generate an ESD event to a device under test (DUT). It is the basis of these
models.
Figure 1.Electrostatic discharge test (ESD generator and DUT)
1. Legend: R1 = resistor 1, RD = discharge resistor, CD = discharge capacitor, HV = high voltage, and VD =
discharge voltage. R
2. The charge and discharge switches are not closed simultaneously.
, RD, and CD are defined according to a standard.
1
2.1.1 Human body model (HBM)
For testing the susceptibility of electronic devices to ESD stress from human contact, an
ESD simulator with a special output circuit called the human body model (HBM) is often
used.
This model simulates the discharge which might occur when a human touches an electronic
device (either a system or a component).
The HBM consists of a capacitor in series with a resistor (see Figure 1). The capacitor is
charged to a specified voltage from an external source, and then suddenly discharged
through the resistor into an electronic terminal of the DUT.
2.1.2 Machine model (MM)
This model simulates what happens when a machine becomes electrostatically charged
and subsequently discharges into an electronic device when it comes in contact with it.
The MM test circuit consists of charging up a 200 pF capacitor to a certain voltage and then
discharging this capacitor directly into the DUT.
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2.2 Standards overview
Standards exist for the following reasons:
●To reproduce well-defined tests in terms of their setup (bench size, type of isolating
area) and conditions (such as temperature and pressure)
●To eliminate misunderstandings between manufacturers and purchasers
●To facilitate interchangeability and improvement of products
●To assist the purchaser in selecting and obtaining the appropriate product for his
particular needs.
None of these reasons are paramount. Each depends on the needs of the customer who
must also discuss with his purchaser.
The subsections below provide an overview of the more important ESD standards.
2.2.1 JS-001-2010 international standard
The ESD association and JEDEC solid state technology association have established a joint
standard procedure for testing, evaluating, and classifying components and microcircuits
according to their susceptibility to damage or degradation by exposure to a defined HBM
ESD (1.5 k
Ω, 100 pF and 8 kV).
2.2.2 SP723 EIAJ IC121 standard
The SP723 EIAJ IC121 MM standard is for ensuring that the ESD capability is typically
greater than 2 kV (from 200 pF) with no serial resistor. For this standard, R
Figure 1 are respectively 0 Ω and 200 pF.
2.2.3 IEC61000-4-2 international standard
The IEC61000-4-2 standard for ESD protection is ±15 kV for air and ±8 kV for contact. The
typical waveform of the output current of the ESD generator is described in
standard, RD and CD of Figure 1 are respectively 330 Ω and 150 pF. This standard is more
accurate for performing tests at system level rather than at electronic device level.
and CD of
D
Figure 2. For this
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