ST AN3422 APPLICATION NOTE

AN3422

Application note

Migration of microcontroller applications from STM32F1 to STM32L1 series

1 Introduction

For designers of STM32 microcontroller applications, it is important to be able to easily replace one microcontroller type by another one in the same product family. Migrating an application to a different microcontroller is often needed, when product requirements grow, putting extra demands on memory size, or increasing the number of I/Os. On the other hand, cost reduction objectives may force you to switch to smaller components and shrink the PCB area.

This application note is written to help you and analyze the steps you need to migrate from an existing STM32F1 devices based design to STM32L1 devices. It groups together all the most important information and lists the vital aspects that you need to address.

To migrate your application from STM32F1 series to STM32L1 series, you have to analyze the hardware migration, the peripheral migration and the firmware migration.

To benefit fully from the information in this application note, the user should be familiar with the STM32 microcontroller family. You can refer to the following documents that are available from www.st.com.

●The STM32F1 family reference manuals (RM0008 and RM0041), the STM32F1 datasheets, and the STM32F1 Flash programming manuals (PM0075, PM0063 and PM0068).

●The STM32L1 family reference manual (RM0038), the STM32L1 datasheets, and the STM32F1 Flash and EEPROM programming manual (PM0062).

For an overview of the whole STM32 series and a comparison of the different features of each STM32 product series, please refer to AN3364 Migration and compatibility guidelines for STM32 microcontroller applications.

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www.st.com

Contents	AN3422

Contents

1	Introduction		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 1
2	STM32L1 family overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. 6
3	Hardware migration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			8
4	Peripheral migration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			12
	4.1	STM32 product cross-compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		12
	4.2	System architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
	4.3	Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
	4.4	RCC . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
	4.5	DMA . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	4.6	Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		26
	4.7	GPIO . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28
	4.8	EXTI source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		30
	4.9	FLASH .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	31
	4.10	ADC . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	4.11	PWR . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
	4.12	RTC . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	36
5	Firmware migration using the library . . . . . . . . . . . . . . . . . . . . . . . . . .			37
	5.1	Migration steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		37
	5.2	RCC . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	37
	5.3	FLASH .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	39
	5.4	GPIO . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	43
		5.4.1	Output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	43
		5.4.2	Input mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	43
		5.4.3	Analog mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	43
		5.4.4	Alternate function mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	44
	5.5	EXTI . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	45
	5.6	ADC . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	46
	5.7	PWR . . .	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	47

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AN3422			Contents
	5.8	Backup data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 49
6	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. . . . 50

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List of tables	AN3422

List of tables

Table 1. STM32L1 peripherals compatibility analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. STM32F1 series and STM32L1 series pinout differences . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3. STM32 peripheral compatibility analysis F1 versus L1 series . . . . . . . . . . . . . . . . . . . . . . 13 Table 4. IP bus mapping differences between STM32F1 and STM32L1 series. . . . . . . . . . . . . . . . 15 Table 5. RCC differences between STM32F1 and STM32L1 series . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 6. Performance versus VCORE ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 7. Example of migrating system clock configuration code from F1 to L1 . . . . . . . . . . . . . . . . 22 Table 8. RCC registers used for peripheral access configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 9. DMA request differences between STM32F1 series and STM32L1 series . . . . . . . . . . . . 24 Table 10. Interrupt vector differences between STM32F1 series and STM32L1 series. . . . . . . . . . . 26 Table 11. GPIO differences between STM32F1 series and STM32L1 series . . . . . . . . . . . . . . . . . . 29 Table 12. FLASH differences between STM32F1 series and STM32L1 series . . . . . . . . . . . . . . . . . 31 Table 13. ADC differences between STM32F1 series and STM32L1 series . . . . . . . . . . . . . . . . . . . 32 Table 14. PWR differences between STM32F1 series and STM32L1 series. . . . . . . . . . . . . . . . . . . 34 Table 15. STM32F10x and STM32L1xx FLASH driver API correspondence . . . . . . . . . . . . . . . . . . . 39 Table 16. STM32F10x and STM32L1xx PWR driver API correspondence . . . . . . . . . . . . . . . . . . . . 48 Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

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AN3422	List of figures

List of figures

Figure 1. Compatible board design: LQFP144 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 2. Compatible board design: LQFP100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 3. Compatible board design: LQFP64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 4. Compatible board design: LQFP48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

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STM32L1 family overview	AN3422

2 STM32L1 family overview

The STM32L1 platform forms a strong foundation with a broad and growing portfolio. With new products addressing new applications, the complete STM32L product series now comprises three series, STM32L1 Medium-density, STM32L1 Medium-density+ and STM32L1 High-density, all dedicated to ultra low power and low voltage applications.

●STM32L1: Designed for ultra-low-power applications that are energy-aware and seek to achieve the absolute lowest power consumption. The L1 series maintains compatibility with the F1 series.

–Medium-density devices are STM32L151xx and STM32L152xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbyte

–Medium-density+ devices are STM32L151xx, STM32L152xx and STM32L162xx microcontrollers where the Flash memory density is 256 Kbyte

–High-density devices are STM32L151xx, STM32L152xx and STM32L162xx microcontrollers where the Flash memory density is 384 Kbyte

The ultralow power STM32L1 Medium-density, STM32L1 Medium-density+ and STM32L1 High-density are fully pin-to-pin, software and feature compatible.

	Table 1.	STM32L1 peripherals compatibility analysis
	Peripheral		Medium-	Medium-	High-	Compatibility
			density	density+	density	Comments
	SPI		Yes	Yes	Yes	No I2S in L1 Medium-density
						series
	WWDG		Yes	Yes	Yes	Same features
	IWDG		Yes	Yes	Yes	Same features
	DBGMCU		Yes	Yes	Yes	Same features
	CRC		Yes	Yes	Yes	Same features
	EXTI		Yes	Yes	Yes	Same features
	USB FS Device		Yes	Yes	Yes	Same features
	DMA		Yes	Yes	Yes	Same features
	TIM		Yes	Yes	Yes	Same features
	SDIO		No	No	Yes	Same features
	FSMC		No	No	Yes	Same features
	PWR		Yes	Yes	Yes	Same features
	RCC		Yes	Yes	Yes	Same features
	USART		Yes	Yes	Yes	Same features (UART4/5 are
						available only on High-density)

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AN3422						STM32L1 family overview
	Table 1.	STM32L1 peripherals compatibility analysis (continued)
	Peripheral		Medium-	Medium-	High-	Compatibility
			density	density+	density	Comments
	I2C		Yes	Yes	Yes	Same features
	DAC		Yes	Yes	Yes	Same features
	ADC		Yes	Yes	Yes	Same features
	RTC		Yes	Yes	Yes	Same features
	FLASH		Yes	Yes	Yes	Same features
	GPIO		Yes	Yes	Yes	Same features
	LCD glass		Yes	Yes	Yes	Same features
	COMP		Yes	Yes	Yes	Same features
	SYSCFG		Yes	Yes	Yes	Same features
	AES		Yes	Yes	Yes	Same features
	OPAMP		Yes	Yes	Yes	Same features

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Hardware migration	AN3422

3 Hardware migration

The ultralow power STM32L and general-purpose STM32F1xxx families are pin-to-pin compatible. All peripherals shares the same pins in the two families, but there are some minor differences between packages.

In fact, the STM32L1 series maintains a close compatibility with the whole STM32F1 series. All power and functional pins are pin-to-pin compatible. The transition from the STM32F1 series to the STM32L1 series is simple as only a few pins are impacted (impacted pins are in bold in the table below).

Table 2.		STM32F1 series and STM32L1 series pinout differences
			STM32F1 series					STM32L1 series
QFP48		QFP64	QFP100	QFP144	Pinout	QFP48	QFP64	QFP100	QFP144	Pinout
5		5	12	23	PD0 - OSC_IN	5	5	12	23	PH0-OSC_IN
6		6	13	24	PD1 - OSC_OUT	6	6	13	24	PH1-OSC_OUT
1		1	6	6	VBAT	1	1	6	6	VLCD
-		-	73	106	NC	-	-	73	106	PH2

The figures below show examples of board designs that are compatible with both the F1 and the L1 series.

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AN3422	Hardware migration

Figure 1. Compatible board design: LQFP144

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Hardware migration	AN3422

Figure 2. Compatible board design: LQFP100

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CAPACITOR							6$$
4HEH6,#$ PIN MUSTSBE CONNECTED TO
6$$$THROUGHHAR O & CAPACITOR

633

-3 6

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AN3422			Hardware migration
	Figure 3. Compatible board design: LQFP64

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4HEH6,#$ PIN MUSTSBE CONNECTED TO 6$$$THROUGHHAR O & CAPACITOR

	6,#$ 6"!4
						6$$

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Figure 4. Compatible board design: LQFP48

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4HEH6,#$ PIN MUSTSBE CONNECTED TO 6$$$THROUGHHAR O & CAPACITOR

	6,#$ 6"!4
						6$$

633

-3 6

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Peripheral migration	AN3422

4 Peripheral migration

As shown in Table 3 on page 13, there are three categories of peripherals. The common peripherals are supported with the dedicated firmware library without any modification, except if the peripheral instance is no longer present, you can change the instance and of course all the related features (clock configuration, pin configuration, interrupt/DMA request).

The modified peripherals such as: FLASH, ADC, RCC, PWR, GPIO and RTC are different from the F1 series ones and should be updated to take advantage of the enhancements and the new features in L1 series.

All these modified peripherals in the L1 series are enhanced to obtain lower power consumption, with features designed to meet new market requirements and to fix some limitations present in the F1 series.

4.1STM32 product cross-compatibility

The STM32 series embeds a set of peripherals which can be classed in three categories:

●The first category is for the peripherals which are by definition common to all products. Those peripherals are identical, so they have the same structure, registers and control bits. There is no need to perform any firmware change to keep the same functionality at the application level after migration. All the features and behavior remain the same.

●The second category is for the peripherals which are shared by all products but have only minor differences (in general to support new features), so migration from one product to another is very easy and does not need any significant new development effort.

●The third category is for peripherals which have been considerably changed from one product to another (new architecture, new features...). For this category of peripherals, migration will require new development at application level.

Table 3 gives a general overview of this classification.

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	AN3422					Peripheral migration
	Table 3.	STM32 peripheral compatibility analysis F1 versus L1 series
	Peripheral	F1 series	L1 series		Compatibility
				Comments	Pinout	SW compatibility
				No I2S in L1 Medium-density
	SPI	Yes	Yes	series	Identical	Full compatibility
				L1 vs. F1: limitation fix
	WWDG	Yes	Yes	Same features	NA	Full compatibility
	IWDG	Yes	Yes	Same features	NA	Full compatibility
	DBGMCU	Yes	Yes	Same features	NA	Full compatibility
	CRC	Yes	Yes	Same features	NA	Full compatibility
	EXTI	Yes	Yes	Same features	Identical	Full compatibility
	USB FS	Yes	Yes	Same features	Identical	Full compatibility
	Device
	DMA	Yes	Yes	Same features	NA	Full compatibility
	TIM	Yes	Yes	Same features	Identical	Full compatibility
				Same features (No SDIO in
	SDIO	Yes	Yes	L1 Medium-density and	Identical	Full compatibility
				Medium-density+ series)
				Same features but only
				SRAM/NOR memories are
	FSMC	Yes	Yes	supported (No FSMC in L1	Identical	Full compatibility
				Medium-density and Medium-
				density+ series)
	PWR	Yes	Yes+	Enhancement	NA	Full compatibility for the
						same feature
	RCC	Yes	Yes+	Enhancement	NA	Partial compatibility
				Limitation fix / One Sample
	USART	Yes	Yes+	Bit method / Oversampling by	Identical	Full compatibility
				8
	I2C	Yes	Yes+	Limitation fix	Identical	Full compatibility
	DAC	Yes	Yes+	DMA underrun interrupt	Identical	Full compatibility
	ADC	Yes	Yes++	New peripheral	Identical	Partial compatibility
	RTC	Yes	Yes++	New peripheral	Identical for the	Not compatible
					same feature
	FLASH	Yes	Yes++	New peripheral	NA	Not compatible
	GPIO	Yes	Yes++	New peripheral	Identical	Not compatible
	CAN	Yes	NA	NA	NA	NA

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	Peripheral migration					AN3422
	Table 3.	STM32 peripheral compatibility analysis F1 versus L1 series (continued)
	Peripheral	F1 series	L1 series		Compatibility
				Comments	Pinout	SW compatibility
	CEC	Yes	NA	NA	NA	NA
	Ethernet	Yes	NA	NA	NA	NA
	LCD glass	NA	Yes	NA	NA	NA
	COMP	NA	Yes	NA	NA	NA
	SYSCFG	NA	Yes	NA	NA	NA
	AES	NA	Yes	NA	NA	NA
	OPAMP	NA	Yes	NA	NA	NA

Color key:

= New feature or new architecture (Yes++)

= Same feature, but specification change or enhancement (Yes+)

= Feature not available (NA)

4.2System architecture

The STM32L MCU family, based on the Cortex-M3 core, extends ST’s ultra-low-power portfolio in performance, features, memory size and package pin count. It combines very high performance and ultra-low power consumption, through the use of an optimized architecture and ST’s proprietary ultra-low leakage process, that is also used in the STM8L family. The STM32L family offers three different product lines (STM32L Medium-density, STM32L Medium-density+ and STM32L High-density).

4.3Memory mapping

The peripheral address mapping has been changed in the L1 series vs. F1 series, the main change concerns the GPIOs which have been moved from the APB bus to the AHB bus to allow them to operate at maximum speed.

The tables below provide the peripheral address mapping correspondence between L1 and F1 series.

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AN3422							Peripheral migration
	Table 4.	IP bus mapping differences between STM32F1 and STM32L1 series
		Peripheral		STM32L1 series			STM32F1 series
			Bus		Base address	Bus	Base address
		FSMC			0xA0000000	AHB	0xA0000000
		AES			0x50060000	NA	NA
		DMA2			0x40026400		0x40020400
		DMA1			0x40026000		0x40020000
	Flash Interface				0x40023C00	AHB	0x40022000
		RCC			0x40023800		0x40021000
		CRC			0x40023000		0x40023000
			AHB
		GPIOG			0x40021C00	APB2	0x40012000
		GPIOF			0x40021800		0x40011C00
		GPIOH			0x40021400	NA	NA
		GPIOE			0x40021000		0x40011800
		GPIOD			0x40020C00		0x40011400
		GPIOC			0x40020800	APB2	0x40011000
		GPIOB			0x40020400		0x40010C00
		GPIOA			0x40020000		0x40010800
		USART1			0x40013800	APB2	0x40013800
		SP1			0x40013000		0x40013000
		SDIO			0x40012C00	AHB	0x40018000
		ADC1			0x40012400		0x40012400
		TIM11	APB2		0x40011000		0x40015400
		TIM10			0x40010C00	APB2	0x40015000
		TIM9			0x40010800		0x40014C00
		EXTI			0x40010400		0x40010400
		SYSCFG			0x40010000	NA	NA

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Peripheral migration						AN3422
	Table 4.	IP bus mapping differences between STM32F1 and STM32L1 series
		Peripheral		STM32L1 series		STM32F1 series
			Bus	Base address	Bus	Base address
		OPAMP		0x40007C5C	NA	NA
		COMP+RI		0x40007C00	NA	NA
		DAC		0x40007400		0x40007400
		PWR		0x40007000		0x40007000
	USB device FS SRAM			0x40006000		0x40006000
	USB device FS			0x40005C00		0x40005C00
		I2C2		0x40005800		0x40005800
		I2C1		0x40005400		0x40005400
		UART5		0x40005000		0x40005000
		UART4		0x40004C00		0x40004C00
					APB1
		USART3		0x40004800		0x40004800
		USART2		0x40004400		0x40004400
		SPI3	APB1	0x40003C00		0x40003C00
		SPI2		0x40003800		0x40003800
		IWDG		0x40003000		0x40003000
		WWDG		0x40002C00		0x40002C00
		RTC		0x40002800		0x40002800
				(inc. BKP registers)
		LCD		0x40002400	NA	NA
		TIM7		0x40001400		0x40001400
		TIM6		0x40001000		0x40001000
		TIM5		0x40000C00	APB1	0x40000C00
		TIM4		0x40000800		0x40000800
		TIM3		0x40000400		0x40000400
		TIM2		0x40000000		0x40000000
	USB OTG FS		NA	NA	AHB	0x50000000
	ETHERNET MAC		NA	NA		0x40028000
		ADC2	NA	NA		0x40012800
		ADC3	NA	NA	APB2	0x40013C00
		TIM8	NA	NA		0x40013400
		TIM1	NA	NA		0x40012C00

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