ST AN3404 APPLICATION NOTE
AN3404
Application note
Low power considerations for STM8TL53xx devices
Introduction
This document is intended for touch sensing application designers who require an overview
of low power modes in the STM8TL53xx devices. It describes how to use the general
features of these devices in low power modes by explaining the differences between the
various modes. It focuses on how to reduce consumption when using the ProxSense
peripheral and demonstrates how this is managed by the STM8TL5x Touch Sensing Library
in addition to giving some code examples.
This application note is not intended to replace the STM8TL53xx datasheet. All values given
in this document are for guidance only. For guaranteed values, please refer to the
STM8TL53xx datasheet.
November 2011 Doc ID 018847 Rev 2 1/31
www.st.com
Contents AN3404
Contents
1 Power consumption factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Internal supply structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Clock system overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 Default clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3 Clock configuration and power management . . . . . . . . . . . . . . . . . . . . . . . 8
3.4 Clock selection versus power consumption . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 Overview of low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 Slowing down the clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4 Peripheral clock gating (PCG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5 Execution from RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.6 Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6.1 Entering Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6.2 Exiting Wait for interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.6.3 Exiting Wait for event mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.7 Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.7.1 Entering Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.7.2 Exiting Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.8 Active-halt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.8.1 Entering Active-halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.8.2 Exiting Active-halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.9 Activation level control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 General power management tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1 Choosing the optimal low power mode for your application . . . . . . . . . . . 16
5.2 GPIO initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3 Dynamic control of pull-up resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/30 Doc ID 018847 Rev 2
AN3404 Contents
5.4 Waiting loops/delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.5 Minimizing power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 ProxSense and low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1 Possible CPU low power modes combined with ProxSense . . . . . . . . . . 19
6.2 Main factor of the ProxSense acquisition consumption . . . . . . . . . . . . . . 19
6.3 Low power features in the ProxSense peripheral . . . . . . . . . . . . . . . . . . . 20
6.3.1 LOW_POWER bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3.2 Stabilization time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3.3 Bias parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3.4 Inactive state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.3.5 Receiver disabling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7 Low power mode management by the STM8TL5x Touch Sensing
Firmware Library 22
7.1 Configuration available in the stm8_tsl_conf.h file . . . . . . . . . . . . . . . . . . 22
7.1.1 Acquisition time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.2 LOW_POWER bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1.3 Stabilization time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1.4 Bias parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1.5 Receiver configuration when disabled . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.1.6 Transmitter configuration when disabled . . . . . . . . . . . . . . . . . . . . . . . . 24
7.2 Practical code example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.2.1 Low power management with all acquisition banks . . . . . . . . . . . . . . . . 24
7.2.2 Very low power management with proximity detection . . . . . . . . . . . . . 25
8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Doc ID 018847 Rev 2 3/30
Power consumption factors AN3404
Dynamic power C V2f××=
I
DD
fI
DynamicRun
× µA MHz()⁄[]I
Static
µA[]+=
1 Power consumption factors
The STM8TL53xx microcontrollers are digital logic devices using the complementary metal
oxide semiconductor (CMOS) technology. In these type of devices, power consumption is a
sum of:
● Static power (mainly caused by transistor polarization and leakage)
● Dynamic power which depends on the supply voltage and the clock frequency
Dynamic power is calculated using Equation 1.
Equation 1
where:
● C is the CMOS load capacitance
● V is the supply voltage
● f is the clock frequency
Static consumption is negligible compared to dynamic consumption when the clock is
running. In some low power modes, when no clock is running, static consumption is the
main consumption source.
Total consumption is a sum of static and dynamic consumption as given by Equation 2.
Equation 2
where:
● I
● I
● I
is the supply current
DD
DynamicRun
Static
is the current consumption dependent on the CPU frequency
is the current consumption independent on the CPU frequency
4/30 Doc ID 018847 Rev 2
AN3404 Power consumption factors
Consequently, power consumption depends on:
● The microcontroller unit (MCU) chip size
This includes the technology used, the number of transistors, and the analog
features/peripherals embedded and used in the application.
● The MCU supply voltage
The amount of current used in CMOS logic is directly proportional to the square of the
power supply voltage (V²). Thus, power consumption may be reduced by lowering the
MCU supply voltage. This is less critical for STM8TL53xx devices than for other
microcontrollers, as an internal voltage regulator is used. However, the MCU supply
voltage could have an impact on the remaining components on the board.
● The clock frequency
Power consumption may be reduced by decreasing the clock frequency when fast
processing is not required by the application.
● The number of active peripherals or MCU features used (such as timers,
communication peripherals, watchdogs, ProxSense, etc.)
The greater the number of active peripherals or features, the greater the amount of
power consumed.
● The operating mode
Power consumption depends on which mode a particular application is running
(example: central processing unit (CPU) on/off, oscillator on/off). For an application
powered by a battery, the consumption is very important. Usually, the average
consumption should be below a certain target value to ensure an optimum battery
lifetime. This means that an application can consume more for short periods of time
and keep its average current consumption below the target value.
Doc ID 018847 Rev 2 5/30
Power supply AN3404
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2 Power supply
The STM8TL53xx family embeds two regulators which provide a supply voltage (V
the core and internal peripherals.
Figure 1. Power supply overview
CORE
) for
1. If V
is lower than 1.8 V, the 1.8 V domain is supplied by the voltage on the VDD input. For low power
DD
modes where the low power voltage regulator (LPVR) is used, this domain is supplied by a 1.55 V voltage.
The main voltage regulator (MVR) provides a 1.8 V supply voltage. It has a high current
capability, as it can deliver up to 25 mA. However, the consumption of this regulator is higher
than the consumption of the LPVR. Consequently, the MVR is used during a standard
operation only.
The consumption of the LPVR is very low as required for low power modes. The LPVR can
deliver up to 200 µA, providing 1.55 V to the digital part of the MCU.
After reset, the MVR provides a supply voltage (V
microcontroller. Depending on the functional mode, the MVR can be switched off. In this
case, the LPVR continues to provide the V
the power-on reset/power-down reset (POR/PDR). This system ensures a proper startup
and reset of the MCU, while V
V
falls below the PDR threshold.
DD
6/30 Doc ID 018847 Rev 2
DD
CORE
rises above the POR threshold. It resets the MCU when
) to the internal digital parts of the
CORE
voltage. The power supply is monitored by
AN3404 Power supply
2.1 Internal supply structure
STM8TL53xx devices operate from 1.65 V up to 3.6 V, when connected to one pair of supply
pins. There are no dedicated supply pins for the analog voltage domain. It is recommended
to use a decoupling ceramic capacitor placed close to the supply pins.
● In Run and Wait modes, both MVR and LPVR provide the V
●
In Halt/Active-halt modes, the LPVR is automatically used while the MVR is switched
off by the system in order to reduce current consumption.
CORE
Doc ID 018847 Rev 2 7/30
Clock management AN3404
I
DD(STM8TL53xx)
f 150×μA()MHz⁄[]215 μA[]+=
3 Clock management
3.1 Clock system overview
The 16 MHz high-speed internal RC oscillator (HSI) is the only clock source that can be
used to drive the system clock. The 38 kHz low-speed internal RC oscillator (LSI) is only
used to supply the auto-wakeup unit (AWU) and watchdog.
Each peripheral clock can be switched on or off independently, in order to optimize power
consumption when the peripheral is not used. This is done by using the peripheral clock
gating (PCG) feature. See the “Clock control (CLK)” section of the STM8TL53xx
microcontroller family reference manual (RM0312) for more details.
3.2 Default clock source
The default clock source after reset is HSI/8. The user can then switch the clock to different
frequencies by choosing the prescaler (/1, /2, /4 or /8) for the internal RC 16 MHz (HSI)
clock through the HSIDIV[1:0] bits in the Clock divider (CLK_CKDIVR) register.
3.3 Clock configuration and power management
In addition to the flexibility of the clock sources, different complementary clock
configurations and features are available to optimize the power consumption of the device:
● Each peripheral clock can be switched on/off through the Peripheral clock gating
registers 1 and 2 (CLK_PCKENRx).
● System clock dividers from 1 to 8 (HSIDIV[1:0] bits in the CLK_CKDIVR register) are
available.
Note: System clocks are used to supply both CPU and peripherals.
The STM8TL53xx is focused on low consumption. This is why all peripheral clocks are
gated by default. Before accessing any peripheral register, it is mandatory to enable the
clock for the given peripheral.
3.4 Clock selection versus power consumption
The selected clock type and speed is one of the major factors influencing power
consumption of the MCU (see Section 1: Power consumption factors). Total consumption for
the STM8TL53xx devices is given by Equation 3.
Equation 3
Note: The values given in Equation 3 are measured with all peripherals disabled.
8/30 Doc ID 018847 Rev 2
AN3404 Clock management
Slowing down the clock decreases the immediate consumption but, often this is not the ideal
solution. By slowing down the clock, the CPU performance is also reduced and a longer
time is required to perform an action or computation. If we consider the average
consumption, it might be better to use the highest available clock speed to perform the
required operation, and then force the MCU into one of the low power modes (like Activehalt mode) for the remaining time frame. This should be taken into account during the
design of application flowcharts.
Doc ID 018847 Rev 2 9/30
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