This note describes the performances of a 400 W reference board, with wide-range mains
operation and power-factor-correction (PFC) and presents the results of its bench
evaluation. The electrical specification refers to a power supply for a typical high-end PDP
application.
The main features of this design are the very low no-load input consumption (<0.5 W) and
the very high global efficiency, better than 90% at full load and nominal mains voltage (115 230 V
The circuit consists of three main blocks. The first is a front-end PFC pre-regulator based on
the L6563 PFC controller. The second stage is a multi-resonant half-bridge converter with
an output voltage of +200 V/400 W, whose control is implemented through the L6599
resonant controller. A further auxiliary flyback converter based on the VIPer12A off-line
primary switcher completes the architecture. This third block, delivering a total power of 7 W
on two output voltages (+3.3 V and +5 V), is mainly intended for microprocessor supply and
display power management operations.
Figure 19.Thermal map @115 V
Figure 20.Thermal map at 230 V
Figure 21.Peak measurement on LINE at 115 V
Figure 22.Peak measurement on NEUTRAL at 115 V
Figure 23.Peak measurement on LINE at 230 V
Figure 24.Peak measurement on NEUTRAL at 230 V
Main characteristics and circuit descriptionAN2492
1 Main characteristics and circuit description
The main characteristics of the SMPS are listed below:
●Universal input mains range: 90 to 264 V
●Output voltages: 200 V @ 2 A - 3.3 V @ 0.7 A - 5 V @ 1 A
●Mains harmonics: Compliance with EN61000-3-2 specifications
●Stand-by mains consumption: Typical 0.5 W @230 V
●
Overall efficiency: better than 88% at full load, 90-264 V
●
EMI: Compliance with EN55022-class B specifications
●Safety: Compliance with EN60950 specifications
●PCB single layer: 132x265 mm, mixed PTH/SMT technologies
The circuit consists of three stages. A front-end PFC pre-regulator implemented by the
controller L6563 (Figure 1), a half-bridge resonant DC/DC converter based on the resonant
controller L6599 (Figure 2) and a 7 W flyback converter intended for stand-by management
(Figure 3) utilizing the VIPer12A off-line primary switcher.
The PFC stage delivers a stable 400 VDC supply to the downstream converters (resonant +
flyback) and provides for the reduction of the current harmonics drawn from the mains, in
order to meet the requirements of the European norm EN61000-3-2 and the JEIDA-MITI
norm for Japan.
- 45 to 65 Hz
AC
AC
AC
The PFC controller is the L6563 (U1), integrating all functions needed to operate the PFC
and interface the downstream resonant converter. Though this controller chip is designed for
Transition-Mode (TM) operation, where the boost inductor works next to the boundary
between Continuous (CCM) and Discontinuous Conduction Mode (DCM), by adding a
simple external circuit, it can be operated in LM-FOT (line-modulated fixed off-time) mode,
allowing Continuous Conduction Mode operation, normally achievable with more expensive
control chips and more complex architectures. This operative mode allows the use of this
device at a high power level, usually covered by CCM topologies. For a detailed and
complete description of the LM-FOT operating mode, see the application note AN1792. The
external components to configure the circuit in LM-FOT mode are: C15, C17, D5, Q3, R14,
R17 and R29.
The power stage of the PFC is a conventional boost converter, connected to the output of
the rectifier bridge through a differential mode filtering cell (C5, C6 and L3) for EMI
reduction. It includes a coil (L4), a diode (D3), and two capacitors (C7 and C8). The boost
switch consists of two Power MOSFETs (Q1 and Q2), connected in parallel, which are
directly driven by the L6563 output drive thanks to the high current capability of the IC. The
divider (R30, R31 and R32) connected to MULT pin 3 brings the information of the
instantaneous voltage that is used to modulate the boost current and to derive further
information like the average value of the AC line used by the VFF (voltage feed-forward)
function. This function is used to keep the output voltage almost independent of the mains.
The divider (R3, R6, R8, R10 and R11) is dedicated to detecting the output voltage while a
further divider (R5, R7, R9, R16 and R25) is used to protect the circuit in case of voltage
loop failure.
The second stage is an LLC resonant converter, with half-bridge topology implementation,
working in ZVS (zero voltage switching) mode. The controller is the L6599 integrated circuit
that incorporates the necessary functions to properly drive the two half-bridge MOSFETs by
a 50% fixed duty cycle with fixed dead-time, changing the frequency according to the
4/35
AN2492Main characteristics and circuit description
feedback signal in order to regulate the output voltages against load and input voltage
variations.
The main features of the L6599 are a non-linear soft-start, a current protection mode used
to program the hiccup mode timing, a dedicated pin for sequencing or brown-out (LINE) and
a stand-by pin (STBY) for burst mode operation at light loads (not used in this design).
The transformer (T1) uses the magnetic integration approach, incorporating the resonant
series and shunt inductances of the LLC resonant tank. Thus, no additional external coils
are needed for the resonance. For a detailed analysis of the LLC resonant converter, please
refer to the application note AN2450.
The secondary side power circuit is configured with a single-ended transformer winding and
full-bridge rectification (diodes D8A, D8B, D10A, D10B), which is more suitable for the
current design. In fact, with this configuration, the total junction capacitance of the output
diodes reflected at primary side is one half the capacitance in case of center-tap
transformer. This capacitance at transformer primary side may affect the behavior of the
resonant tank, changing the circuit from LLC to LLCC type, with the risk that the converter,
in light-load/no-load condition (when the feedback loop increases the operating frequency)
can no longer control the output voltage. If the converter has to operate down to zero load,
this capacitance needs to be minimized. An inherent advantage of the full-bridge
rectification is that the voltage rating of the output diodes in this configuration is one half the
rating necessary for center-tap and two diodes circuit, which translates into a lower junction
capacitance device, with consequent lower reflected capacitance at primary side.
The feedback loop is implemented by means of a classical configuration using a TL431 (U4)
to adjust the current in the optocoupler diode (U3). The optocoupler transistor modulates the
current from controller Pin 4, so the frequency will change accordingly, thus achieving the
output voltage regulation. Resistors R46 and R54 set the maximum operating frequency. In
case of a short circuit, the current entering the primary winding is detected by the lossless
circuit (C34, C39, D11, D12, R43, and R45) and the resulting signal is fed into L6599 Pin 6.
In case of overload, the voltage on Pin 6 will exceed an internal threshold that triggers a
protection sequence via Pin 2, keeping the current flowing in the circuit at a safe level.
The third stage is a small flyback converter based on the VIPer12A, a current mode
controller with integrated Power MOSFET, capable of delivering about 7 W total output
power on the output voltages (5 V and 3.3 V). The regulated output voltage is the 3.3 V
output and, also in this case, the feedback loop uses the TL431 (U7) and optocoupler (U6)
to control the output voltage. This converter is able to operate in the whole mains voltage
range, even when the PFC stage is not working. From the auxiliary winding on the primary
side of the flyback transformer (T2), a voltage Vs is available, intended to supply the other
controllers (L6563 and L6599) in addition to the VIPer12A itself.
The PFC stage and the resonant converter can be switched on and off through the circuit
based mainly on components Q7, Q8, D22 and U8, which, depending on the level of the
signal ST-BY, supplies or removes the auxiliary voltage (VAUX) necessary to start up the
controllers of the PFC and resonant stages. When the AC input voltage is applied to the
power supply, the small flyback converter switches on first. Then, when the ST-BY signal is
low, the PFC pre-regulator becomes operative, and the resonant converter can deliver the
output power to the load. Note that if Pin 9 of Connector J3 is left floating (no signal ST-BY
present), the PFC and resonant converter will not operate, and only +5 V and +3.3 V
supplies are available on the output. In order to enable the +200 V output, Pin 9 of
Connector J3 must be pulled down to ground.
5/35
Main characteristics and circuit descriptionAN2492
Figure 1.PFC pre-regulator electrical diagram
Vdc
+400V
C9
2nF2-Y1
330uF/450V
C8
R2
NTC 2R5-S237
C7
470nF/630V
D3
STTH8R0 6
1-2
D1
1N5406
L4
PQ40-500uH
5-6
D4
LL4148
Q2
STP12NM50FP
Q1
STP12NM50FP
D6
LL4148
R18
R15
6R8
6R8
R24
0R39
R23
0R39
R22
0R39
R21
0R39
R19
1k0
C18
330pF
Vrect
C6
470nF/630V
L3
DM-51uH-6A
C5
470nF/630V
Vaux
+
-
D2
D15XB60
~
~
C11
C4
L2
CM-10m H-5A
C3
L1
CM-1.5mH-5A
C2
R1
F1
8A/250V
1
J1
2nF2-Y2
680nF-X2
C10
2nF2-Y2
330nF-X2
470nF-X2
1M5
2
CON2-IN
R4
47
C13
10uF/50V
C12
100nF
R6
680kR8680k
R3
680k
R5
Vdc
2M2
R11
R10
R7
2M2
R9
D5
C15
100pF
R14
3k3
R17
C17
15k
U1
L6563
100k
R13
56k
C14
100nF
C16
1uF
2M2
CSCS
LL4148
15k
220pF
GD
VCC
INV
COMP
ZCD
GND
MULTCSVFF
PWM-Latch
R29
1k5
Q3
BC857C
R20
1k0
C21
2nF2
R28
RUN
PWM-STOP
TBO
PFC-OK PWM-LATCH
R16
5k1
LINE
240k
R26
150k
C20
470nF
C19
10nF
R25
30k
C22
10nF
R32
10k
R31
620k
R30
620k
Vrect
6/35
AN2492Main characteristics and circuit description
Figure 2.Resonant converter electrical diagram
1234567
J2
+200V
8
CON8
C59
47nF
R86
470R
R61
R53
75k
R58
75k
C38
C25
22uF/250V
C29
100uF/250V
100uF/250V
R51
330k
2k2
R60
12k
L5
10uH
C30
100uF/250V
D8A
D8B
D10A
STTH803
STTH803
T1
T-RES-ER49
C28
47nF/630V
Vdc
Q5
R33
D7
Q6
STP14NK50Z
0R
R35
47
LL4148
STP14NK50Z
R39
0R
R40
47
D9
LL4148
C37
100uF/250V
STTH803
D10B
STTH803
R43
150
C34
220pF/630V
Vaux
C32
100nF
R38
47
C31
10uF/50V
D11
LL4148
D12
LL4148
R45
75R
C39
1uF0
C41
R85
R50
R49
R48
10uF/50V
120k
D13
C-12V
330k
R59
R56
330k
R52
330k
1k0
3k3
U3A
SFH617A-2
1k0
C44
47nF
U4
TL431
C27 100nF
NC
LVG
OUT
VCC
HVG
VBOOT
U2
L6599
CSS
DELAYCFRFMIN
STBY
ISEN
LINEGND
R36
0R
R34
3k9
C23
4uF7
C24
470nF
C26
270pF
R37
1M0
R41
DISPFC-STOP
C33
4nF7
R42
10
16k
LINE
C40
10nF
R47
10k
R46
1k5
PWM-Latch
U3B
SFH617A-2
C60
470nF
R87
220R
R54
1k5
7/35
Main characteristics and circuit descriptionAN2492
Figure 3.Auxiliary converter electrical diagram
J3
+5Vst-by
L7
T2
123456789
+5Vst-by
T-FLY -AUX-E20
+3V3
C46
100uF/10V
33uH
C45
1000uF/10V
D15
1N5822
D14
10
CON10
St-By
C49
100uF/10V
L8
33uH
C47
1000uF/10V
D16
1N5821
D20
PKC-136
Vs
C51
100nF
R77
R64
1k6
C54
100nF
R67
1k0
C53
2nF2
R73
8k2
R62
47
U6A
SFH617A-2
+5Vst-by
R68
BAV103
C50
10uF/50V
R66
1k0
St-By
22k
R71
10k
Q8
BC847C
R69
0R
4k7
U7
TL431
+200V
R76
150k
R75
150k
D21
B-15V
R80
30k
R79
2k2
Vdc
+400V
D19
C-30V
D
D
D
SSFB
U5
VIPER-12A
U6B
SFH617A-2
Vdd D
D17
LL4148
D18
B-10V
C52
C48
10uF/50V
8/35
47nF
Q9
BC857C
U8A
R72
22R
10k
R74
C55
10uF/50V
Vdc
+400V
R83
Q11
BC557C
SFH617A-2
1M0
R84
C58
10nF
150k
Vs
Q7
BC547C
R70
Vaux
C56
100nF
Q10
BC847C
U8B
SFH617A-2
10k
D22
C-15V
C57
1nF0
AN2492Electrical test results
2 Electrical test results
2.1 Harmonic content measurement
The current harmonics drawn from the mains have been measured according to the
European rule EN61000-3-2 Class-D and Japanese rule JEIDA-MITI Class-D, at full load
and 70 W output power, at both nominal input voltages (230 V
in Figure 4., Figure 5., Figure 6. and Figure 7. show that the measured current harmonics
are well below the limits imposed by the regulations, both at full load and at 70 W load.
and 100 VAC). The pictures
AC
Figure 4.Compliance to EN61000-3-2 for
10
1
0.1
0.01
0.001
0.0001
harmonic reduction: full load
Measurements @ 230Vac Full load EN61000-3-2 class D limit s
Measurements @ 100Vac Full load JEI DA- M ITI c l ass D l im it s
Figure 5.Compliance to EN EN61000-3-2 for
harmonic reduction: 70 W load
Measurement s @ 230Vac 70W EN61 00 0-3-2 class D limits
1
0.1
0.01
0.001
0.0001
1234567891011121314151617181920
Harmoni c Order (n)
Figure 7.Compliance to JEIDA-MITI standard
for harmonic reduction: 70 W load
Measurement s @ 100V ac 70W JEI DA -MI TI cla s s D limits
1
0.1
0.01
0.001
0.0001
1234567891011121314151617181920
Harmoni c Orde r (n )
The Power Factor (PF) and the Total Harmonic Distortion (THD) are reported in Figure 8.
and Figure 9. It is evident from the picture that the PF stays close to unity in the whole mains
voltage range at full load and at half load, while it decreases at high mains at low load
(70W). The THD has similar behavior, remaining within 25% overall the mains voltage range
and increasing at low load (70 W) at high mains voltage.
0.0001
1234567891011121314151617181920
Harmoni c Orde r ( n)
9/35
Electrical test resultsAN2492
60%
65%
70%
75%
80%
85%
90%
95%
100%
050100150200250300350400450
Output Power (W)
Eff. (%)
@230Vac@115Vac
Figure 8.Power factor vs. Vin & loadFigure 9.Total harmonic distortion vs. Vin &
PF
1.00
0.98
0.95
0.93
0.90
0.88
0.85
80120160200240280
400W
200W
70W
Vin [Vrms]
THD [%]
35.00
30.00
25.00
20.00
15.00
10.00
5.00
0.00
80120160200240280
load
400W
200W
70W
Vin [Vrms]
2.2 Efficiency measurements
Table 1. and Tab l e 2 . show the output voltage measurements at the nominal mains voltages
of 115 V
load and at light load operations, the input power is measured using a Yokogawa WT-210
digital power meter. Particular attention has to be paid when measuring input power at full
load in order to avoid measurement errors due to the voltage drop on cables and
connections.
and 230 VAC, with different load conditions. For all measurements, both at full
AC
Figure 10. shows the overall circuit efficiency, measured at each load condition, at both
nominal input mains voltages of 115 V
and 230 VAC. The values were measured after 30
AC
minutes of warm-up at maximum load. The high efficiency of the PFC pre-regulator working
in FOT mode and the very high efficiency of the resonant stage working in ZVS (i.e. with
negligible switching losses), provides for an overall efficiency better than 88% at full load in
the complete mains voltage range. This is a significant high value for a two-stage converter,
especially at low input mains voltage where PFC conduction losses increase. Even at lower
loads, the efficiency still remains high.
Figure 10. Overall efficiency versus output power at nominal mains voltages
10/35
AN2492Electrical test results
The global efficiency at full load has been measured even at the limits of the input voltage
range, with good results:
At VIN = 90 V
At VIN = 264 V
- full load, the efficiency is 88.48%
AC
- full load, the efficiency is 93.70%
AC
Also at light load, at an output power of about 10% of the maximum level, the overall
efficiency is very good, reaching a value better than 79% over the entire input mains voltage
range. Figure 11. shows the efficiency measured at various output power levels versus input
mains voltage.
Table 1.Efficiency measurements @V
+200 V@load(A)+5 V @load(A)+3.3 V @load(A)POUT(W)PIN(W)Efficiency
202.501.9894.840.9683.330.695409.77451.3890.78%
202.501.7514.840.9683.330.695361.58397.7090.92%
202.501.5014.840.9683.330.695310.95341.3991.08%
202.501.2514.840.9683.330.695260.33285.8691.07%
202.501.0004.840.9683.330.695209.50230.9690.71%
202.530.7514.840.9683.330.695159.10176.6390.08%
202.530.5004.840.9683.330.695108.26122.6288.29%
202.530.2504.840.9683.330.69557.6369.0483.48%
202.560.1504.840.2933.330.30932.8341.1479.80%
202.670.0514.840.2933.330.30912.7820.3462.85%
= 115 V
IN
AC
Table 2.Efficiency measurements @VIN = 230 V
+200 V@load(A)+5 V @load(A)+3.3 V @load(A)POUT(W)PIN(W)Efficiency
202.501.9874.840.9683.330.695409.37437.7993.51%
202.501.7504.840.9683.330.695361.37386.9093.40%
202.501.5004.840.9683.330.695310.75333.3393.23%
202.501.2504.840.9683.330.695260.12279.6593.02%
202.501.0004.840.9683.330.695209.50226.6892.42%
202.500.7504.840.9683.330.695158.87174.1091.25%
202.530.5004.840.9683.330.695108.26121.5489.08%
202.530.2504.840.9683.330.69557.6368.9683.57%
202.540.1504.840.2933.330.30932.8341.8078.54%
202.670.0504.840.2933.330.30912.5819.8663.35%
AC
11/35
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