ST AN2435 Application note

AN2435

Application note

TM sepic converter in PFC pre-regulator

Introduction

For the PFC (power factor correction) converter, sepic topology can be used when an output
voltage lower than the maximum input voltage is required. This is instead of boost topology,
which is unsuitable beacuse it must have an output voltage higher than the maximum input
voltage. Sepic topology is advantageous because it allows the use of the ripple steering
technique in order to reduce the switching frequency components of the input current
without additional costs. This application note presents the basic equation of the sepic
converter, in addition to design guidelines for a sepic PFC operating in transition mode and
using the ripple steering technique. An application example with some tests results and
waveforms is also provided in the document.

Sepic converter

March 2007 Rev 1 1/25

www.st.com

Contents AN2435

Contents

1 Sepic topology for PFC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1 Operation of the sepic converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2 Sepic converter as a PFC circuit operating in transition mode [1.] . . . . . . . 6

1.3 Coupled inductor sepic converter and ripple steering . . . . . . . . . . . . . . . 10

1.4 Small signal model for a TM sepic converter . . . . . . . . . . . . . . . . . . . . . . 12

2 Practical design example of a sepic converter . . . . . . . . . . . . . . . . . . 13

2.1 Design specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.2 MOSFET (M

2.3 Diode D1 selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.4 Capacitor C1 selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.5 Output capacitor C2 selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.6 Transformer design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.7 Selection of other components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

) selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1

3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4 Board description and bench evaluation results . . . . . . . . . . . . . . . . . 18

4.1 Board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.2 Bench results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/25

AN2435 List of figures

List of figures

Figure 1. Basic circuit of the sepic converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Sepic converter when the main switch is on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Sepic converter when the main switch is off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Inductor L1 and inductor L2 current waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 5. Switching frequency variation vs θ for two different input voltages. . . . . . . . . . . . . . . . . . . . 9

Figure 6. Input current in TM for sepic PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 7. Coupled inductor of a sepic converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 8. Model of two coupled inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 9. Equivalent current source of the sepic converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Small signal model for the TM sepic converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11. Output diode current averaged over the switching cycles . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 12. Transformers with symmetrical structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 13. Schematic of the sepic converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 14. Efficiency chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 15. Main waveform of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 16. Current of the inductors over one line cycle: V
Figure 17. Current of the inductors over switching cycles: V
Figure 18. Current of the inductors over one line cycle: V
Figure 19. Currents of the inductors over switching cycles: V
Figure 20. Input current: 230 V
Figure 21. Input current: 230 V

input, 65 W output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

ac

input, 32 W output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

ac

= 230 V

in

= 230 V

in

= 230 V

in

= 230 V

in

ACRMS

ACRMS

ACRMS

ACRMS

, P

= 65 W . . . . . . . . . . 23

out

, P

= 65 W . . . . . . . . 23

out

, P

= 65 W . . . . . . . . . . 23

out

, P

= 65 W . . . . . . . 23

out

3/25

Sepic topology for PFC converter AN2435

1 Sepic topology for PFC converter

The most widely used topology in PFC applications is boost topology. It has two main
advantages:

1. The power switch is a low sided one, unlike buck and buck-boost topology where it is an
hide side one and needs a floating driving circuit.

2. The inductor is on the input side of the converter, limiting the slope of the input current.

The main disadvantage is that output voltage must always be higher then maximum input
voltage, which may limit some applications and may be a problem when a lower output
voltage is required.

Sepic topology has the above advantages and does not have the output voltage constraint.
As in buck-boost topology, output voltage can be higher or lower than the input voltage. An
additional advantage of sepic topology is that there are two inductors instead of one which
can be wounded in the same magnetic core. Using the proper turn ratio the input current
ripple can be reduced theoretically to zero and the input filter for the conducted electro­magnetic interference strongly reduced (theoretically eliminated).

However, sepic topology, compared to boost topology, has the following disadvantages:

1. The MOSFET and the output diode break-down voltages are higher as they are the
maximum reverse voltage when input and output voltages are summed (only output
voltage for boost converter).

2. The current through the MOSFET is generally higher for the same output power.

1.1 Operation of the sepic converter

The basic schematic of the sepic converter is given in Figure 1.

Assuming that the average voltage across each inductor during one switching cycle, in
steady state operation, is zero, it can also be assumed than the average voltage over one
switching cycle across capacitor C1 equals the input voltage of the converter.

If capacitor C1 is not too small, the voltage ripple across C
assumed that over one switching cycle, this voltage stays constant and equals the input
voltage (V

When the main switch (M
L

(see Figure 2). In steady state condition, the same voltage is applied to inductor L1 which

2

is in parallel with capacitor C1. The reverse voltage applied on diode D
input and output voltage (V
through inductor L1 and inductor L2 (I

Across inductor L1 and inductor L2 we have the same voltages and the currents throug
them rise linearly with slopes inversely proportional to their inductances values.

When M1 is switched off (Figure 3), diode D1 starts to conduct and the energy previously
stored in inductor L1 and inductor L2 is released to restore the energy used up by capacitor
C1 and capacitor C

across the MOSFET is the sum of the voltage across capacitor C1, which is equal to the
sum of the input and the output voltage.

). This hypothesis (VC1= VIN) is the starting point for sepic converter analysis.

IN

) of the sepic converter is on, input voltage is applied to inductor

1

+ V

IN

when M1 was on. This energy also supplies the load. The voltage

2

) and the current through M1 is the sum of the currents

OUT

L1

+ IL2).

(VC1) is negligible, and it can be

1

is the sum of the

1

4/25

AN2435 Sepic topology for PFC converter

V

The current through diode D1 is the sum of the currents running through inductor L1 and
inductor L2. The voltage across both inductors is equal to V

, and the current slope is

OUT

negative and inversely proportional to inductor L1 and inductor L2 respectively.

Figure 4 shows the theoretical waveforms of the inductors’ currents. Equation 1 and
Equation 2 give the waveform expressions during turn-on (T
Equation 4 give the waveform expressions during turn-off (T

), whilst Equation 3 and

ON

).

OFF

Equation 1

V

IN

IL1t() I

L10

-------- -

L

t•+=

1

Equation 2

IN

I

t() I

L2

L20

-------- -

L

t•+=

2

Equation 3

V

IN

L10

-------- -

L

•

1

t() I

I

L1

V

out

---------- -

T

ON

t•–+=

L

1

Equation 4

IL2t() I

L20

V

IN

-------- -

L

•

1

V

out

---------- -

T

ON

t•–+=

L

2

Figure 1. Basic circuit of the sepic converter

C

1

L

2

M

1

D

1

L

1

Figure 2. Sepic converter when the main switch is on

D

1

+

V

IN

-

I

L2

L

2

M

1

-

C

1

VC1=V

+

I

L1

IN

L

1

C

2

+

V

C

2

OUT

-

5/25

Sepic topology for PFC converter AN2435

C

IN

IN

T

Figure 3. Sepic converter when the main switch is off

D

VC1=V

+ -

+

L

V

-

I

2

L2

1

M

1

I

L1

L

1

+

C

1

2

V

OUT

-

Figure 4. Inductor L1 and inductor L2 current waveform

I

L1_pk

IL1(t)

I

L2_pk

I

L1_0

I

L2_0

T

on

off

t

1.2 Sepic converter as a PFC circuit operating in transition mode [1.]

In PFC applications, input voltage is the rectified main and it changes according to the
equation:

Equation 5

IL2(t)

VINϑ() 2V

where ϑ is 2 πf

, fL is the line frequency, and Vac is the rms value of the line voltage.

L

As switching frequency is in the range of some tenth of kHz, and thus much higher than the
line frequency, we can assume ϑ is constant over each switching cycle.

The L6562 (see [2]) is a current mode controller dedicated to PFC applications. It is used in
this instance. It senses the MOSFET current and the input voltage of the converter (rectified
main), through a sense resistor and a resistor divider respectively. Cycle by cycle the
MOSFET is switched-off as the sensed current reaches a limit set by the controller. This limit
is proportional to the sensed input voltage so, the MOSFET peak current (I
sinusoidal reference:

•ϑ()sin•=

ac

(t)) follows a

PK

Equation 6

IPKt() I

PK

6/25

ϑ()sin•=

AN2435 Sepic topology for PFC converter

Taking into account that input voltage is now the rectified main, Equation 1 and Equation 2
can be rewritten as follows:

Equation 7

IL1t ϑ,()I

L10

VINϑ()

------------------

L

1

tIL2t ϑ,(),• I

L20

VINϑ()

------------------

L

2

t•+=+=

Due to transition mode operation, the MOSFET is switched on as soon as the diode current
falls to zero. This means that:

Equation 8

I

– 0=

L10IL20

From and Equation 8, the MOSFET peak current equation may be derived:

Equation 9

1

1

⎛⎞

ϑ()

----- -

----- -+

I

PK

⎝⎠

L

1

tONϑ()• 2• Vac•ϑ()sin•=

L

2

Combining Equation 9 and Equation 6 an expression for T

Equation 10

I

PK

1

----- -+

L

1

2

where L

tONϑ()

is the parallel between inductor L1 and inductor L2. Equation 10 indicates that, as

e

----------------------------------------------------------------------------- -

1

⎛⎞

----- -

⎝⎠

L

in TM (Transition Mode) boost converter T

The expression for T

is obtained in a similar way to above:

OFF

ϑ()sin•

2V

ac

is independent from ϑ.

ON

ϑ()sin•••

Equation 11

where V

Once T

ϑ()

T

---------------------------------------------------------------- -=

T

OFF

is the output voltage. The off time is dependent on θ, as in TM boost converter.

O

ON

and T

are known, switching frequency (fSW) may be easily calculated as it is a

OFF

ON

2V

ac

V

O

function of ϑ:

Equation 12

1

fSWϑ()

---------------------------------------- -

T

ONTOFF

---------------------------------------------------------------------------------- -==

ϑ()+

⎛⎞

1

------------------------------------------------- -+

•

T

⎜⎟

ON

⎝⎠

may be obtained:

ON

L

•

eIPK

---------------------- -

2V

•

ac

===

ϑ()sin•••

1

2V

ac

V

O

T

ON

ϑ()sin••

Figure 5 shows the switching frequency versus θ for two different input voltages. To

calculate input current averaged over one switching cycle, Equation 13, the charge balance
on capacitor C1, is used:

Equation 13

V

ϑ()

1

-- -

2

⎛⎞

I

L10

⎝⎠

ϑ()

IN

------------------

L

1

••+

T

ON

TON• I

⎛⎞

ϑ()

L20

⎝⎠

1

-- -

2

V

ϑ()

IN

------------------

L

2

••+

T

ON

T

•ϑ() Q ϑ()==

OFF

7/25

Sepic topology for PFC converter AN2435

where Q (ϑ) indicates the quantity of electrical charge that flows through capacitor C1, cycle
by cycle.

Combining Equation 8 and Equation 13, I

(ϑ) may be calculated as follows:

L2(0)

Equation 14

f

Using equation 14, I

ϑ() VINϑ()• TON•

SW

I

L20

L2avg

-------------------------------------------------------------

ϑ()

2

may then be calculated using Equation 15:

T

ON

---------- -

L

T

ϑ()

OFF

---------------------- -–•=

1

L

2

Equation 15

V

I

L2avg

ϑ()

1

-- -

2

ϑ()

IN

------------------

• T

L

2

• I

ON

L20

ϑ()

1

-- -

2

------------------------------------------------------- -

IPK•

•=+=

------------------------

1

2V

•

AC

V

O

ϑ()sin

ϑ()sin+

Equation 15 shows that the input current is not exactly sinusoidal. A certain amount of

distortion is related to the quantity K

Figure 6 shows the input currents (before the bridge diodes) for different values of V

first input current, I

(θ), is calculated for Kv= 0. It is used only as a reference, because it is

0

completely sinusoidal. In this instance, V
current, I

(θ), is at V

1

= 265 V and the third, I2(θ), is the input current at V

AC

, which is defined as follows:

v

2V

×

K

V

is considered to be 200 V. The second input

O

AC

-------------------------=

V

O

= 175 V. All

AC

AC

. The

currents are normalized in accordance with their respective RMS values. In figure 6, the
distortion of the current with respect to a perfect sinusoid is obvious. Even though such
distortion is present, quite high values for the power factor are obtained. The voltage across
capacitor C1 averaged over one switching cycle is the same as the input voltage. There is
an additional voltage ripple due to the currents of the inductors across capacitor C1. Its
amplitude (∆V

(ϑ)) is calculated below:

C1

Equation 16

V

IN

VC1ϑ()∆

8/25

-------------------------------------- -

ϑ() T

•

C

1Le

2

•

ON

T

ϑ()

OFF

---------------------------------------- -

•=

T

ONTOFF

ϑ()+