with synchronous rectification using L6668 and STSR30
Introduction
This document describes a 60W adapter application using the L6668 fixed frequency
current mode PWM controller and the STSR30 smart driver for flyback synchronous
rectification.
This chipset guarantees low no-load consumption and high efficiency, making it easy to
comply with world-wide mandatory and voluntary energy saving requirements.
The 60W AC-DC adapter board described in this application note has the following main
characteristics:
●Input:
–V
–f: 45 ~ 66 Hz
●Output:
–12V
●No - Load:
–Pin below 0.3W
●Short circuit: protected with Auto-Restart feature
●PCB type and size:
–FR4
–Single side: 70 µm
–120 x 75 mm
●Safety: according to EN60065
●EMI: Compliance with EN55022 - Class B specifications
: 88 ~ 264 V
IN
± 2% - 5A
DC
RMS
1.2 Circuit description
This circuit implements a flyback transformer which is a very popular topology for this kind of
application and power level, thanks to its simplicity and good trade-off between cost and
performance. To improve the converter's efficiency, the EVALSTSR30 demo board uses
synchronous rectification.
The converter works in both Continuous and Discontinuous conduction mode depending on
the input voltage (the circuit has a wide input voltage range) and the output load. The
68-kHz switching frequency provides a good compromise between the transformer size and
the harmonics of the switching frequency, optimizing input filter.
The input section includes protection elements (varistor, fuse and NTC for inrush current
limiting), a standard Pi-filter for EMC suppression, a bridge and an electrolytic bulk capacitor
as the front-end AC-DC converter. The transformer is a layer type, uses a standard ETD34
ferrite core and is designed to have a reflected voltage of 95V. The power MOS is a 700V 1Ω and a transil clamp network is used for leakage inductance demagnetization.
On the primary side, the ST L6668 PWM controller integrates all the functions needed in a
SMPS (switch mode power supply) and enables building a complete system with a low
amount of external components. It includes a high voltage start-up generator, an
overvoltage protection input, frequency foldback for better efficiency at light loads,
programmable burst mode operation and soft start circuit.
5/27
AN2432Adapter features
Figure 1.Electrical diagram
12V / 5A
J1
1
2
Output Connec tor
C26
N.M.
+
C21
100uF
L2
2.2uH
U2 L78L05
C19
1000uF
+
C1
1000uF
+
D1
STPS2H100
13
T1
C8
100uF
+
HV_bus
1
+
D7
W06G
2
NTC1
5R
F1
T2A
3
-
4
C15
100nF
L1
2x27mH
23
14
C14
100nF
RV1
S14K275
1
HV_bus
10129
3
D5 STTH1L06U
D8
1.5KE200
C5
1nF
R16
2.7Meg
R19
33k
C13
470pF
Q1
6
L3 100uH
D11 BAV103
+5V
C3
R3
22
R20
2.7k
D3
STP75NF75L
LL4148
7
Q2
R23
N.M.
32
D6
BAV103
C6
47uF
+
R17
2.7Meg
C16
100nF
R28
3.9k
C22
470nF
C25
100nF
R22
3
IN
OUT
1
100nF
+5V
C18
2.2nF
BC807
1
R18
1.5k
GND
2
R1
1k
C2
100nF
3
Vcc
5
SGLGND
PWRGND
4
OUTgate
2
CK8INHIBIT
U1
R4
33k
D2
LL4148
Q3
STP9NK70ZFP
C23
220pF
R29
R11
22
R33
9.1k
1
5
7
15
8
U3
D10
9.1k
4
OUT
HV
VCC
DIS
L6668
S-COMP
VREF
STBY
13
14
R37
R21
7
10
LL4148
PFC_STOP
330k
20k
12
R2
SETANT
1
U5A
C29
1k
DISABLE
R5
12
ISEN
RCT
16
R32
PC817
8
100nF
U4
R13
N.M.
6
STSR30
D9
33k
R12
1k
C20
220pF
GND
COMP
SS
SKIPADJ
HVS
N.C.
0
C7
470nF
1
2
Cv-
CV Out
Vcc
Vref3Cc+5Cc-
R38
33k
C28
1nF
C27
100pF
D4
LL4148
1N4148WS
R6
100k
R9
0.56
R10
0.56
3
10
11
9
2
6
+5V
R8
33k
U5B
PC817
43
C10
68nF
R26
R14
2.2k
7
CC Out
Gnd
4
TSM1015
6
C24
220pF
R40
1Meg
C4
4.7nF
R15
68k
C9
1nF
R24
47K
C17
2.2nF
82k
R25
1
2
J2
Mains input
15K
R27
20k
C11
1nF
C12
100nF
88 to 264 Vac
6/27
Adapter featuresAN2432
The self supply circuit (Q2, R33, C23, L3, D6 and C6) ensures:
●a constant V
●enough energy during no-load periods
●a poor (under UVLO) supply voltage during short-circuit failures
voltage with respect to load variations
CC
A separate rectifying circuit (D11, R19, R28 and C13) derives a voltage level that best
matches the output voltage for accurate overvoltage protection.
As seen, the primary side is quite standard. The most interesting part of this demo board
lies in the secondary side. Here we can find the STSR30, a smart driver for flyback
synchronous rectification (SR). The flyback output diode is substituted with a power
MOSFET (a 75V - 10mΩ) that dramatically reduces the conduction losses. A small Schottky
diode (D1) is mounted in parallel to the MOSFET body diode to keep low the voltage drop
during dead times (while the SR MOS is off and current is circulating in the secondary).
The STSR30 can work in both Continuous and Discontinuous conduction mode and uses 2
pins to synchronize the SR MOSFET with the flyback. The SR MOSFET drain provides the
synchronization information; when the primary side MOSFET is turned off, the drain voltage
of the SR MOSFET falls from V
+ VIN/n (where n is the transformer turns ratio n1/n2)
OUT
down to zero. This falling edge is sensed by the CK pin and the IC turns on the SR
MOSFET. Behavior varies according to the flyback transformer operating mode:
●Continuous conduction mode (CCM): the STSR30 uses an internal digital counter to
predict when it has to turn off the SR MOSFET.
●Discontinuous conduction mode (DCM): the STSR30 senses the voltage on the
INHIBIT pin (that is, Rdson x Isec) and turns off the SR MOSFET when it reaches the
-25mV threshold (i.e. the current is approaching zero).
During CCM operation, a certain amount of anticipation is used to prevent cross-conduction
of Q3 and Q1. This anticipation can be selected among three values by biasing the SETANT
pin. In the demo board, the SETANT voltage is 2.5V so the anticipation is 225ns.
The STSR30 works at 5V so it is necessary to obtain such voltage from the output. A low
cost linear regulator (L78L05) is used. For the same reason the gate drive of the IC has a
high value of 5V so a low threshold (logic level) MOSFET has to be used.
Another interesting feature of the STSR30 is its disable input. This is useful at low loads to
turn off the IC and reduce its power consumption. In this condition, the Schottky diode D1
works like in a standard flyback. The information on the load level is obtained by averaging
the voltage on the CK pin using R6, R15 and C4. The CK pin is low (~ 0V) only when the
current in the secondary winding is flowing (SR MOSFET on). Otherwise, the pin is pulled
up at 5V. As the load decreases, the average voltage on CK pin becomes higher and higher.
This voltage level is monitored by the last IC used, the TSM1015, a CV/CC controller that
includes a voltage reference and two op-amps. The reference and the CV op-amp are used
for the voltage control loop of the converter. The CC op-amp is not used for the current
control loop but it acts as a comparator to sense the average voltage of the CK pin. At light
loads, the CK voltage exceeds the threshold (V
) and the TSM1015 turns off the
REF
STSR30. By adding a little hysteresis (using R40), the DISABLE pin of the STSR30 is driven
digitally with a good noise rejection.
The next two pictures show some waveforms during normal operation at full load. It is
possible to see that the converter operates in CCM at 115 V
and in DCM at 230 V
RMS
RMS
.
7/27
AN2432Adapter features
Figure 2.V
IN
= 115V
- 60HzFigure 3.VIN = 230V
RMS
Ch1: Q3 drain voltage
M1: ISEN pin voltage
Figure 4 and Figure 5 show some of most important signals of the L6668 while operating at
full load. The oscillator signal is stable and clean in all conditions.
Figure 4.VIN = 115V
- 60HzFigure 5.VIN = 230V
RMS
Ch1: Q3 drain voltage
M1: ISEN pin voltage
RMS
RMS
- 50Hz
- 50Hz
CH1: Out
CH2: S-COMP
CH3: COMP
CH4: RCT
CH1: Out
CH2: S-COMP
CH3: COMP
CH4: RCT
On the secondary side, in CCM operation (full load with VIN = 115VAC), the gate drive of the
STSR30 is synchronized with the CK pin (copy of SR MOSFET drain voltage clamped at 5V)
as shown in Figure 6.
In Figure 7, the turn-off detail is zoomed and it is possible to see the anticipation amount
(225ns) and the jitter due to the digital counter inside the IC. In fact, most times the
anticipation has its typical value but sometimes the counter vary its value of ±1 cycle
(approximately ±70ns using the 14-MHz internal oscillator). In any case, cross-conduction is
always avoided.
In DCM operation, the gate-drive turn-on is still triggered by the falling edge of the CK pin
voltage, while turn-off is determined by the INHIBIT pin voltage crossing the -25mV internal
threshold. Figure 8 and Figure 9 show this mechanism at full load and V