AN2366
Application note
Guidelines for migrating ST72F324 or ST72324 (ROM)
applications to ST72F324B or ST72324B (ROM)
Introduction
This application note provides information on using ST72F324B, ST72324B (ROM)
microcontroller devices in applications originally designed for the ST72F324 and ST72324
(ROM) series.
Table 1. Migration cross-reference table
From To Description
ST72F324,
ST72324
ST72F324B,
ST72324B
8K to 32K program memory, 32-pin and 42-/44-pin
July 2009 Doc ID 12345 Rev 2 1/8
www.st.com
Contents AN2366
Contents
1 ST72F324 migration: feature overview . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Feature compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 VDD Rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Asynchronous RESET
2.3 Oscillator pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Performance improvements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Limitations summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2/8 Doc ID 12345 Rev 2
AN2366 ST72F324 migration: feature overview
1 ST72F324 migration: feature overview
Table 2. Feature overview
Feature
Package
Program memory 8K to 32K
RAM 384 bytes to 1 Kbyte
Operating supply 3.8V to 5.5V
Register map 128 bytes
I/Os
Power saving modes
Nested interrupts Yes
(1)
ST72F324 ST72324 ROM ST72F324B ST72324B ROM
(2)
TQFP44 (10x10) / SDIP42
/
TQFP32 (7x7) / SDIP32
32/24 Multifunction bidirectional lines
22/17 Alternate function lines
12/10 High sink outputs
Slow / Wait /
Active Halt / Halt
Slow / Wait /
Active Halt / Halt
Slow / Wait /
Active Halt /
(3)
Halt
Slow / Wait /
Active Halt /
Halt
(3)
MCC / RTC Yes
Watchdog Yes
16-bit timer
(OC / IC / PWM)
2 Timers (3/3/2)
(4)
2 Timers (3/3/2) 2 Timers (3/3/2) 2 Timers (3/3/2)
S P I Ye s Ye s Ye s Ye s
SCI Yes Yes Yes Yes
ADC Yes Yes Yes
LV D Yes N o Ye s
(5)
Ye s
Ye s
Emulator ST7MDT20J-EMU3 and ST7MTD20-DVP3 (for Flash devices only)
Programming tools ST7MDT20J-EPB and ST7MTD20-DVP3 (for Flash devices only)
1. Refer to the corresponding datasheets for more information.
2. SDIP42 / SDIP32 packages are valid only for non-automotive devices.
3. Exit from Active Halt mode available with external interrupts.
4. The TAOC2HR and TAOC2LR registers are write only; reading them will return undefined values and
OCF2 flag in the TACSR register cannot be used (forced to ‘0’ by hardware).
5. Improved ADC accuracy.
6. For 8K and 16K devices, Readout Protection is not supported if LVD is enabled.
(5)
(6)
Doc ID 12345 Rev 2 3/8