In this paper three different power supplies with two outputs are introduced: a Capacitive
passive network, and two versions of a low cost SMPS Buck converter. The last two are
based on VIPer12A, a high voltage Power MOSFET with a dedicated current mode PWM
controller , start-up circuit and protection integrated on the same silicon chip by
STMicroelectronics.
The considered converters are compared in terms of output voltage regulation, efficiency
and EMI, under the same output power conditions (about 0.6W).
Finally some modifications to the Buck converters are presented, in order to extend the
output power level to higher values, up to 1.1W.
The main specifications of the converters are listed in Table 1.
The schematic of the Capacitive power supply is shown inFigure 1. The capacitor C2
accommodates the AC mains voltage to a voltage level suitable for the application, while R1
and R2 are connected in order to limit the inrush current of the capacitors. The voltage is
then rectified by the diode D1 and regulated by means of zener diodes and electrolytic
capacitors. The output capacitor values, C4 and C6, have been chosen in order to keep the
output voltages ripples below 5%, at the given output load condition. The part list of the
converter is given inTable 2.
The considered circuit is based on the modified Buck converter shown in figure 2. It
provides two outputs with reversed polarity, V
Figure 2.Buck converter modified schematic
= 12V and V
out1
out2
= -5V.
S
+
Vin
-
The second complementary output, V
1
, is generated charging the capacitor C2 during the
out2
D
Dz
L
Vout1
C1
GND
C2
Vout2
free-wheeling of the inductor current. The voltage across such a capacitor is regulated by
means of a zener diode of suitable value. The power switch, S, operates at high frequency
for power conversion. The voltage is then filtered by the LC filter made up by L and C1.
In the standard Buck topology, the voltage of the node 1 is clamped by the diode D,
allowing the free-wheeling of the inductor current. In the proposed solution, the zener diode,
D
, clamps such a voltage to (VD+VZ), where VD is the voltage drop across the diode D, and
Z
V
is the zener voltage. If a capacitor is connected across the anode of the zener and the
Z
ground, a negative voltage source is generated. Of course, due to the principle of operation,
the second output cannot supply more current than the first one.
The switching cycle can be basically divided in two periods as shown inFigure 3.andFigure
4. Considering discontinuous conduction mode (DCM), during the conduction of the switch
S the input DC bus is connected to the output and supplies the load, as shown in Figure 3.).
Once the switch is turned off, the inductor current free-wheels through the diode D
shown in F igure 4.), until it zeroes and the output capacitor C1 feeds the load.
6/21 Rev1
, as
1
AN2300Modified Buck converter
Figure 3.Buck basic operation during the
switch TON
Vin
S
D1
Vout2
L
Rload
+
C1
The presence of the zener diode in the free-wheeling path does not affect the basic
operation of the converter, but it could impact on the efficiency. I n fact, if there is no load on
V
, the whole free-wheeling current will flow through both diodes, D1 and DZ, as shown in
out2
Figure 5.).
Figure 5.Modified Buck current flow at Iout2 = 0
Figure 4.Buck basic op eration during the
switch T
S
Vin
Figure 6.Modified Buck current flow at I
D1
Vout2
OFF
L
Rload
+
C1
out2
≠0
Vin
S
D1
DZ
L
+
C1
+
C2
As the current drawn from V
Rload1
Vout1
VinRload1
Iout1
Iout2 = 0
Vout2
increases, the free-wheeling current flows through a
out2
S
D1
DZ
L
+
C1
+
C2
Vout1
Iout1
Rload2
Iout2
Vout2
different path, splitting in two components as shown in Figure 6. In this way the power
dissipation in D
performs better if the complementary output is loaded, for a given output current I
In order to guarantee the proper operation of the converter when V
is reduced and the efficiency is increased accordingly. Thus, the converter
Z
is in open load
out1
out1
.
condition, a bleeder resistor has to be connected.
A practical implementation of the circuit is presented in schematic A (see figure Figure 7.),
where R1 is the bleeder resistor; D3, C3 and C4 are needed for VIPer12A biasing; L1, C1,
D1, C2 make up the input filter for EMI compliance; R0 limits the inrush current of the
capacitors.
Rev17/21
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