ST AN2264 APPLICATION NOTE

Introduction
Thi document introduces a cost effective solution for low power high voltage power supplies. The proposed solution consists of in an off-line SMPS and a low cost front-end regulation circuit for input voltage limiting. Such a circuit allows proper operation of the power converter avoiding the use of voltage over-rated components, both passive and active. The circuit is suitable for any off-line SMPS topology since it includes a switching transistor connected between the input rectifier and the DC bulk capacitor (STMicroelectronics patent pending). The series switch limits the DC input voltage of the power converter by means of a suitable driving circuit; thus the SMPS primary transistor can be selected as a standard part as well as a smart power primary IC.
AN2264
APPLICATION NOT E
Three-Phase SMPS for low power applications
with VIPer12A
Typical end applications of this solution can be found in the industrial market in the range below 5W, such as three-phase and single phase power meter, industrial bias power supply and auxiliary S MPS for high vo ltage stree t-lighti ng, where the input voltage can range between 90Vac and 450Vac and 1000V power MOSFETs are currently used.
As an example of industrial applications, a flyback converter for supplying an electronic power meter is considered. The use of the proposed approach in a power converter designed for 265Vac maximum input voltage allows the operating input voltage to be extended up to 450Vac or higher with no damages to the converter components. Thus, the major benefit of such solution is a significant cost saving thanks to the reduction of components voltage rating.

Figure 1. Board Prototype

Rev 1.0
AN2264/1105 1/42
www.st.com
42
AN2264
Contents
1 Application Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Input Voltage Limiting Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Steady State Behaviour . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3 Line And Load Regulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.4 Hold-up Time Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.5 Additional Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.6 Measurements At The Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4 Conducted Emissions Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5 Thermal Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2/42
AN2264
Figures
Figure 1. Board Prototype . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. Circuit Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. PCB Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4. Flyback Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. MOSFET STD3NK50Z Operation at FULL LOA D and Vin = 450 Vrms . . 13
Figure 6. VIPer12AS Vds & Id at FULL LOAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. VIPer12AS Vds & Id at HALF LOAD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 8. VIPer12AS Vds & Id at MINIMUM LOAD . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 9. STD3NK50Z Vds & Id at FULL LOAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 10. Line Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 11. Load Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 12. Hold-up Time Capability at FULL LOAD. . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 13. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 14. VIPer12AS and Outputs-Start-up at FULL LOAD . . . . . . . . . . . . . . . . . . . 31
Figu r e 1 5 . STD3N K 5 0 Z-1 St a r t-up at FULL LOAD . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 16. Start-up at MINIMUM LOAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 17. Conducted Emissions - at Vin=230Vac - FULL LOAD . . . . . . . . . . . . . . . 34
Figure 18. Conducted Emissions - at Vin=380Vac - FULL LOAD . . . . . . . . . . . . . . . 35
Figure 19. Thermal Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3/42
AN2264
Tables
Table 1. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Three-Phase Electricity Meter Voltage Marking . . . . . . . . . . . . . . . . . . . . . 5
Table 3. B ill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4. Full Load (Iout ≈100mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5. Half Load (Iout50mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 6. Minimum Load (Iout=10mA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4/42
AN2264 1 Application Description

1 Application Description

The present SMPS has been designed according to the following specifications:

Table 1. Operating conditions

Parameter Value
Input Voltage Range 90 to 450 V ac Input Frequency Range 50/60 Hz Output Voltage 1 V1=5V Output Voltage 2 V2=3.3V Output Current 1 I1=10mA Output Current 2 I2=100mA Output Power (peak) 550mW Line Regulation +/- 1% Load Regulation +/- 1% Output Ripple Voltage 1 50mV Hold-up capability > 40 ms (*) Safety EN60950 EMI EN55022 class B
(*) Considering the STPM01 roll over time (31ms) and the Memory M95040 write time per data (5ms).
In addition to the previous specs, the power supply has to be compliant also with the standards of electricity meters, i.e. IEC 62052-11 and IEC 62053-21, since it has been specifically developed for such an application. The main prescriptions are listed here below:
Input connection and voltage marking (EN62052-11):

Table 2. Three-Phase Electricity Meter Voltage Marking

Meter Rated System Voltage (V)
Single-phase 2 wire 120V 120 Single-phase 3 wire 120V (120V to t he mid-wire) 240 Three-Phase 3 wire 2-element (230 V between phases) 400 Three-Phase 4 wire 3-element (230 V phase to neutral) 400
Pulse Voltage Test (EN62052-11):
- Pulse waveform: according IEC 60060-1
- Voltage rise time: ±30%
- Voltage fall time: ±20%
5/42
1 Application Description AN2264
- Source impedance: 500 ± 50
- Source Energy: 0.5J ±0.05J
- Rated Pulse Voltage: 4000V
- Test Voltage Tolerance: +0 -10%
Mean input power : 2W according to EN62053-21 (Switching power supplies with peak
power values exceeding the specified value are also permitted)
Temperature Range: -25°C ± 3°C ÷ +70°C ± 2°C (EN 62052-11)
6/42
AN2264 2 Circuit Description

2 Circuit Description

The schematic of the board is shown in Figure 2. A 3-phase 4-wire bridge is used for mains rectification because the neutral rectification is
needed to ensure proper operation in case of missing neutral connection or neutral mis-wiring. A varistor is connected between each line and neutral to guarantee pulse voltage test immunity
according to the EN62052-11 standard. The input EMI filter is a simple undamped LC-filter for both differential and common mode noise
suppression. The circuit for input voltage limiting is connected between the input EMI filter and the bulk
capacitor C4. Such a circuitry includes a Power MOSFET and a self driven control section. The MOSFET Q1 is a standard N-Channel 500V 3.3 in D-PAK package, mounted on a small copper area to improve thermal performance. The self driven control section consists of a voltage divider and zener diodes. The resistors R1, R2 and R3 ensure the gate-source charge for the switch, while the zener diodes D3 and D4 set t he maximum voltage val ue (360V) ac ross the bulk capacitor.
An NTC limits the inrush current and ensures Q1 operation inside its safe operating area. The flyback converter is based on VIPer12AS, a member of the VIPerX2A family, which
combines a dedicated current mode off-line PWM controller with a high voltage power MOSFET on the same silicon chip. The switching frequency is fixed at 60kHz by the IC internal oscillator allowing, to optimize the transformer size and cost. The transformer reflected voltage has been set to 60V, providing enough margin for the leakage inductance voltage spike and no snubber circuit is needed with a consequent cost saving.
As soon as the voltage is applied on the input of the converter the high voltage start-up current source connected to the drain pin is activated and starts to charge the V a constant current of 1mA. When the voltage across this capacitor reaches the V (about 14V) the VIPer12AS starts to switch. During normal operation the smart power IC is powered by the auxiliary win ding of the transforme r via the diode D7. No spike killer fo r the auxiliary vo ltage fluctu ations is needed thanks to the wide range of the V primary current is measured using the integrated current sensing for current mode operation.
The output rectifier D6 has been chosen in accordance with the maximum reverse voltage and power dissipation; in particular a 0.5A-80V Schottky diode, type TMBAT49, has been selected.
The output voltage regulation is performed by secondary feedback on the 5V output dedicated to the display, while the 3.3V output, dedicated to the logic part and the microcontroller, is linearly post-regulated from the 5V output. This operation is performed by a very low drop voltage regulator, L4931ABD33, in SO-8 package. The voltage regulator delivers up to 100mA, ensuring good reliability with no heat sink. The feedback netw ork ensures the requir ed insulation between the primary and secondary sections. The optotransistor directly drives the VIPer12AS feedback pin which controls the IC operation.
A small LC filter has been added to the 5V output in order reduce the high frequency ripple with reasonable output capacitors value.
capacitor C8 through
dd
pin (9-38V). The
dd
threshold
ddon
The flyback transformer is a layer type based on E13 core and N27 ferrite, manufactured by Pulse Eldor, and ensures safety insulation in accordance with the EN60950. Figure 4. shows the main features of the transformer.
7/42
2 Circuit Description AN2264
The whole power supply has been realized on a double side 35um PCB in FR-4, measuring 78 x 38 mm.

Figure 2. Circuit Sc hemati c

3.3V@100mA
1
U2 L4931ABD33
8
4
+
R7
R6
R5
LL4148
GND
4.7K
SMD
1K
SMD
12
U4
PC817
43
220E SMD
R9
C8
50V
SMD
R8
C9
100nF
U3
5.6K SMD
D
8
D
7
D
6
D
5
U1
4
+
10uF 50V
4.7K SMD
3
TS2431
2 1
C10
47nF
50V
SMD
S
1
S
2
VIPer12AS
Vdd
FB
3
C7
2.2uF 25V
INH
5
NC
4
VOUT
GND
7
GND
6
GND
3
GND
2
VIN
5
D7
R4
10E
SMD
D4
180V
D3
180V
VDD
5V@10mA
L2
10uH 100mA SMD
D6
TMBAT 49
C1
Q1
NTC1
10
2.2nF/ 2k V (Y1) T1
1
D5
1
STD3NK50Z
2 3
50E
R1
3.3V
+
C6
22uF 25V
+
C5
330uF 25V
6
2
2.2uF450V
+
C4
SOD-80
ZMM 1 5
R3
330K SMD
330K SMD
R2
330K SMD
D1
2
RV1
SO5K275/275V
P1
C2
220nF
3
-+
4
RV2
SO5K275/275V
L1
1mH
RF1
22E 0.75W
630V
SMD
BRIDGE
RF2
1
22E 0.75W
P2NP3
C3
630V
SMD
220nF
3
D2
2
-+
4
RV3
SO5K275/275V
RF3
22E 0.75W
8/42
BRIDGE
1
RF4
22E 0.75W
Layout Hin ts: Q1 mounted on 1cm x 0.8cm copper
area. C8&C 10 have to be c losed to the VI Per12AS.
GND Pins f or U2 have to b e soldered to a unique
Note:
copper are a.
AN2264 2 Circuit Description

Figure 3. PCB La yout

Top side-silk screen (in scale)
Bottom side- silk screen (in scale)
Top side-copper tracks (in scale)
Bottom side-copper tracks (in scale)
9/42
2 Circuit Description AN2264

Figure 4. Flyback Tran sformer

< 2%
11
3
):
p
Primary Inductance: 2.2mH ±20%
Primary Leakage Inductance (%L
Primary to secondary turn ratio:
Auxiliary to secondary turn ratio:
10/42
AN2264 2 Circuit Description

Table 3. Bill of Materials

Reference Value Description
CON1, CON2 CON3
Hartmann/ptr, 2 poles, type PK 7402, 380V Hartmann/ptr, 3 poles, type PK 3503, 380V
AC AC
16A 16A
C1 2.2nF/2kV Cera-Mite Corporation 44LD 22 Y1 Ceramic Capacitor 20% C2, C3 220nF 630V TDK C5750X7R2J224M SMD Ceramic Capacitor 20%
C4 2.2uF450V
C5 330uF 25V
C6 22uF 16V
C7 2 .2uF 50V
C8 10uF 50V
Rubycon Aluminium Radial Lead El ectrolytic Capacitor YK Series 29mA 20%
Rubycon Aluminium Radial Lead El ectrolytic Capacitor ZL Series 56mR 995mA 20%
Rubycon Aluminium Radial Lead El ectrolytic Capacitor ZA Series 270mR 350mA 20%
Panasonic ECA1HHG2R2 NHG-A Radial Lead Electrolytic Capacitor 18mA 20%
Panasonic ECA1HHG100 NHG-A Radial Lead Electrolytic
Capacitor 39mA 20% C9 100nF 50V muRata GRM40X7R104Z50 SMD Ceramic Capacitor 20% C10 47nF 50V muRata GRM40X7R473Z50 SMD Ceramic Capacitor 20% D1, D2 BRIDGE General Instrument s DF 10S SMT Diode Bridge 1000V 1A D3, D4 ZY180V DO-41 Zener Diode 180V 2W 5% D5 ZMM 15/SOD-80 Mini-Melf Zener Diode 15V 0.5W 5% D6
TMBAT49 STMicroelectronics Small Signal Schottky Diode 80V 0.5A
D7 LL4148/SOD-80 SOD-80 General Purpose Rectifier 75V 200mA L1 1mH Epcos B78108-S1105J , Bobbin Core BC 130mA 13R 10%
L2 10uH
TDK GLF2012T100M SMD Signal-Use SMD Inductor 125mA
20% NTC1 50E UEI 10SP050L Inrush Current Suppr essor 50R 2A 10% Q1 RF1, RF2, RF3,
RF4 RV1, RV2, R V 3 SO5K275/275V
STD3NK50Z STMicroelectronics N -Channel Mosfet 500V 2.3A 3.3R
22E 0.75W Ya geo R esi stor, wire wound, fusible, 22R 0.75W 5%
Epcos B72650M271K72 SMD Varistor 275V
AC
8.6J
R1, R2, R3 330K SMD Resistor, Metal Film 0.25W 5% R4 10E SMD Resistor, Metal Film 0.25W 5% R5 220E SMD Resistor, Metal Fil m 0.25W 5% R6 1K SMD Resistor, Metal Film 0.25W 5% R7 4.7K SMD Resistor, Metal Fil m 0.25W 5% R8 4.7K SMD Resistor, Metal Film 0.25W 5% R9 5.6K SMD Resistor, Metal Film 0.25W 5%
11/42
2 Circuit Description AN2264
Table3. Bill of Materials (Continued)
Reference Value Description
T1 2432.0015C E13 TIW Pulse Eldor Switch Mode Transformer
U1
U2
U3
U4 PC817 Sharp Optocoupler 5kV
VIPer12AS
L4931ABD33
TS2431
STMicroelectronics
27R
STMicroelectronics
3.3V 300mA 1%
STMicroelectronics
Reference 1%
Off Line SMPS Primary IC 730V 0.4A
Very Low Drop Voltage Regulator
Programmable Shunt V ol tage
12/42
AN2264 3 Experimental Results

3 Experimental Results

3.1 Input Voltage Limiting Circuit

The main waveforms of the input voltage limiting circuit are shown in Figure 5. In particular the waveforms refer to the start-up and the steady-state operations at 450Vac and full load ,which are the worst conditions for the device. The advantages of this solution are evident. It limits the DC voltage at the given reference value, in this case 360V, and avoides the use of over-rated components compared to the standard off-line power supply.

Figure 5. MOSFET STD3NK50Z Operati on at FULL LOAD and Vin = 450 Vrms

Start-Up
CH1: INPUT VOLTAGE (Blue) CH2: DRAIN CURRENT (Red) CH3: DRAIN-SOURCE VOLTAGE (Green)
CH1: DRAIN VOLTAGE (Blue) CH2: DRAIN CURRENT (Red) CH3: SOURCE VOLTAGE (Green)
Steady State
13/42
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