ST AN2260 Application note
AN2260
APPLICATION NOTE
STR73x SystemMemory Boot Mode
Introduction
This application note describes the features of the SystemMemory boot mode developed for STR73x Flash microcontrollers to provide all the basic functionality to support programming of the embedded Flash. It will describe its general features, and then move on to specific features of the UART boot mode.
|
Rev 1 |
November 2005 |
1/10 |
|
|
www.st.com
AN2260
Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
|
1.1 |
Entering SystemMemory boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
|
1.2 |
Hardware requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
|
1.3 |
Loading code in SystemMemory boot mode . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
|
1.4 |
Exiting SystemMemory boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
|
1.5 |
SystemMemory code program flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
2 |
UART SystemMemory boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
|
2.1 UART SystemMemory code sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Choosing the UART baud rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1 Minimum baud rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.2 Maximum baud rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.3 Higher baud rate deviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2/10
AN2260 |
1 General description |
1 General description
The STR73x is normally woken up in SystemMemory boot Mode when the Flash is still not programmed in the manufacturing line environment. In this case the system boot is performed from SystemMemory sector in the Flash bank0. This mode allows initializing the Flash programming via a serial interface. The SystemMemory code is going to load a Flash programming code (called “loader” from now on) into internal RAM via the UART0 serial interface.
1.1Entering SystemMemory boot mode
The STR73x enters the SystemMemory Boot Mode if the mode pins are configured with M0=0, M1=1 as the hardware reset pin (RSTIN) transitions High at the end of a hardware reset. The M1 signal is used to stretch the internal clock. M1 must be forced back to Low (0) after the RSTIN pin has stabilized. Forcing M1 Low is required in order to enable propagation of the system clock throughout the device.
As the M1 pin is forced Low the STR73x CPU begins executing the SystemMemory code which resides in the SystemMemory Sector now mapped at address 0x00000000.
Note: |
The normal Flash boot sector will not be available at address 0x00000000 until the |
|||
|
SystemMemory sector is re-mapped to 0x8010C000 by clearing the SMBM bit in the Flash |
|||
|
Control Register 0. The SystemMemory code does not perform this re-mapping operation. |
|||
|
Table 1. |
STR73x device configuration in SystemMemory Boot Mode |
||
|
|
|
|
|
|
Feature/Peripheral |
State |
Comment |
|
|
|
|
|
|
|
Instruction Set |
THUMB |
Save code space with 16-bit instructions |
|
|
|
|
|
|
|
CPU Mode |
Supervisor |
Full access with IRQ/FIQs disabled |
|
|
|
|
|
|
|
Input Clock |
External Quartz |
allow a Frequency in a range of 4 to 8MHz |
|
|
|
|
|
|
|
|
CLK2 |
Div2 Enabled |
- |
|
|
|
|
|
|
|
|
Free running |
System Clock in a range of 12 to 24MHz to enable |
|
|
PLL |
MX=12 |
|
|
|
higher serial link baudrates |
||
|
|
|
DX=2 |
|
|
|
|
|
|
|
|
|
|
|
|
UART0_RX Pin |
Input |
UART0 receive |
|
|
|
|
|
|
|
UART0_TX Pin |
Default |
Only configured for UART Boot |
|
|
|
|
|
|
|
UART0 Registers |
Default |
Only configured for UART Boot |
|
|
|
|
|
|
1.2Hardware requirements
The hardware required for putting the STR73x into SystemMemory boot mode would consist of any circuitry, switch, or jumper capable of holding the M1 pin High during Reset, and then forcing M1 Low after the reset is complete. For more details refer to the application note
STR73x Hardware Getting Started (AN2156), Boot Management section.
To connect to the STR73x during SystemMemory boot mode, a RS232 serial interface must be directly linked to UART0 pins, for more details refer to the AN2156 document.
3/10
Loading...