ST 74V2T132 User Manual
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74V2T132
DUAL 2-INPUT SHMITT TRIGGER NAND GATE
■ HIGH SPEED: t
■ LOW POWER DISSIPATION:
I
=1µA (MAX.) at TA=25°C
CC
■ TYPICAL HYSTERESIS: 0.8V at V
■ SYMMETRICAL OUTPUT IMPEDANCE:
|=IOL=8mA(MIN)
|I
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
PHL
■ OPERATING VOLTAGE RANGE:
(OPR) = 4.5V to 5.5V
V
CC
■ IMPROVED LATCH-UP IMMUNITY
= 3.7 ns (TYP.) at VCC=5V
PD
=4.5V
CC
DESCRIPTION
The 74V2T132 is an advanced high-speed CMOS
SINGLE 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
Pin configuration and function are the s ame as
those of the 74V2T00 but the 74 V2T132 has
hysteresis.
SOT23-8L
ORDER CODES
PACKAGE T & R
SOT23-8L 74V2T132STR
The internal circuit is composed o f 3 st ages
including buffer output, w hich provide high noise
immunity and stable output.
Power down protection is provide d on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
usedto interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/7June 2003
74V2T132
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME QND FUNCTION
1, 5 1A, 2A Data Input
2, 6 1B, 2B Data Input
7, 3 1Y, 2Y Data Output
4 GND Ground (0V)
8
TRUTH TABLE
ABY
LLH
LHH
HLH
HHL
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) V
CC
2) Highor Low State
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (see note 1)
O
DC Output Voltage (see note 2) -0.5 to VCC+ 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
=0V
V
CC
Positive Supply Voltage
-0.5 to +7.0 V
-0.5 to +7.0 V
-0.5 to +7.0 V
-20 mA
± 20 mA
± 25 mA
± 50 mA
-65 to +150 °C
300 °C
V
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
V
T
1) VCC=0V
2) Highor Low State
2/7
Supply Voltage
CC
Input Voltage
I
Output Voltage (see note 1)
O
Output Voltage (see note 2) 0 to V
O
Operating Temperature
op
4.5 to 5.5 V
0 to 5.5 V
0 to 5.5 V
CC
-55 to 125 °C
V
DC SPECIFICATIONS
Symbol Parameter
V
High Level
t+
Threshold Voltage
V
Low Level
t-
Threshold Voltage
V
Hysteresis Voltage 4.5 0.4 1.4 0.4 1.4 0.4 1.4
h
V
V
+
I
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
Input Leakage
I
I
Current
Quiescent Supply
I
CC
Current
I
Additional Worst
CC
Case Supply
Current
Output Leakage
OPD
Current
74V2T132
Test Condition Value
= 25°C
T
V
CC
(V)
A
Min. Typ. Max. Min. Max. Min. Max.
4.5 0.9 2.0 0.9 2.0 0.9 2.0
5.5 1.1 2.0 1.1 2.0 1.1 2.0
4.5 0.5 1.5 0.5 1.5 0.5 1.5
5.5 0.6 1.6 0.6 1.6 0.6 1.6
5.5 0.5 1.6 0.5 1.6 0.5 1.6
4.5
4.5
4.5
4.5
0to
5.5
5.5
IO=-50 µA
=-8 mA
I
O
IO=50 µA
=8 mA
I
O
VI= 5.5V or GND
V
I=VCC
or GND
4.4 4.5 4.4 4.4
3.94 3.8 3.7
0.0 0.1 0.1 0.1
One Input at 3.4V,
other input at V
5.5
CC
or GND
=5.5V
0
V
OUT
-40 to 85°C -55 to 125°C
0.36 0.44 0.55
± 0.1 ± 1.0 ± 1.0 µA
11020µA
1.35 1.5 1.5 mA
0.5 5.0 5.0 µA
Unit
V
V
V
V
V
AC ELECTRICAL CHARACTERISTICS (Input t
r=tf
=3ns)
Test Condition Value
Symbol Parameter
t
t
(*) Voltage rangeis 5.0V ± 0.5V
Propagation Delay
PLH
Time
PHL
T
(*)
(V)
C
(pF)
L
V
CC
A
Min. Typ. Max. Min. Max. Min. Max.
5.0 15 3.7 5.5 1.0 6.5 1.0 6.5
5.0 50 5.2 7.5 1.0 8.5 1.0 8.5
-40 to 85°C -55 to 125°C
Unit
ns
= 25°C
CAPACITANCE CHARACTERISTICS
Test Condition Value
= 25°C
Symbol Parameter
T
A
Min. Typ. Max. Min. Max. Min. Max.
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
410 10 10pF
19 pF
(note 1)
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average current can be obtained by the following equation. I
CC(opr)=CPDxVCCxfIN+ICC
-40 to 85°C -55 to 125°C
/2
Unit
3/7
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