5-2.Rear Cover, Stand & Bezel ................................. 113
5-3.Vesa Arm, Power Unit & Power Cords............. 114
6. ELECTRICAL PARTS LIST .................................. 115
WARNING !!
AN ISOLATION TRANSFORMER SHOULD BE USED DURING
ANY SERVICE WORK TO AVOID POSSIBLE SHOCK HAZARD
DUE TO LIVE CHASSIS, THE CHASSIS OF THIS RECEIVER IS
DIRECTLY CONNECTED TO THE POWER LINE.
SAFETY-RELATED COMPONENT WARNING !!
COMPONENTS IDENTIFIED BY SHADING AND MARKED
THE SCHEMATIC DIAGRAMS, EXPLODED VIEWS AND IN THE
PARTS LIST ARE CRITICAL FOR SAFE OPERATION. REPLACE
THESE COMPONENTS WITH SONY PARTS WHOSE PART
NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN
SUPPLEMENTS PUBLISHED BY SONY.
ON
- 2 -
SECTION 1 GENERAL
CAUTION
Lead Free Soldered Boards
The circuit boards used in these models have been processed using
Lead Free Solder. The boards are identified by the LF logo located
close to the board designation e.g. F1, H1 etc [ see examples ]. The
servicing of these boards requires special precautions to be taken as
outlined below.
WAX3
RM-ED009
example 1
example 2
It is strongly recommended to use Lead Free Solder material in order to guarantee optimal quality of new solder joints. Lead Free Solder is
available under the following part numbers :
rebmuntraPretemaiDskrameR
91-500-046-7mm3.0gK52.0
02-500-046-7mm4.0gK05.0
12-500-046-7mm5.0gK05.0
22-500-046-7mm6.0gK52.0
32-500-046-7mm8.0gK00.1
42-500-046-7mm0.1gK00.1
52-500-046-7mm2.1gK00.1
62-500-046-7mm6.1gK00.1
Due to the higher melting point of Lead Free Solder the soldering iron tip temperature needs to be set to 370 degrees centigrade. This requires
soldering equipment capable of accurate temperature control coupled with a good heat recovery characteristics.
For more information on the use of Lead Free Solder, please refer to http://www.sony-training.com
- 3 -
CAUTION
HIROSE MDF CONNECTOR
INSERTION
1. TO INSERT THE CONNECTOR
WAX3
RM-ED009
(1) Press the
middle part of
the connector to
confirm it locks.
(2) Press the
right side to
confirm it is
locked.
(3) Press the left
side to confirm it
is locked.
CAUTION :The connector might not be properly locked when only
pressed in the middle.
Be sure to press both sides to confirm it is properly
locked.
- 4 -
SPECIFICATIONS
WAX3
RM-ED009
ITEM MODELTelevision SystemStereo SystemChannel CoverageColor System
Analogue:
PAL, SE C A M
NTSC 3.58/4.43
(VIDEO ONLY)
Digital:
MPEG-2 MP@ML
Analogue:
PAL, SE C A M
NTSC 3.58/4.43
(VIDEO ONLY)
Digital:
MPEG-2 MP@ML
Approx 790x581x214mm
(KDL-32D30XX with stand)
Approx 790x530x100mm
(KDL-32D30XX without stand)
Approx 981x696x265mm
Dimensions
2: 21-pin Euro connector
(CENELEC standard)
Phono Jacks
HDMI InputsHDMI Connectors
PC Input15 Pin D Sub Connector
CAMConditional Access Module
Input/Output Terminals [SIDE]Remote control system : Infrared control
Headphone jackStereo mini jack
Audio inputPhono jacks
Video inputPhono jack
S Video input4 pin mini DIN
HDMI InputHDMI Connector
Inputs for Audio and Video signals.
Inputs for RGB.
Outputs of Video and Audio signals
(Selectable). SmartLink interface.
Output Connectors variable for
Audio Signals.
Design and specifications are subject to change without notice.
Weight
Supplied Accessories
Other Features
Power requirements
(KDL-40D30XX with stand)
Approx 981x643x110mm
(KDL-40D30XX without stand)
Approx 1114x782x306mm
(KDL-46D30XX with stand)
Approx 1114x730x115mm
(KDL-46D30XX without stand)
Approx 17.5kg (KDL-32D30XX with stand)
Approx 15.0kg (KDL-32D30XX without stand)
Approx 25.5kg (KDL-40D30XX with stand)
Approx 21.5kg (KDL-40D30XX without stand)
Approx 32.5kg (KDL-46D30XX with stand)
Approx 28.0kg (KDL-46D30XX without stand)
RM-ED009 Remote Commander (1)
IEC designated R06 battery (2)
Mains lead (Type BF) (1)
Coaxial cable (1)
Support belt (1) and screws (2)
Wide viewing angle LCD Panel, Intergrated
digital TV Tuner, Live colour creation, BBE digtal,
Trusurround XT, 3 HDMI inputs, PC input.
3V dc
2 batteries IEC designation
R06 (size AA)
- 5 -
How to replace the fuse.
Open the fuse compartment with
a screwdriver blade and replace
the fuse.
FUSE
UK PLUG WARNING
WARNING (UK Models only)
The flexible mains lead is supplied connected to a B.S. 1363 fused
plug having a fuse of 13 AMP rating. Should the fuse need to be
replaced, use a 13AMP FUSE approved by ASTA to BS 1362, ie one
that carries the
IF THE PLUG SUPPLIED WITH THIS APPLIANCE IS NOT SUITABLE FOR THE OUTLET SOCKETS IN YOUR HOME, IT SHOULD
BE CUT OFF AND AN APPROPRIATE PLUG FITTED. THE PLUG
SEVERED FROM THE MAINS LEAD MUST BE DESTROYED AS A
PLUG WITH BARED WIRES IS DANGEROUS IF ENGAGED IN A
LIVE SOCKET.
When an alternative type of plug is used, it should be fitted with a
13 AMP FUSE, otherwise the circuit should be protected by a
13AMP FUSE at the distribution board.
Standard level : 0.5V rms
Output impedence : Less than 1kohm*
Standard level : 0.5V rms
Output impedence : More than 10kohm*
Standard level : 0.5V rms
Output impedence : Less than 1kohm*
Standard level : 0.5V rms
Output impedence : More than 10kohm*
High state (9.5-12V) : Part mode
Low state (0-2V) : TV mode
Input impedence : More than 10K ohms
Input capacitance : Less than 2nF
positive
0.3 +/- 3dB, 75 ohms, positive
High state (1-3V) Low state (0-0.4V)
Input impedence : 75 ohms
(-3+10dB)
(-3+10dB)
1V +/- 3dB, 75ohms, positive sync 0.3V
(-3+10dB)
ConnectedNot Connected (open) * at 20Hz - 20kHz
- 6 -
HDMI Connector
1
WAX3
RM-ED009
Pin NoSignal AssignmentPin NoSignal Assignment
1TMDS Data2+11TMDS Clock Shield
2TMDS Data2 Shield12TMDS Clock-
3TMDS Data2-13CEC
4TMDS Data1+14Reserved (N.C. on device)
5TMDS Data1 Shield15SCL
6TMDS Data1-16SDA
7TMDS Data0+17DDC/CEC Ground
8TMDS Data0 Shield18+5V Power
9TMDS Data0-19Hot Plug Detect
10TMDS Clock+
15 Pin D Sub Connector (PC)
Pin NoSignal AssignmentPin NoSignal Assignment
1Red Out9+5V DC
2Green Out10Sync Return (Ground)
3Blue Out11Monitor ID0 in Display
4Unused12DCC Serial Data
5Ground13Horizontal Sync
6Red Return14Vertical Sync
7Green Return (Ground)15DCC Serial Clock
8Blue Return (Ground)
Rear Connection PanelSide Connection Panel
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S-Video
socket
niP
oN
1dnuorG-
2dnuorG-
3tupni)langisS(Y,mho57Bd3-/+V1
4tupni)langisS(CBd3-/+V3.0
langiSleveLlangiS
V3.0.cnySevitisop
Bd01+3-
ev
itisop,mho57
.cnyS
- 7 -
WAX3
RM-ED009
WAX3 SELF DIAGNOSTIC SOFTWARE
The identification of errors within the WAX3 chassis is triggered in one of two ways :- 1: Busy or 2: Device failure to respond to IIC. In the
event of one of these situations arising the software will first try to release the bus if busy (Failure to do so will report with a continuous
flashing LED) and then communicate with each device in turn to establish if a device is faulty. If a device is found to be faulty the relevant
device number will be displayed through the LED (Series of flashes which must be counted).
LED Error Code
Monitoring Items Number of Standby LED
(Red) Blinking
Main power supply voltage error2
DC_ALERT13
DC_ALERT24
DC_ALERT35
Backlight error6
Internal temperature error7 *2
Audio error8
Fan error (HFR model only)9
Digital FE error10
Trident error11
HFR error *112
Balancer error 13
Note *1: It is judged as HFR Error when Safety Shutdown is activated due to either of FRC ACK error,
1.5V error, 2.5V/3.3V error, or Panel 12V error.
Note *2: The number of LED-blinking times for Internal temperature error is also used for BH-board
temperature error: these two errors are distinguished from whether TV Shutdown is involved
or not.
2.0 2.0
0.3
0.3
The figure above illustrates the LED display of DC_ALERT2.
Blinking is repeated in cycles of 0.3sec for the specified times, and, after the 2sec light-off
period, the blinking is again repeated for the same times. Note that the 2sec light-off period is
fixed regardless of contents of error.
- 8 -
2-1. REAR COVER REMOVAL
WAX3
RM-ED009
SECTION 2 DISASSEMBLY
2-2. STAND REMOVAL
– 9 –
2-3. BOTTOM FRAME REMOVAL
WAX3
RM-ED009
2-4. AC INLET REMOVAL
– 10 –
2-5. LOUDSPEAKER REMOVAL
WAX3
RM-ED009
2-6. HEATSINK REMOVAL
– 11 –
2-7. BE1 BOARD REMOVAL
WAX3
RM-ED009
– 12 –
2-8. D1 and G3 BOARD REMOVAL
(KDL-40/46D30XX)
(KDL-40/46D30XX)
WAX3
RM-ED009
2-9. H3 BOARD REMOVAL
– 13 –
2-10. H1 BOARD REMOVAL
WAX3
RM-ED009
2-11. H4 BOARD REMOVAL
– 14 –
2-12. U2 BOARD REMOVAL
WAX3
RM-ED009
2-13. D2 BOARD REMOVAL
(KDL-46D30XX)
– 15 –
2-14. VESA ARM and LCD PANEL REMOVAL
WAX3
RM-ED009
– 16 –
SECTION 3 SET-UP ADJUSTMENTS
㧜
㧞㧟㧠㧡㧢㧣
WAX3
RM-ED009
3-1. How to enter Service Mode
Service adjustments to this model can be performed using the
supplied remote Commander RM-ED009.
1.Turn on the power to the TV set and enter into the stand-by
mode.
2.Press the following sequence of buttons on the Remote
Commander.
i+
(ON SCREEN (DIGIT 5) (VOLUME +) (TV)
DISPLAY)
3.The following menu will then appear on the screen.
5
+
TV
I/
3-2. Signal Level Adjustment
Set up of AD calibration1 adjustment for
3-2-1.
terrestrial analog.
The following adjustments are done via ECS.
1. Send ECS_ADJUST_LEVEL_SETTING_INIT command.
2. Set: SREG_NR = 3 (High), HREG_P4_CVD2_85[2:0] = 0 and
ADJ_COLOR_PAL = 3.
3. Set the following registration items.
Screen Size32"40"46"
SREG_TARGET_Y_RF160160160
SREG_TCD3_CONT_PAL_RF128128128
SREG_TCD3_SAT_PAL_RF128128128
SREG_TCD3_HUE_PAL_RF128128128
3-2-2.
Y signal calibration1 adjustment for
terrestrial analog.
4.Move to the relevant command using the up or down arrow
buttons on the remote commander.
5.Press the right arrow button to enter into the required menu item.
6.Press the ‘Menu’ button on the remote commander to quit the
Service Mode when all adjustments have been completed.
Note :
•After carrying out the service adjustments, to prevent the
customer accessing the ‘Service Menu’ switch the TV set OFF
and then ON.
1. Input PAL colour bar 75%Y, 75%C via terrestrial input.
2. Send ECS_ADJUST_TCD3_CONT_RF command.
3. Read the value of S-REG_APL_LUMA via ECS. Confirming that
the value is within spec of the table below.
AD-ADJUST RF SPECSPEC
Reference register name
SREG_TARGET_Y_RF±2
S-REG_APL_LUMA
3-2-3.
C signal calibration1 adjustment for
terrestrial analog.
1. Send ECS_ADJUST_TCD3_HUE_RF command.
2. Read S-REG_AVE_VAL_B_AREA0 via ECS.
(READ_AREA = 0).
3. Read S-REG_AVE_VAL_B_AREA6 via ECS.
(READ_AREA = 6).
4. Confirm that 8 bits of MSB of item number 2) and 3) are within
spec of the table below.
- 17 -
Reference ItemSpec.
S-REG_AVE_VAL_B_AREA*
difference
±2
㧜
㧞㧟
㧠㧡㧢㧣
㧜
㧞㧟
㧠㧡㧢㧣
5. Read S-REG_TCD3_SATURATION via ECS.
㧜
㧞㧟㧠㧡㧢㧣
6. Restore the original value. S-REG_NR = 4 (Auto).
7. Send ECS command ADJUST_LEVEL_SETTING_CLR.
3-2-4.
Set up of AD calibration1 adjustment for
video.
1. Send ECS_ADJUST_LEVEL_SETTING_INIT command.
2. Set SREG_NR = 1 (Low), HREG_P4_CVD2_85[2:0] = 0 and
SREG_ADJ_COLOR_PAL = 3.
3. Set the following registration items.
Screen Size32"40"46"
WAX3
RM-ED009
4. Read S-REG_AVE_VAL_B_AREA6 via ECS
(READ_AREA = 6).
5. Confirm that 8 bits of MSB of item number 3) and 4) are within
spec of the table below.
Reference ItemSpec.
S-REG_AVE_VAL_B_AREA*
difference
6. Read S-REG_TCD3_SATURATION via ECS.
7. Restore original value. SREG_NR = 2 (Mid).
8. Send ECS command ADJUST_LEVEL_SETTING_CLR.
±2
SREG_TARGET_Y_V160160160
SREG_TCD3_CONT_PAL_V128128128
SREG_TCD3_SAT_PAL_V128128128
SREG_TCD3_HUE_PAL_V128128128
3-2-5.
Y signal calibration1 adjustment for
PAL video.
1. Input PAL colour bar 75%Y, 75%C via AV1 input.
㧠㧡㧢㧣
2. Send ECS_ADJUST_TCD3_CONT_V command.
3. Read the value of S-REG:APL_LUMA via ECS. Confirming that
the value is within spec of the table below.
3-2-7.
Set up of Y signal adjustment for
video.
1. Send ECS_ADJUST_LEVEL_SETTING_INIT command.
2. Set SREG_NR = 1 (Low), HREG_P4_CVD2_85[2:0] = 0 and
SREG_ADJ_COLOR_PAL = 2.
3. Set the following registration items.
Screen Size32"40"46"
SREG_TARGET_Y_V160160160
SREG_TCD3_CONT_SCM_V128128128
SREG_TCD3_SAT_SCM_V128128128
SREG_TCD3_HUE_SCM_V128128128
3-2-8.
Y signal calibration1 adjustment for
SECAM video.
1. Input SECAM colour bar 75%Y, 75%C via AV1 input.
AD-Adjust Video Spec.Spec.
Reference register name
SREG_TARGET_Y_V±2
S-REG_APL_LUMA
4. Read the value of S-REG:TCDS_contrast via ECS.
3-2-6.
C signal calibration1 adjustment for
PAL video.
1. Input PAL colour bar 75%Y, 75%C via AV1 input.
2. Send ECS_ADJUST_TCD3_HUE_V command.
3. Read S-REG_AVE_VAL_B_AREA0 via ECS
(READ_AREA = 0).
㧠㧡㧢㧣
2. Send ECS_ADJUST_TCD3_CONT_V command.
3. Read the value of S-REG:APL_LUMA via ECS. Confirming that
the value is within spec of the table below.
AD-Adjust Video Spec.Spec.
Reference register name
SREG_TARGET_Y_V±2
S-REG_APL_LUMA
4. Read the value of S-REG:TCDS_contrast via ECS.
- 18 -
㧜
㧞㧟㧠㧡㧢㧣
3-2-9. C signal calibration1 adjustment for
SECAM video.
1. Input SECAM colour bar 75%Y, 75%C via AV1 input.
2. Send ECS_ADJUST_TCD3_HUE_V command.
3. Read S-REG_AVE_VAL_B_AREA0 via ECS
(READ_AREA = 0).
4. Read S-REG_AVE_VAL_B_AREA6 via ECS
(READ_AREA = 6).
5. Confirm that 8 bits of MSB of item number 3) and 4) are within
spec of the table below.
Reference ItemSpec.
S-REG_AVE_VAL_B_AREA*
difference
6. Read S-REG_TCD3_SATURATION via ECS.
7. Restore original value. SREG_NR = 2 (Mid).
8. Send ECS command ADJUST_LEVEL_SETTING_CLR.
±2
WAX3
RM-ED009
·[Case A] if y => 0.298, check that the brightness is equal to or
greater than Spec A.
Set and save WB register A as follows :-
WB_GAM_G01 = 124
WB_GAM_G02 = 120
WB_GAM_G03 = 116
WB_GAM_G04 = 118
WB_GAM_G05 = 112
WB_GAM_G06 = 109
WB_GAM_G07 = 108
·[Case B] if 0.293 =< Y < 0.298, check that the brightness is
equal to or greater than Spec B.
Set and save WB register B as follows :-
WB_GAM_G01 = 126
WB_GAM_G02 = 124
WB_GAM_G03 = 122
WB_GAM_G04 = 123
WB_GAM_G05 = 120
WB_GAM_G06 = 119
WB_GAM_G07 = 118
·[Case C] if y < 0.293, check that the brightness is equal to or
greater than Spec C.
Set and save WB register C as follows :-
3-3. Gamma Adjustment
The following adjustments are done via ECS.
Note: Before Gamma adjustment can begin the set needs 20
minutes aging with an ambient temperature between 22 to
28 degrees centigrade.
3-3-1. Preparation before Gamma Adjustment
1. Set SREG_BL_MANU = 1.
2. Set SREG_MUTE_DISPLAY = 0.
3. Set SREG_BL_GAIN = 255.
4. Send ECS command OSD_OFF.
5. Send ECS command CSC_BYPASS_INIT_SET.
6. Wait for successful retrieval.
7. Set SREG_BRIGHT = 100(max).
8. Set SREG_ECO_MODE = 0(Standard).
9. Set SREG_TEST_G_LEVEL = 255.
10. Set SREG_GAMMA_EN = 0(OFF).
11. Measure ‘maximum brightness’ and ‘panel peak white color’ and
record x, y and Y data.
12. Confirm this data with the following table.
Spec ASpec BSpec C
440cd/m^2425cd/m^2410cd/m^2
32"
40"440cd/m^2425cd/m^2410cd/m^2
440cd/m^2425cd/m^2410cd/m^2
46"
WB_GAM_G01 = 128
WB_GAM_G02 = 128
WB_GAM_G03 = 128
WB_GAM_G04 = 128
WB_GAM_G05 = 128
WB_GAM_G06 = 128
WB_GAM_G07 = 128
·If the brightness is lower than the spec consider the panel as no
good.
3-3-2. Set up mode for Gamma Adjustment
1. Set SREG_BRIGHT = 50.
2. Set SREG_GAMMA_EN = 1 (On).
3. Set SREG_COL_MTRX_IDX_OFF = 4.
4. Set SREG_COL_MTRX_IDX_L = 4.
5. Set SREG_COL_MTRX_IDX_M = 4.
6. Set SREG_COL_MTRX_IDX_H = 4.
7. Set SREG_G_GAM_IDX_OFST = 15.
3-3-3. Set up Trident Internal SG and Brightness
measurement
1. Set up SREG_TEST_G_LEVEL = 204.
2. Measure brightness A.
3. Set up SREG_TEST_G_LEVEL = 102.
4. Measure brightness B.
5. Set up SREG_MEASURE_GAM_01 = (brightness B/brightness
A)*10000.
6. Send Gamma_Tbl_Search_1 command.
7. Set up SREG_TEST_G_LEVEL = 153.
- 19 -
8. Measure brightness C.
9. Set up SREG_MEASURE_GAM_02 = (brightness C/brightness
A)*10000.
10. Send Gamma_Tbl_Search_2 command.
11. Wait for calculation in UCOM.
12. Calculate register SREG_G_GAM_IDX_OFST using the formula
and tables below.
SREG_G_GAM_IDX_OFST = A - C - D
WAX3
RM-ED009
3-4. White Balance Adjustment
The following adjustments are done via ECS.
3-4-1. Set up mode for White Balance Adjustment
1. Set up SREG_COL_MTRX_IDX_OFF = 3.
2. Set up SREG_COL_MTRX_IDX_L = 3.
3. Set up SREG_COL_MTRX_IDX_M = 3.
4. Set up SREG_COL_MTRX_IDX_H = 3.
32"
40"
46"
32"
40"
46"
Offset Value C
temp75_temp-
=<7280
210
temp75_temp-
=<7000
210
temp75_temp-
=<8256
210
Y>=550cd/m^2
210
Y>=535cd/m^2
210
Y>=550cd/m^2
210
7280<temp75_temp=<9250
7000<temp75_temp=<9300
8256<temp75_temp=<9920
Offset Value D
550cd/m^2>Y-
>=530cd/m^2
535cd/m^2>Y-
>=510cd/m^2
550cd/m^2>Y-
>=520cd/m^2
9250<temp75-
_temp
9300<temp75-
_temp
9920<temp75-
_temp
530cd/m^2>Y
510cd/m^2>Y
520cd/m^2>Y
3-4-2. White Balance of Colour Temperature “Cool”
1. Refer to the table below and apply offset.
temp75_tempUV
temp75_temp<9856-0.00150.002
9856<=temp75_temp<10500-0.0010.001
32"
10500<=temp75_temp00
temp75_temp<9250-0.00070.002
9250<=temp75_temp<10240-0.00040.0004
40"
10240<=temp75_temp00
temp75_temp<9665-0.00070.0018
9665<=temp75_temp<10240-0.00020.0007
46"
10240<=temp75_temp00
2. Set up SREG_COLOR_TEMP = 0 (Cool).
3. Set up SREG_TEST_G_LEVEL = 204 (80 IRE).
4. Adjust SREG_WB_GAM_R(B)05 chroma values so that they are
within tolerance in the table below.
13. Set SREG_G_GAM_IDX_OFST.
UVTol er an ce
0.19180.42870.0008->0.0014
32"
0.19160.42900.0008->0.0014
40"
0.19090.42950.0008->0.0014
46"
5. Set up SREG_TEST_G_LEVEL = 128 (50 IRE).
6. Adjust SREG_WB_GAM_R(B)04 chroma values so that they are
within tolerance in the table below.
UVTol er an ce
0.19150.42870.0014->0.00196
32"
0.19210.42950.0014->0.00196
40"
0.19120.42850.0014->0.00196
46"
- 20 -
7. Set up SREG_TEST_G_LEVEL = 76 (30 IRE).
8. Adjust SREG_WB_GAM_R(B)03 chroma values so that they are
within tolerance in the table below.
UVTole ran ce
0.19150.42790.0014->0.00196->0.0028
32"
0.19190.42930.0014->0.00196->0.0028
40"
0.19080.42780.0014->0.00196->0.0028
46"
3-4-3. White Balance of Colour Temperature
“Neutral”
1. Refer to the table below and apply offset.
temp75_tempUV
temp75_temp<9856-0.0020.001
9856<=temp75_temp<10500-0.0010.0005
32"
10500<=temp75_temp00
WAX3
RM-ED009
9. Set up SREG_TEST_G_LEVEL = 51 (20 IRE).
10. Adjust SREG_WB_GAM_R(B)02 chroma values so that they are
within tolerance in the table below.
UVTol er an ce
0.19180.42760.0014->0.00196->0.0028
32"
0.19270.42980.0014->0.00196->0.0028
40"
0.19050.42670.0014->0.00196->0.0028
46"
11. The value of SREG_WB_GAM_R(B)01 is determined by the
following conditions.
a). If WB_GAM_R(B)02 < WB_GAM_R(B)03
·SREG_WB_GAM_R(B)01 = SREG_WB_GAM_R(B)02 +
{WB_GAM_R(B)02 - WB_GAM_R(B)03}
b). If SREG_WB_GAM_R(B)02 >=
SREG_WB_GAM_R(B)03
·SREG_WB_GAM_R(B)01 = SREG_WB_GAM_R(B)02
12. The value of SREG_WB_GAM_R(B)06~07 is determined
by the following conditions.
a). If SREG_WB_GAM_B05 > 154 and SREG_WB_GAM_
R05 > 128
temp75_temp<9250-0.00080.0004
40"
9250<=temp75_temp<10240-0.00050.0001
10240<=temp75_temp00
temp75_temp<9665-0.00080.0011
46"
9665<=temp75_temp<10240-0.00030.0006
10240<=temp75_temp00
2. Set up SREG_COLOR_TEMP = 1 (Neutral).
3. Set up SREG_TEST_G_LEVEL = 204 (80 IRE).
4. Adjust SREG_WB_R(B)05_OFST chroma values so that they
are within tolerance in the table below.
UVTol er an ce
0.19560.44320.0008->0.0014
32"
40"0.19310.44260.0008->0.0014
0.19290.44300.0008->0.0014
46"
5. Set up SREG_TEST_G_LEVEL = 128 (50 IRE).
6. Adjust SREG_WB_GAM_R(B)04_OFST chroma values so that
they are within tolerance in the table below.
UVTol er an ce
·SREG_WB_GAM_R(B)06 = SREG_WB_GAM_R(B)05 -
{SREG_WB_GAM_R(B)05 - SREG_WB_GAM_R(B)04}
/ 2
·SREG_WB_GAM_R(B)07 = 128
b). If SREG_WB_GAM_R05 =< 128
·SREG_WB_GAM_B06 = SREG_WB_GAM_B05- {SREG_
GAM_B05 - WB_GAM_B04} / 2
·SREG_WB_GAM_B07 = 128
·SREG_WB_GAM_R06 = SREG_WB_GAM_R07 =
SREG_WB_GAM_R05
c). If SREG_WB_GAM_B05 =< 154
·SREG_WB_GAM_R(B)06 = SREG_WB_GAM_R(B)07 =
SREG_WB_GAM_R(B)05
13. Send WB_SAVE command.
0.19430.44300.0014->0.00196
32"
0.19330.44320.0014->0.00196
40"
0.19270.44280.0014->0.00196
46"
7. Set up SREG_TEST_G_LEVEL = 76 (30 IRE).
8. Adjust SREG_WB_GAM_R(B)03_OFST chroma values so that
they are within tolerance in the table below.
UVTol er an ce
0.19470.44410.0014->0.00196->0.0028
32"
0.19360.44410.0014->0.00196->0.0028
40"
0.19270.44310.0014->0.00196->0.0028
46"
- 21 -
9. Set up SREG_TEST_G_LEVEL = 51 (20 IRE).
10. Adjust SREG_WB_GAM_R(B)02_OFST chroma values so that
they are within tolerance in the table below.
UVTol er an ce
0.19340.44350.0014->0.00196->0.0028
32"
40"0.19180.44580.0014->0.00196->0.0028
0.19190.44130.0014->0.00196->0.0028
46"
WAX3
RM-ED009
4. Adjust SREG_WB_R(B)05_OFST chroma values so that they
are within tolerance in the table below.
UVToleran ce
0.19730.45100.0008->0.0014
32"
40"0.19520.45090.0008->0.0014
0.19540.45140.0008->0.0014
46"
11. Set the value of SREG_WB_GAM_R(B)01_OFST as follows
·SREG_WB_R(B)01_OFST = SREG_WB_R(B)_02_OFST
+ {SREG_WB_R(B)02_OFST-SREG_WB_R(B)03_OFST}
12. Set the value of SREG_WB_R06~07_OFST as follows
·SREG_WB_R(B)07_OFST = SREG_WB_R(B)05_OFST +
{SREG_WB_R(B)05_OFST - SREG_WB_R(B)04_OFST}
·SREG_WB_R(B)06_OFST = SREG_WB_R(B)05_OFST +
{SREG_WB_R(B)05_OFST - SREG_WB_R(B)04_OFST}/2
13. Send COLOR_SAVE command.
3-4-4. White Balance of Colour Temperature
“Warm 1”
1. Refer to the table below and apply offset.
temp75_tempUV
temp75_temp<9856-0.0020.0005
9856<=temp75_temp<10500-0.00120.0005
32"
10500<=temp75_temp00
5. Set up SREG_TEST_G_LEVEL = 128 (50 IRE).
6. Adjust SREG_WB_GAM_R(B)04_OFST chroma values so that
they are within tolerance in the table below.
UVTole ran ce
0.19720.45030.0014->0.00196
32"
40"
46"
0.19610.45220.0014->0.00196
0.19570.45060.0014->0.00196
7. Set up SREG_TEST_G_LEVEL = 76 (30 IRE).
8. Adjust SREG_WB_GAM_R(B)03_OFST chroma values so that
they are within tolerance in the table below.
UVToleran ce
0.19650.45220.0014->0.00196->0.0028
32"
40"0.19690.45270.0014->0.00196->0.0028
0.19560.45090.0014->0.00196->0.0028
46"
9. Set up SREG_TEST_G_LEVEL = 51 (20 IRE).
10. Adjust SREG_WB_GAM_R(B)02_OFST chroma values so that
they are within tolerance in the table below.
temp75_temp<9250-0.00110
40"
9250<=temp75_temp<10240-0.00060
10240<=temp75_temp00
temp75_temp<9665-0.0010.0008
46"
9665<=temp75_temp<10240-0.00030.0004
10240<=temp75_temp00
2. Set up SREG_COLOR_TEMP = 2 (Warm 1).
3. Set up SREG_TEST_G_LEVEL = 204 (80 IRE).
UVTole ran ce
0.19480.45270.0014->0.00196->0.0028
32"
0.19700.45280.0014->0.00196->0.0028
40"
0.19440.44890.0014->0.00196->0.0028
46"
11. Set the value of SREG_WB_GAM_R(B)01_OFST as follows
·SREG_WB_R(B)01_OFST = SREG_WB_R(B)_02_OFST
+ {SREG_WB_R(B)02_OFST-SREG_WB_R(B)03_OFST}
12. Set the value of SREG_WB_R06~07_OFST as follows
·SREG_WB_R(B)07_OFST = SREG_WB_R(B)05_OFST +
{SREG_WB_R(B)05_OFST - SREG_WB_R(B)04_OFST}
·SREG_WB_R(B)06_OFST = SREG_WB_R(B)05_OFST +
{SREG_WB_R(B)05_OFST - SREG_WB_R(B)04_OFST} / 2
13. Send COLOR_SAVE command.
- 22 -
3-4-5. White Balance of Colour Temperature
“Warm 2”
1. Refer to the table below and apply offset.
temp75_tempUV
temp75_temp<9856-0.00250
9856<=temp75_temp<10500-0.00150
32"
10500<=temp75_temp00
WAX3
RM-ED009
9. Set up SREG_TEST_G_LEVEL = 51 (20 IRE).
10. Adjust SREG_WB_GAM_R(B)02_OFST chroma values so that
they are within tolerance in the table below.
UVToleran ce
0.20120.47220.0014->0.00196->0.0028
32"
40"0.20560.46500.0014->0.00196->0.0028
0.20290.46280.0014->0.00196->0.0028
46"
temp75_temp<9250-0.0017-0.0005
40"
9250<=temp75_temp<10240-0.0009-0.0002
10240<=temp75_temp00
temp75_temp<9665-0.00150.0003
46"
9665<=temp75_temp<10240-0.00040.0003
10240<=temp75_temp00
2. Set up SREG_COLOR_TEMP = 3 (Warm 2).
3. Set up SREG_TEST_G_LEVEL = 204 (80 IRE).
4. Adjust SREG_WB_R(B)05_OFST chroma values so that they
are within tolerance in the table below.
UVTol er an ce
0.20320.46670.0008->0.0014
32"
0.20550.46330.0008->0.0014
40"
0.20340.46330.0008->0.0014
46"
5. Set up SREG_TEST_G_LEVEL = 128 (50 IRE).
6. Adjust SREG_WB_GAM_R(B)04_OFST chroma values so that
they are within tolerance in the table below.
UVTol er an ce
0.20330.46740.0014->0.00196
32"
11. Set the value of SREG_WB_GAM_R(B)01_OFST as follows
·SREG_WB_R(B)01_OFST = SREG_WB_R(B)_02_OFST
+ {SREG_WB_R(B)02_OFST-SREG_WB_R(B)03_OFST}
12. Set the value of SREG_WB_R06~07_OFST as follows
·SREG_WB_R(B)07_OFST = SREG_WB_R(B)05_OFST +
{SREG_WB_R(B)05_OFST - SREG_WB_R(B)04_OFST}
·SREG_WB_R(B)06_OFST = SREG_WB_R(B)05_OFST +
{SREG_WB_R(B)05_OFST - SREG_WB_R(B)04_OFST} / 2
13. Send COLOR_SAVE command.
3-5. Panel Replacement
When replacing the panel please reset the gamma and white balance
before performing W/B (See page 20, 3-4) for new panel.
3-6. Board Replacement
When replacing the ‘BE1’ board please readjust the AD (See page 17,
3-2) and readjust the W/B (See page 20, 3-4).
Note :
In the event of a ‘BE1’ board being re-used in service, please
ensure that the Serial number is cleared in the NVM.
0.20600.46610.0014->0.00196
40"
0.20490.46510.0014->0.00196
46"
7. Set up SREG_TEST_G_LEVEL = 76 (30 IRE).
8. Adjust SREG_WB_GAM_R(B)03_OFST chroma values so that
they are within tolerance in the table below.
UVTol er an ce
0.20270.46810.0014->0.00196->0.0028
32"
0.20670.46470.0014->0.00196->0.0028
40"
0.20300.46360.0014->0.00196->0.0028
46"
- 23 -
3-7. TT Modes
Digital BER Display
81
TS CI Path Through
84
Disable software Download
91
TS CI Path Through With ReadSolomon Off
92
LNA Setting On/Off (Toggle)
93
4-1. BLOCK DIAGRAMS (1)
WAX3
RM-ED009
WAX3D
AEP 32
(14P)
1-910-BJ-G1-INV
1-910-LUG-LUG
1P
1-910-BJ-G1
CN6201
(13P)
CN6202
(12P)
CN101
(3P)
Panel T-CON
LVDS 51P
LVDS 51P
BH
LVDS 40P
(6P)
CN8101
(12P)
CN4001
(5P)
CN4003
H1
(3P)
CN4002
(6P)
Conf-Trial
FAN
1-910-BH-FAN
INV
G1H
ޓޓޓޓޓ
1-910-BJ-H1H3H4
(20P)
CN3008
CN3003
chipdebuger
CN3004
ECS
CN3009
forHOTEL
CN2000
SP(4P)
1-910-BJ-SP
BE1
CN4500
LVDS 40P
HDMI(21P)
CN5504
1-910-BJ-U2
CN1400
(㧞㧜P)
CN201
(㧞㧜P)
(21P)
CN251
U2
CN401
(3P)
H4
CN301
(9P)
ޓޓH3
- 24 -
4-1. BLOCK DIAGRAMS (2)
WAX3D
CN101
(3P)
WAX3
RM-ED009
H1
AEP 40
1-910-Z-G2
CN6700
(2P)
(2P)
(5P)
D1_40”HFR
CN6600
CN6501
(2P)
(2P)
CN6701
(7P)
CN6502
(2P)
(8P)
CN6705
(13P)
CN6704
ޓPanel T-CON
LVDS 51P
CN4001
LVDS 51P
BH
LVDS 40P
CN4003
(12P)
(5P)
CN4002
(6P)
Conf-Trial
1-910-BJ-G3(11Pin)
1-910-Z-D1(7Pin)
Invertor
1-910-G2-D1(3Pin)
1-910-G3-D1(8Pin)
G㧟
1-910-BJ-G3
(11P)
CN6203
ޓ(8P)
CN6204
(12P)
CN6202
1-910-BJ-H1H3H4
(20P)
CN3008
CN3003
chipdebuger
CN3004
ECS
CN3009
forHOTEL
CN2000
SP(4P)
1-910-BJ-SP
BE1
CN4500
LVDS 40P
CN5504
HDMI
(21P)
1-910-BJ-U2
CN1400
(㧞㧜P)
CN201
(㧞㧜P)
CN251
(21P)
U2
CN401
(3P)
H4
CN301
(9P)
ޓޓޓH3
- 25 -
4-1. BLOCK DIAGRAMS (3)
㧰㧞
WAX3D
AEP 46
1-910-Z-D1
CN101
(3P)
H1
ޓPanel T-CON
LVDS 51P
1-910-D1-D2
CN6950
(13P)
WAX3
RM-ED009
CN6951
(2P)
CN6900
(2P)
1-910-Z-D2
(2P)
(5P)
1-910-Z-D1(7Pin)
1-910-G3-D1(3Pin)
1-910-LUG-FASTEN
1P
Invertor
CN6700
(2P)
CN6701
(7P)
㧰㧝
CN6600
(2P)
CN6501
(2P)
1-910-G3-D1(8Pin)
CN6502
(2P)
G3
1-910-BJ-G3(11Pin)
(8P)
CN6705
(13P)
CN6704
(11P)
CN6203
(8P)
CN6204
(12P)
CN6202
LVDS 51P
BH
LVDS 40P
CN4002
(6P)
(12P)
CN4001
(5P)
CN4003
1-910-BJ-H1H3H4
(20P)
CN3008
CN3003
chipdebuger
CN3004
ECS
CN3009
forHOTEL
1-910-BJ-G3(12Pin)
BE1
CN4500
LVDS 40p
CN5504
HDMI
(21Pin)
1-910-G3-D2
1-910-BJ-U2
CN1400
(㧞㧜P)
CN201
(㧞㧜P)
(21P)
CN251
(2P)
Invertor
CN401
(3P)
H4
CN301
(9P)
H3
CN2000
SP(4P)
1-910-BJ-SP
- 26 -
U2
Conf-Trial
4-2. CIRCUIT BOARD LOCATION
5-2. CIRCUIT BOARD LOCATION
WAX3
RM-ED009
Reference Information
H1
D2 (KDL-46D30XX)
C
BH
D1 (KDL-40/46D30XX)
C
BE1
N
VM
CVM Board
H
G1H (KDL-32D30XX)
G3 (KDL-40/46D30XX)
D1
4-3. SCHEMATIC DIAGRAMS AND
5-3. SCHEMATIC DIAGRAMS AND
PRINTED WIRING BOARDS
PRINTED WIRING BOARDS
Note :
• All capacitors are in µF unless otherwise noted.
• pF : µµF 50WV or less are not indicated except for
electrolytic types.
• Indication of resistance, which does not have one for
rating electrical power, is as follows.
Pitch : 5mm
Electrical power rating : 1/4W
• Chip resistors are 1/10W
• All resistors are in ohms.
k = 1000 ohms, M = 1000,000 ohms
•: nonflammable resistor.
•: fusible resistor.
•: internal component.
•: panel designation or adjustment for repair.
• All variable and adjustable resistors have
characteristic curve B, unless otherwise noted.
• All voltages are in Volts.
• Readings are taken with a 10Mohm digital mutimeter.
• Readings are taken with a color bar input signal.
• Voltage variations may be noted due to normal production
tolerences.
•: B + bus.
A
H4
A Board
S1 Board
U2
D2
A
H3
D
J
A1
A2
RESISTORRN
RC
FPRD
FUSE
RS
RB
RW
COILLF-8L
CAPACITOR TA
PS
PP
PT
MPS
MPP
ALB
ALT
ALR
Note :
The components identified by shading
and marked are critical for safety.
Replace only with the part numbers
specified in the parts list.
Note :
Les composants identifiés par une trame et
par une marque sont d'une importance
critique pour la sécurité. Ne les remplacer
que par des pièces de numéro spécifié.
specified.
Note :
The components identified by mark
confidential information.
Strictly follow the instructions whenever the
components are repaired and/or replaced.
: METAL FILM
: SOLID
: NON FLAMMABLE CARBON
: NON FLAMMABLE FUSIBLE
: NON FLAMMABLE METAL OXIDE
: NON FLAMMABLE CEMENT
: NON FLAMMABLE WIREWOUND
: ADJUSTMENT RESISTOR
: MICRO INDUCTOR
: TANTALUM
: STYROL
: POLYPROPYLENE
: MYLAR
: METALIZED POLYESTER
: METALIZED POLYPROPYLENE
: BIPOLAR
: HIGH TEMPERATURE
: HIGH RIPPLE
contain
•: B - bus.
•: RF signal path.
•: earth - ground.
•: earth - chassis.
Note: Schematic diagrams are for reference only. Please refer to the electrical parts list for
the correct value and part number of components.
- 27 -
ABCDEF GHJIKLMN
N
_
O
P
Q
1
BE1.WAX3
10
11
12
2
VD1201
GND
BE1
1A/14
GND
3
4
21P
J1200
1
2
3
4
5
6
7
5
Scart1
REF.1200~1299
6
SCART 21PinAssign
Pin
8
9
10
11
12
13
14
15
16
17
18
19
20
21
GND
No.: Function
----------------------- 1 : Audio OUT R
7
2 : Audio IN R
3 : Audio OUT L
4 : Audio GND
5 : Video GND(BLUE)
6 : Audio IN L
PDZ5.6B-115
7 : Video IN BLUE
8
8 : MODE
9 : Video GND(GREEN)
10 : AVLINK
11 : Video IN GREEN
12 : N.C.
13 : Video GND(RED)
9
14 : GND(FB)
15 : Video IN RED
16 : FB
17 : Video GND(OUT VIDEO)
18 : Video GND(IN VIDEO)
19 : Video OUT CV
20 : Video IN CV
21 : GND