Sony E01X23A41, ICX423AL User Manual

ICX423AL

Diagonal 11mm (Type 2/3) CCD Image Sensor for CCIR B/W Video Cameras

Description

The ICX423AL is an interline CCD solid-state image
sensor suitable for CCIR B/W video cameras with a
diagonal 11mm (Type 2/3) system. Compared with the
current product ICX083AL, basic characteristics such
as sensitivity and smear are improved drastically and
high saturation characteristics are realized.

This chip features a field period readout system and
an electronic shutter with variable charge-storage
time. This chip is compatible with the pins of the
ICX083AL and has the same drive conditions.

Features

• High sensitivity (+3.0dB compared with the ICX083AL)

• Low smear (–10.0dB compared with the ICX083AL)

• High saturation signal (+2.0dB compared with the ICX083AL)

• High resolution and Low dark current

• Excellent antiblooming characteristics

• Continuous variable-speed shutter

Device Structure

• Interline CCD image sensor

• Optical size: Diagonal 11mm (Type 2/3)

• Number of effective pixels: 752 (H) × 582 (V) approx. 440K pixels

• Total number of pixels: 795 (H) × 596 (V) approx. 470K pixels

• Chip size: 10.25mm (H) × 8.5mm (V)

• Unit cell size: 11.6µm (H) × 11.2µm (V)

• Optical black: Horizontal (H) direction: Front 3 pixels, rear 40 pixels

Vertical (V) direction: Front 12 pixels, rear 2 pixels

• Number of dummy bits: Horizontal 22

Vertical 1 (even fields only)

• Substrate material: Silicon

20 pin DIP (Ceramic)

V

3

Pin 11

Optical black position

H

(T op View)

Pin 1

40

2

12

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E01X23A41

ICX423AL

USE RESTRICTION NOTICE (December 1, 2003 ver.)

This USE RESTRICTION NOTICE ("Notice") is for customers who are considering or currently using the CCD
products ("Products") set forth in this specifications book. Sony Corporation ("Sony") may, at any time, modify
this Notice which will be available to you in the latest specifications book for the Products. You should abide by
the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the
Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor. You
should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice
when you consider using the Products.

Use Restrictions

• The Products are intended for incorporation into such general electronic equipment as office products,

communication products, measurement products, and home electronics products in accordance with the

terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time.

• You should not use the Products for critical applications which may pose a life- or injury- threatening risk or

are highly likely to cause significant property damage in the event of failure of the Products. You should

consult your Sony sales representative beforehand when you consider using the Products for such critical

applications. In addition, you should not use the Products in weapon or military equipment.

• Sony disclaims and does not assume any liability and damages arising out of misuse, improper use,

modification, use of the Products for the above-mentioned critical applications, weapon and military

equipment, or any deviation from the requirements set forth in this specifications book.

Design for Safety

• Sony is making continuous efforts to further improve the quality and reliability of the Products; however,

failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to

ensure the safe design of your products such as component redundancy, anti-conflagration features, and

features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social

damage as a result of such failure.

Export Control

• If the Products are controlled items under the export control laws or regulations of various countries, approval

may be required for the export of the Products under the said laws or regulations. You should be responsible

for compliance with the said laws or regulations.

No License Implied

• The technical information shown in this specifications book is for your reference purposes only. The

availability of this specifications book shall not be construed as giving any indication that Sony and its

licensors will license any intellectual property rights in such information by any implication or otherwise. Sony

will not assume responsibility for any problems in connection with your use of such information or for any

infringement of third-party r ights due to the same. It is therefore your sole legal and financial responsibility to

resolve any such problems and infringement.

Governing Law

• This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to

principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this

Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first

instance.

Other Applicable Terms and Conditions

• The terms and conditions in the Sony additional specifications, which will be made available to you when you

order the Products, shall also be applicable to your use of the Products as well as to this specifications book.

You should review those terms and conditions when you consider purchasing and/or using the Products.

– 2 –

Block Diagram and Pin Configuration

(Top view)

V

L

7

GND

9

DD

V

10

V

OUT

11

V

GG

V

SS

GND

12
13
14

Output Unit

15 16 17 18 19 20

RG Hφ

RD Hφ

V

L

Vertical Register

Horizontal Register

1

2

HIS

Note)

ICX423AL

Vφ

4

1

Vφ

3

2

3

Vφ

2

4

SUB

GND

5

Vφ

1

6

Note) : Photo sensor

Pin Description

Pin No. Symbol Description

1
2
3
4
5
6
7
8
9

10

Vφ4
Vφ3
Vφ2
SUB
GND
Vφ1
VL
NC
GND
VDD

Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Substrate (overflow drain)
GND
Vertical register transfer clock
Protective transistor bias

GND
Output amplifier drain power

Description

Pin No. Symbol

11
12
13
14
15
16
17
18
19
20

VOUT
VGG
VSS
GND
RD
RG
VL
Hφ1
Hφ2
HIS

Signal output
Output amplifier gate bias
Output amplifier source
GND
Reset drain
Reset gate clock
Protective transistor bias
Horizontal register transfer clock
Horizontal register transfer clock
Horizontal register input source bias

– 3 –

Absolute Maximum Ratings

ICX423AL

Item

Substrate voltage SUB – GND

Supply voltage

HIS, VDD, RD, VOUT, VSS – GND
HIS, VDD, RD, VOUT, VSS – SUB

Vertical clock input
voltage

Vertical clock input pins – GND

Vertical clock input pins – SUB
Voltage difference between vertical clock input pins
Voltage difference between horizontal clock input pins
Hφ1, Hφ2 – Vφ4
Hφ1, Hφ2, RG, VGG – GND
Hφ1, Hφ2, RG, VGG – SUB
VL – SUB
Vφ1, Vφ3, HIS, VDD, RD, VOUT – VL
RG – VL
Vφ2, Vφ4, VGG, VSS, Hφ1, Hφ2 – VL
Storage temperature
Operating temperature

Ratings
–0.3 to +55
–0.3 to +20
–55 to +10
–15 to +20

to +10
to +15
to +17
–17 to +17
–10 to +15

–55 to +10
–65 to +0.3
–0.3 to +30
–0.3 to +24
–0.3 to +20

–30 to +80

–10 to +60

Unit Remarks

V
V
V
V
V

1

V

∗

V
V
V
V
V
V
V

V
°C
°C

1

∗

27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.

Bias Conditions

Item
Output amplifier drain voltage
Reset drain voltage
Output amplifier gate voltage
Output amplifier source
Substrate voltage adjustment range
Substrate voltage adjustment precision
Reset gate clock voltage adjustment range
Reset gate clock voltage adjustment precision
Protective transistor bias
Horizontal register input source bias

Symbol

VDD
VRD
VGG
VSS
VSUB
∆VSUB
VRGL
∆VRGL
VL
VHIS

Min.

14.7

14.7

3.8

15.0

15.0

4.2

15.3

15.3

4.6

Ground with 750Ω resistor

9

–3

0

–3

–11

14.7

–10.5

15.0

19
+3

3.0
+3

–10

15.3

Unit

V
V
V

V

%

V

%

V
V

RemarksTyp. Max.

VRD = VDD

±5%

2

∗

2

∗

3

∗

VHIS = VDD

– 4 –

DC Characteristics

ICX423AL

Item
Output amplifier drain current
Input current
Input current

2

∗

Indications of substrate voltage (VSUB) and reset gate clock voltage (VRGL) setting value

Symbol6Min. Unit RemarksTyp. Max.

IDD
IIN1
IIN2

1

10

mA

µA
µA

4

∗

5

∗

The setting value of the substrate voltage and reset gate clock voltage are indicated on the back of the
image sensor by a special code. Adjust the substrate voltage (VSUB) and reset gate clock voltage (VRGL) to
the indicated voltage. The adjustment precision is ±3%.

VSUB code — one character indication
VRGL code — one character indication ↑↑

VRGL code VSUB code

"Code" and optimal setting correspond to each other as follows.

VRGL code
Optimal setting1020.531.041.552.062.573.0

VSUB code
Optimal settingD9.0

E

9.5f10.0G10.5h11.0J11.5K12.0L12.5m13.0N13.5P14.0Q14.5R15.0S15.5T16.0U16.5V17.0W17.5X18.0Y18.5Z19.0

<Example> "5K" → VRGL = 2.0V

VSUB = 12.0V

3

∗

This must no exceed the VVL voltage of the vertical clock waveform.

4

∗

1) Current to each pin when 20V is applied to VDD, RD, VOUT, V SS, HIS and SUB pins, while pins that are
not tested are grounded.

2) Current to each pin when 20V is applied sequentially to Vφ1, Vφ2, Vφ3 and Vφ4 pins, while pins that are
not tested are grounded. However, 20V is applied to SUB pin.

3) Current to each pin when 15V is applied sequentially to Hφ1, Hφ2, RG and VGG pins, while pins that are
not tested are grounded. However, 15V is applied to SUB pin.

4) Current to VL pin when 30V is applied to Vφ1, Vφ3, HIS, VDD, RD and VOUT pins or when, 24V is applied
to RG pin or when, 20V is applied to Vφ2, Vφ4, VGG, VSS, Hφ1 and Hφ2 pins, while VL pin is grounded.
However, GND and SUB pins are left open.

5

∗

Current to SUB pin when 55V is applied to SUB pin, while pins that are not tested are grounded.

– 5 –

Clock V oltage Conditions

ICX423AL

Item

Readout clock voltage

Vertical transfer clock
voltage

Horizontal transfer
clock voltage

Reset gata clock
voltage

Symbol

VVT
VVH1, VVH2,

VVH3, VVH4
VVL1, VVL2,

VVL3, VVL4
VφV
| VVH1 – VVH2 |
VVH3 – VVH
VVH4 – VVH
VVHH
VVHL
VVLH
VVLL
VφH
VHL
VφRG
VRGL

Min.

14.5
–0.6

8.9

–0.5
–0.5

6.0

–3.5

6.0
0

Typ.

15.0

–9.6

Max. Unit

15.5

V

0

V

V
V

0.2

0.8

1.0

0.8

0.8

8.0

–3.0

13.0

3.0

V

0

V

0

V
V
V
V
V
V
V
V
V

Waveform

diagram

1
2

2
2

2
2
2
2
2
2
2
3
3
3
3

Remarks

VVH = (VVH1 + VVH2)/2

VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)

High-level coupling
High-level coupling
Low-level coupling
Low-level coupling

1

∗

Substrate clock voltage

1

∗

The reset gate clock voltage need not be adjusted when the reset gate clock is driven when the

VφSUB

27.0

32.0

V

4

specifications are as given below. In this case, the reset gate clock voltage setting indicated on the back of
the image sensor has not significance.

V
V

Waveform

diagram

3
3

Remarks

Item

Reset gate clock
voltage

VRGL
VφRG

Symbol

Min.

–0.2

8.5

Typ.

0

9.0

Max. Unit

0.2

9.5

– 6 –

Clock Equivalent Circuit Constant

ICX423AL

Item Min.

Capacitance between vertical transfer
clock and GND

Capacitance between vertical transfer
clocks

Capacitance between horizontal
transfer clock and GND

Capacitance between horizontal
transfer clocks

Capacitance between reset gate clock
and GND

Capacitance between substrate clock
and GND

Vertical transfer clock series resistor
Vertical transfer clock ground resistor
Horizontal transfer clock series resistor

Symbol
CφV1, CφV3
CφV2, CφV4
CφV12, CφV34
CφV23, CφV41
CφV13
CφV24

CφH1, CφH2

CφHH

CφRG

CφSUB
R1, R2, R3, R4

RGND
RφH

Typ.
2700
2700
2600

950

1000

500

47

58

7

800

22

3

10

Max.

Unit Remarks

pF
pF
pF
pF
pF
pF

pF

pF

pF

pF

Ω
Ω
Ω

Vφ

Vφ

Cφ

Cφ

4

1

R

V24

R

1

V41

4

Cφ

Cφ

Vφ

2

Cφ

V12

V1

V4

R

Cφ

GND

V34

Cφ

Cφ

V2

V3

Cφ

Cφ

R

R

V23

V13

2

3

Vφ

Rφ

H

Hφ

1

Cφ

H1

3

Cφ

HH

Cφ

Rφ

H

Hφ

2

H2

Horizontal transfer clock equivalent circuitVertical transfer clock equivalent circuit

– 7 –

Drive Clock Waveform Conditions

(1) Readout clock waveform

100%

90%

V

VT

10%

0%

tr tf

twh

(2) Vertical transfer clock waveform

Vφ1 Vφ3

ICX423AL

φM

φM

2

0V

VVH1

VVL

Vφ2 Vφ4

VVHL

VVH2

VVHH

VVHH

VVLL

VVL1

VVHH

VVH

VVHL

VVLH

VVHH

VVHL

VVL3

VVH

VVHL

VVHL

VVHH

VVH

VVH3

VVHL

VVL

VVHL

VVHH

VVH4

VVHH

VVH

VVLH

VVLL

VVHH

VVHL

VVLL

VVL

VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)

VVL2

VVLH

– 8 –

VVL4

VVLH

VVLL

VVL

(3) Horizontal transfer clock waveform · Reset gate clock waveform

tr twh tf

90%

Vφ

H

, Vφ

RG

10%

VHL, V

RGL

(4) Substrate clock waveform

100%

90%

ICX423AL

twl

10%

SUB

V

Clock Switching Characteristics

Item

Symbol

Min.

Readout clock
Vertical transfer

clock

VT
Vφ1, Vφ2
Vφ3, Vφ4

2.3

Hφ
Horizontal
transfer clock

Hφ1

Hφ2
Reset gate

clock
Substrate clock

φRG

φSUB

11

1.5

φM

0%

twh

VφSUB

tr tftwh

twl tr tf

φM

2

Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.

2.5

62.6

1.3
20

5.38

13

1.8

0.74

62.1
20

5.38
51

0.5

0.1

0.1
15

0.01

0.01

2.0

19

0.5

0.5

0.1

0.1
15

0.01

0.01

2.0

19

0.5

Unit

µs

During readout

µs

During imaging

µs
ns

During imaging

During

µs

parallel-serial

µs

conversion

ns

When draining

µs

charge

Remarks

– 9 –

ICX423AL

Image Sensor Characteristics (Ta = 25°C)

Item
Sensitivity
Saturation signal
Smear
Video signal shading
Dark signal
Dark signal shading
Flicker
Lag

Symbol
S
Vsat
Sm
SH
Vdt
∆Vdt
F
Lag

Min.

700

1000

Typ.

1000

–130

Max.

–120

25

2
1
5

0.5

Unit

Measurement method
mV
mV

dB

%
mV
mV

%

%

Remarks
1
2

Ta = 60°C
3
4
5
6

Ta = 60°C

Ta = 60°C
7
8

Image Sensor Characteristics Measurement Method

Measurement conditions

1) In the following measurements, the substrate voltage and the reset gate clock voltage are set to the values
indicated on the device, and the device drive conditions are at the typical values of the bias and clock
voltage conditions.

2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black (OB) level is used as the reference for the signal output, and the value measured at point [∗A] in the
drive circuit example is used.

Definition of standard imaging conditions

1) Standard imaging condition I:
Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern
for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.00mm) as an IR cut filter
and image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the
standard sensitivity luminous intensity.

2) Standard imaging condition II :
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens with CM500S (t = 1.00mm) as an IR cut filter. The luminous intensity is adjusted
to the value indicated in each testing item by the lens diaphragm.

1. Sensitivity
Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/250s ,
measure the signal output (Vs) at the center of the screen and substitute the value into the following formula.

S = Vs × [mV]

250

50

2. Saturation signal
Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with
average value of signal output, 350mV, measure the minimum value of the signal output.

– 10 –

ICX423AL

3. Smear
Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to
500 times the intensity with average value of the signal output, 350mV. When the readout clock is stopped
and the charge drain is executed by the electronic shutter at the respective H blankings, measure the
maximum value (VSm [mV]) of the signal output and substitute the value into the following formula.

Sm = 20 × log × × × 100 [dB] (1/10V method conversion value)

VSm

350

1

500

1

10

4. Video signal shading
Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so
that the average value of the signal output is 350mV. Then measure the maximum (Vmax [mV]) and
minimum (Vmin [mV]) values of the signal output and substitute the values into the following formula.

SH = (Vmax – Vmin)/350 × 100 [%]

5. Dark signal
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and
the device in the light-obstructed state, using the horizontal idle transfer level as a reference.

6. Dark signal shading
After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark
signal output and substitute the values into the following formula.

∆Vdt = Vdmax – Vdmin [mV]

7. Flicker
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the signal
output is 350mV, and then measure the difference in the signal level between fields (∆Vf [mV]). Then
substitute the value into the following formula.

F = (∆Vf/350) × 100 [%]

8. Lag
Adjust the signal output value generated by strobe light to 350mV. After setting the strobe light so that it
strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following
formula.

Lag = (Vlag/350) × 100 [%]

FLD

V1

Strobe light

timing

Output

Light

Signal output 350mV Vlag (lag)

– 11 –

ICX423AL

10k

0.01

3.3/35V

15k

270k

15

47k

3.3/35V

15

33k

1000P

15k

39k

3.3/

16V

22k

2200P

1M

0.01

3.3/25V

A]

∗

100

[

CCD OUT

3.3k

100k

10/10V

3.3/16V

DD

V

10987654321

NC

V

L

Vφ

1

Vφ

2

Vφ

3

Vφ

4

GND

GND

SUB

1

ICX423AL (BOTTOM VIEW)

2

V

OUT

V

GG

V

SS

GND

RD

RG

V

L

Hφ

Hφ

HIS

11121314151617181920

3.3/

750

16V

100k

39k

3.3/16V

10k

0.1

47k

56k

27k

0.01

22/20V

0.1

12345678910

CXD1268M

20191817161514131211

3.3/25V

91k

33k

1/16V

10

100k

100k

0.1

10

0.1

0.1

74AC04

0.1

Drive Circuit

30V

15V

XSUB

–9V

5V

XV1

XSG1

XV2

XV4

– 12 –

XSG2

XV3

–11V

H2

H1

RG

2.2/16V

6V

ICX423AL

Spectral Sensitivity Characteristics (includes lens characteristics, excludes light source characteristics)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

Relative Response

0.3

0.2

0.1

0

500 600 700 800 900 1000400

Sensor Readout Clock Timing Chart

V1

V2

Odd Field

Even Field

V3

V4

V1

V2

V3

Wave Length [nm]

33.6

1.5

0.2

2.5

2.6 2.5 2.5

V4

Unit: µs

– 13 –

340

335

ICX423AL

6

5

4

3

2

1

25

20

330

325

320

315

310

6

5

4

3

2

1

582

581

246

135

Drive Timing Chart (Vertical Sync)

FLD

VD

BLK

HD

15

10

5
4
3
2
1

625

620

V1

V2

V3

V4

246

581

CCD

135

582

OUT

– 14 –

ICX423AL

20

10

3
2
1
3
2
1

22
20

10

5
3

2
1

Drive Timing Chart (Horizontal Sync)

HD

BLK

H1

H2

40

30

20

10

5
3
1

752
750

745

V1

V2

V3

RG

V4

SUB

– 15 –

ICX423AL

Notes on Handling

1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.

Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.

2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron

with a ground wire and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.

c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering

tool, use a thermal controller of the zero cross On/Off type and connect it to ground.

3) Dust and dirt protection
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and
dirt. Clean glass plates with the following operation as required, and use them.
a) Operate in clean environments (around class 1000 is appropriate).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces.

Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity

ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when

moving to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for

electrostatic protection. Do not reuse the tape.

4) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition
exceeding the normal using condition, consult our company.

5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage
in such conditions.

6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical
shocks.

– 16 –

ICX423AL

6.0
2-

~

R3.0

2-

D

~

0˚ to 9˚

20 pin DIP (800mil)

11

A

27.0 ± 0.3

31.0 ± 0.4

C

20

+ 0.25

– 0

(AT STAND OFF)

20.32

20.2 ± 0.3

5.0

+ 0.15

– 0

B

0.25

×2.5

+ 0.15

– 0

2.00
(Elongated Hole)

10

0.5

26.0 ± 0.25

1

0.35 13.15

is the center of the effective image area.

"
A

"

The straight line “B” which passes through the center of the reference hole and the elongated

The straight line “C” which passes through the center of the reference hole at right angle to vertical

reference line “B” is the reference axis of horizontal direction (H).

The bottom “D” is the height reference.(Two points are specified.)

.

.

3

5. The center of the effective image area specified relative to the reference hole

4

5.5 ± 0.2

is (H, V) = (13.15, 5.0) ± 0.15mm.

1.

3.2 ± 0.3

.

hole is the reference axis of vertical direction (V).

2

1.0

0.46

1.27
M

0.3

2.54

1Pin Index

The angle of rotation relative to the reference line “B” is less than ± 1˚

The height from the bottom “D” to the effective image area is 1.46 ± 0.15mm.

The tilt of the effective image area relative to the bottom “D” is less than 60µm.

GOLD PLATING

.
8

42 ALLOY

The thickness of the cover glass is 0.75mm and the refractive index is 1.5.
.

9

AS-A11(E)

5.90g

.
6

Ceramic

.
7

Package Outline Unit: mm

2-φ2.50

φ2.00

(Reference Hole)

– 17 –

PACKAGE MATERIAL

LEAD TREA TMENT

PACKAGE STRUCTURE

LEAD MATERIAL

PACKAGE MASS

Sony Corporation

DRAWING NUMBER