Sony CXP874P60 Datasheet

CMOS 8-bit Single Chip Microcomputer

Description

The CXP874P60 is a CMOS 8-bit microcomputer
which consists of A/D converter, serial interface
(2ch independently), timer/counter, time base timer,
vector interruption, high precision timing pattern
generation circuit (PPG 2ch independently, RTG 2ch
independently), PWM generator, general purpose
prescaler, PWM for tuner, VCR vertical sync
separation circuit and the measuring circuit which
measure signals of capstan FG and drum FG/PG
and other servo systems, as well as basic
configurations like 8-bit CPU, PROM, RAM and I/O
port. They are integrated into a single chip.

Also CXP874P60 provides power on reset
function, sleep/stop function which enables to lower
power consumption .

CXP874P60 is the PROM-incorporated version of
the CXP87452/87460 with built-in mask ROM. This
provides the additional feature of being able to write
directly into the program. Thus, it is most suitable for
evaluation use during system development and for
small-quantity production.

100 pin QFP (Plastic) 100 pin LQFP (Plastic)

Structure

Silicon gate CMOS IC

CXP874P60

Features

• A wide instruction set (213 instructions) which cover various types of data

— 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation instruction

• Minimum instruction cycle During operation 333ns/12MHz (3.0 to 5.5V)

During operation 250ns/16MHz (4.5 to 5.5V)

• Incorporated PROM capacity 60K bytes

• Incorporated RAM capacity 1568 bytes

• Peripheral functions

— A/D converter 8-bit, 12-channel, successive approximation system

(Conversion time: 20µs/16MHz)

— Serial interface Incorporated buffer RAM (1 to 32 bytes auto transfer) 1-channel

Incorporated 8-bit and 8-stage FIFO

(1 to 8 bytes auto transfer) 1-channel
— Timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer
— High precision timing pattern generator PPG 19 pins 32-stage programmable

PPG 10 pins 21-stage programmable

RTG 5 pins 2-channel
— PWM/DA gate output PWM 12-bit, 2-channel (Repetitive frequency 62.5kHz/16MHz)

DA gate pulse 12-bit, 4-channel
— Servo input control Capstan FG, Drum FG/PG, CTL input
— VSYNC separator
— FRC capture unit Incorporated 26-bit and 8-stage FIFO
— PWM output 14-bit, 1-channel
— General purpose prescaler 10-bit (System clock asynchronous)
— Pulse cycle measurement circuit

• Interruption 18 factors, 14 vectors, multi-interruption possible

• Standby mode SLEEP/STOP

• Package 100-pin plastic QFP/LQFP

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E95112-ST

Vpp

Vss
V

DD

MP
RST

XTAL

EXTAL

PB0 to PB7

PA0 to PA7

8

8

PORT A

CLOCK

GENERATOR/

SYSTEM CONTROL

SPC700

CPU CORE

PORT B

PC0 to PC7
8

PORT C

PE0 to PE1

PD0 to PD7

2

8

PORT D

RAM

1568 BYTES

PROM

60K BYTES

PF0 to PF3

PE2 to PE7

4

6

PORT E

PF4 to PF7

8 PG0 to PG7

4

PORT F

PORT G

PI0

PH0 to PH7

1

8

PORT H

PRESCALER/

PI1 to PI7

PJ0 to PJ7
8

7

PORT I

PORT J

TIME BASE TIMER

2

PK0

1

PORT K

RAM

PATTERN

PROGRAMMABLE

GENERATOR (CH1)

CXP874P60

RTO7
to

CH1

PULSE

REALTIME

2

GENERATOR

CH0

10

RTO3

5

10

PPO113
to
PPO112

PPO107
to
PPO100

REF

DD

AVss

AV

AV

PE1/INT2
PI4/INT1

PE0/INT0

2

RAM

BUFFER

A/D CONVERTER

(CH0)

SERIAL

INTERFACE UNIT

12

INTERRUPT CONTROLLER

2

FIFO

8BIT TIMER 1

(CH1)

SERIAL

8BIT TIMER/COUNTER 0

INTERFACE UNIT

FRC

2

2

CONTROL

SERVO INPUT

V SYNC SEPARATOR

CTL

DRUM

CAPSTAN

FIFO

UNIT

CAPTURE

3

14BIT PWM GENERATOR

PROGRAMMABLE PRESCALER

RAM

19

PATTERN

PROGRAMMABLE

GENERATOR (CH0)

4

2

4

PULSE MEASURE UNIT

12BIT PWM GENERATOR CH1

12BIT PWM GENERATOR CH0

PPO000 to PPO018

19

PF0/AN4

AN0 to AN3

to

Block Diagram

CS0

PF7/AN11

SI0

SO0

SCK0

PI7/SI1

PI6/SO1

PE1/EC

PI5/SCK1

PI3/TO

PG6/EXI0

PG7/EXI1

PG4/SYNC0

PG5/SYNC1

PG0/CFG

– 2 –

PG1/DFG

PG2/DPG

PG3/PBCTL

PI1/PO

PE0/XOUT

PK0/OSCO

PI0/PCK/OSCI

PI2/PWM

PE2/PWM0

PE4/DAA0

PE6/DAB0

PE3/PWM1

PG4/PMI

PE5/DAA1

PE7/DAB1

PG7/PMSK

Pin Configuration 1 (Top View) 100-pin QFP Package

PB6/PPO014

PA0/PPO000/PPO100

PB7/PPO015

PA1/PPO001/PPO101

PA2/PPO002/PPO102

PA5/PPO005/PPO105

PA3/PPO003/PPO103

PA6/PPO006/PPO106

PA4/PPO004/PPO104

PA7/PPO007/PPO107

Vpp

DD

V

SS

V

PK0/OSCO

option

Mask

PI1/PO

PI0/PCK/OSCI

PI2/PWM

PI3/TO

PI5/SCK1

PI4/INT1

CXP874P60

PB5/PPO013/PPO113
PB4/PPO012/PPO112

PB3/PPO011
PB2/PPO010
PB1/PPO009
PB0/PPO008

PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4

PC3/RTO3
PC2/PPO018
PC1/PPO017
PC0/PPO016

PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1

PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0

95

93

94

92

97

96

98

100

99

1

2
3
4
5
6
7
8
9

10

11
12
13

14
15

16
17
18
19

20

21

22
23
24
25
26
27
28

29
30

34

32

31

35

33

38

36

37

90

91

41

40

39

87

86

88

89

44

43

42

45

83

84

85

46

82

81

80
79
78
77
76
75
74
73
72
71

70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54

53
52
51

49

48

47

50

PI6/SO1
PI7/SI1
PE0/INT0/XOUT
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PF2/DPG
PG3/PBCTL
PG4/SYNC0/PMI
PG5/SYNC1
PG6/EXI0
PG7/EXI1/PMSK
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AV

DD

AVREF
AVSS
PF4/AN8

PH7

PH6

PH5

PH4

PH3

PH2

PH1

PH0

MP

RST

V

XTAL

CS0

EXTAL

SI0

SO0

SCK0

PF7/AN11

PF6/AN10

SS

Note) 1. Vpp (Pin 90) is always connected to VDD.

2. Vss (Pins 41 and 88) are both connected to GND.

– 3 –

PF5/AN9

Pin Configuration 2 (Top View) 100-pin LQFP Package

PB4/PPO012/PPO112

PB6/PPO014

PB5/PPO013/PPO113

PA0/PPO000/PPO100

PB7/PPO015

PA1/PPO001/PPO101

PA4/PPO004/PPO104

PA2/PPO002/PPO102

PA3/PPO003/PPO103

PA7/PPO007/PPO107

PA5/PPO005/PPO005

Vpp

PA6/PPO006/PPO106

DD

V

Mask

SS

PK0/OSCO

V

option

PI0/PCL/OSCI

PI1/PO

PI2/PWM

PI3/TO

PI4/INT1

PI6/SO1

PI5/SCK1

PE0/INT0/XOUT

PI7/SI1

CXP874P60

PB3/PPO011
PB2/PPO010
PB1/PPO009

PB0/PPO008

PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3

PC2/PPO018
PC1/PPO017
PC0/PPO016

PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1

PJ0
PD7
PD6
PD5
PD4
PD3

95

93

94

92

97

96

98

100

99

1

2
3
4
5
6
7

8
9

10
11
12
13
14
15
16
17
18
19
20
21
22
23

24

25

90

91

87

86

84

88

89

85

81

83

82

78

76

80

77

79

75
74
73

72
71
70
69

68

67

66
65
64

63

62
61
60
59
58
57
56
55
54
53
52
51

PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PF2/DPG
PG3/PBCTL
PG4/SYNC0/PMI
PG5/SYNC1
PG6/EXI0
PG7/EXI1/PMSK
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AV

DD

AVREF

PH5

34

PH4

35

33

PH2

PH3

32

29

31

30

28

27

26

PD0

PH7

PD2

PD1

PH6

PH1

38

PH0

39

37

MP

RST

41

40

SS

V

XTAL

36

42

CS0

EXTAL

44

43

SI0

Note) 1. Vpp (Pin 88) is always connected to VDD.

2. Vss (Pins 39 and 86) are both connected to GND.

– 4 –

SO0

45

46

SCK0

48

47

PF7/AN11

PF6/AN10

49

50

PF4/AN8

PF5/AN9

SS

AV

Pin Description

Symbol I/O Description

CXP874P60

PA0/PPO000
/PPO100

to
PA7/PPO007
/PPO107

PB0/PPO008

to

PB7/PPO015

PC0/PPO016

to

PC2/PPO018
PC3/RTO3

to

PC7/RTO7

PD0 to PD7

PE0/INT0
/XOUT

Output/
Real time
output

Output/
Real time
output

I/O/
Real time
output

I/O/
Real time
output

I/O

Input/Input/Output

(Port A)
8-bit output port. Data is gated
with PPO0 and PPO1 contents
by OR-gate and they are output.
(8 pins)

(Port B)
8-bit output port. Data is gated
with PPO0 and PPO1 contents
by OR-gate and they are output.
(8 pins)

(Port C)
8-bit I/O port. Enables to
specify I/O by bit unit.
Data is gated with PPO or
RTO contents by OR-gate
and they are output.
(8 pins)

(Port D)
8-bit I/O port. Enable to specify I/O by 4-bit unit.
Enables to drive 12mA sink current. (During 5V±0.5V operation)
(8 pins)

Programmable pattern generator
(PPG0, PPG1) output.
Functions as high precision real time
pulse output port.

PPG0 19 pins

(

PPG1 10 pins

Real time pulse generator (RTG)
output. Functions as high precision real
time pulse output port. (5 pins)

Input pin to request
external interruption.
Active when falling edge.

)

1/2 dividing
clock output of
XTAL or OSCO.

PE1/EC/INT2

PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
AN0 to AN3
PF0/AN4

to
PF3/AN7

PF4/AN8

to
PF7/AN11

SCK0
SO0
SI0

Input/Input/Input

Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
Input

Input/Input

Output/Input

I/O
Ouput
Input

External event

(Port E)
8-bit port. Lower 2 bits are
input port and upper 6 bits
are output port.
(8 pins)

Analog input pins to A/D converter. (12 pins)

(Port F)
Lower 4 bits are input port and upper 4 bits are output port.
Lower 4 bits also serve as standby release input pin.
(8 pins)

Serial clock (CH0) I/O pin.
Serial data (CH0) output pin.
Serial data (CH0) input pin.

input pin for
timer/counter.

PWM output pins.
(2 pins)

DA gate pulse output pins.
(4 pins)

Input pin to request
external interruption.
Active when falling edge.

CS0

Input

Serial chip select (CH0) input pin.

– 5 –

Symbol I/O Description

CXP874P60

PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0

/PMI
PG5/SYNC1
PG6/EXI0
PG7/EXI1/

PMSK

PH0 to PH7

PI0/PCK
/OSCI

PI1/PO
PI2/PWM
PI3/TO

PI4/INT1
PI5/SCK1

PI6/SO1
PI7/SI1

Input/Input
Input/Input
Input/Input
Input/Input

Input/Input/Input
Input/Input

Input/Input
Input/Input/Input

Output

Input/Input/Input

I/O/Output
I/O/Output
I/O/Output

I/O/Input
I/O/I/O

I/O/Output
I/O/Input

Capstan FG input pin.
Drum FG input pin.
Drum PG input pin.
Playback CTL pulse input pin.

(Port G)
8-bit input port.
(8 pins)

Composite sync
signal input pin.

Measuring pulse signal input pin
of pulse cycle measuring unit.

External input
pin to FRC
capture unit.

Measuring enable signal input pin
of pulse cycle measuring unit.

(Port H)
8-bit output port; large current, N-ch open drain output.
(8 pins)

Connecting pin of crystal
oscillation circuit for general
purpose prescaler. (Mask option)

(Port I)
Lower 1 bit is

External clock
input pin of general
purpose prescaler.

General purpose prescaler output pin.

input port
(mask option)
and upper 7 bits

14-bit PWM output pin.
Timer/counter, output pin. (duty=50%)

are I/O port.
I/O port can be
specified by bit
unit.

Input pin to request external interruption.
Active when falling edge.

Serial clock (CH1) I/O pin.

(8 pins)

Serial data (CH1) output pin.
Serial data (CH1) input pin.

PJ0 to PJ7

I/O

(Port J)
8-bit I/O port. Function as standby release input can be specified by bit
unit. I/O can be specified by bit unit.

– 6 –

Symbol I/O Description

PK0/OSCO

EXTAL

Input/Output

Input

Input port. (Mask option)

Connecting pin of crystal oscillator for system clock. When supplying
the external clock, input the external clock to EXTAL pin and input

XTAL

Output

opposite phase clock to XTAL pin.
System reset pin of active "L" level. RST pin is I/O pin, which output

RST

I/O

"L" level by incorporated power on reset function when power on.
(Mask option)

CXP874P60

Connecting pin of crystal
oscillation circuit for general
purpose prescaler. (Mask opiton)

MP
AVDD
AVREF
AVSS
VDD

Vpp
VSS

Input

Input

Microprocessor mode input pin. Always connect to GND.
Positive power supply pin of A/D converter.
Reference voltage input pin of A/D converter.
GND pin of A/D converter.
Positive power supply pin.
Positive power supply pin for built-in PROM writing.

Connect to VDD for normal operation.
GND pin. Connect two Vss pins to GND.

– 7 –

Input/Output Circuit Format for Pins

Pin When resetCircuit format

PA0/PPO000
/PPO100

to
PA7/PPO007
/PPO107

Port A
Port B

PPO0 data
PPO1 data

CXP874P60

PB4/PPO012
/PPO112

to
PB5/PPO013
/PPO113

10 pins

PB0/PPO008

to
PB3/PPO011

PB6/PPO014

to
PB7/PPO015

6 pins

PC0/PPO016

to

PC2/PPO018
PC3/RTO3

to

PC7/RTO7

Data bus

Port B

Data bus

Port C

Port A or Port B

RD

PPO0 data

Port A or Port B

RD

PPO, RTO data

Port C data

Port C direction

Output becomes active from high
impedance by data writing to port register.

Output becomes active from high
impedance by data writing to port register.

Input
protection
circuit

IP

(Every bit)

Hi-Z

Hi-Z

Hi-Z

8 pins

PD0

to

PD7

8 pins

Data bus

Port D

Data bus

RD (Port C)

Port D data

Port D direction

RD (Port D)

– 8 –

(Every 4 bits)

PD0 to 3
PD4 to 7

IP

Large
current
12mA

Hi-Z

A

A

A

Pin When resetCircuit format

CXP874P60

PE1/EC/INT2

1 pin

PE0/INT0
/XOUT

1 pin

PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1

Port E

Port E

Data bus

Port E

PS1

OSCO

Port E function
select register

AA

RD (Port E)

DA gate output or
PWM output

Hi-Z control

Port E data

Port E function
select register

A

1/2

Schmitt input

IP

MPX

MPX

RD (Port E)

Data bus

To interruption
circuit

Hi-Z

IP

Hi-Z

Hi-Z

4 pins

PE6/DAB0
PE7/DAB1

2 pins

Data bus

Port E

Data bus

DA gate output

Hi-Z control

Port E data

Port E function
select register

RD (Port E)

RD (Port E)

– 9 –

A

MPX

A

H level

Pin When resetCircuit format

CXP874P60

AN0

to

AN3

4 pins

PF0/AN4

to

PF3/AN7

4 pins

PF4/AN8

to

PF7/AN11

Port F

Port F

Data bus

Port F data

Input multiplexer

IP

Input multiplexer

IP

RD (Port F)

A/D converter

Data bus

A/D converter

Hi-Z

Hi-Z

IP

Hi-Z

4 pins

PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0/PMI
PG5/SYNC1
PG6/EXI0
PG7/EXI1/PMSK

8 pins

PH0

to

PH7

RD
(Port F)

Port/AD select

Input multiplexer

A/D converter

Port G

Schmitt input

IP

RD (Port G)

Note) For PG4 and PG5 input format, there are CMOS schmitt input and TTL schmitt
input with product.

Pulse cycle measurement unit input
Servo input

Data bus

Port H

Port H data

Data bus

Large current output

Hi-Z

Hi-Z

8 pins

RD (Port H)

– 10 –