CMOS 8-bit Single Chip Microcomputer
CXP834P16
CXP834P17
Description
The CXP834P16 and CXP834P17 are a CMOS
8-bit microcomputer which consists of A/D converter,
serial interface, timer/counter, time base timer,
32kHz timer/counter, LCD controller/driver, remote
control receiving circuit and PWM output, as well as
basic configurations like 8-bit CPU, PROM, RAM
and I/O port. They are integrated into a single chip.
Also CXP834P16 and CXP834P17 provide sleep/
stop function which enables to lower power
consumption.
The CXP834P16 and CXP834P17 are the PROMincorporated version of the CXP83416 and
CXP83417 with built-in mask ROM. These provide
the additional feature of being able to write directly
into the program. Thus, they are most suitable for
evaluation use during system development and for
small-quantity production.
Features
• A wide instruction set (213 instructions) which covers various types of data
— 16-bit arithmetic/multiplication and division/Boolean bit operation instructions
• Minimum instruction cycle 400ns at 10MHz operation (4.5 to 5.5V)
122µs at 32kHz operation (2.7 to 5.5V)
• Incorporated PROM capacity 16K bytes
• Incorporated RAM capacity 448 bytes (LCD display data area included)
• Peripheral functions
— A/D converter 8 bits, 8 channels, successive approximation system
(Conversion time: 32µs/10MHz)
— Serial interface Incorporated 8-bit and 8-stage FIFO
(1 to 8 bytes auto transfer), 1 circuit 2 channels
— Timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer, 32kHz timer/counter
— LCD controller/driver Maximum 128 segments display possible (During 1/4 duty)
4 common outputs, 32 segment outputs
Display method: Static, 1/2, 1/3 and 1/4 duty
Bias method: 1/2 and 1/3 bias
— Remote control receiving circuit 8-bit pulse measurement counter 6-stage FIFO
— PWM output 14 bits 1 channel, 8 bits 1 channel
• Interruption 12 factors, 12 vectors, multi-interruption possible
• Standby mode SLEEP/STOP
• Package 80-pin plastic QFP/LQFP
80 pin QFP (Plastic) 80 pin LQFP (Plastic)
CXP834P16
CXP834P17
80 pin QFP (Plastic)
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E93Z14B63-ST
Pin Assignment (Top View) CXP834P16 (QFP package)
CXP834P16, CXP834P17
PE3/INT3/NMI
PE4/RMC
PE5/PWM0
PE6/TO/ADJ
PB0/CS1
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PH0/PWM1
PA0/AN0
PA1/AN1
PA2/AN2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PE2/INT2
80
79
PE0/INT0/EC
PE1/INT1
78
77
Vpp
PF6/SEG30
PF7/SEG31
75
76
74
TEX
73
TX
72
DD
V
PF4/SEG28
PF5/SEG29
70
71
PF2/SEG26
PF3/SEG27
69
68
67
1
2
3
4
5
6
7
8
9
PD7/SEG23
PF0/SEG24
PF1/SEG25
65
66
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
42
41
43
PD6/SEG22
PD5/SEG21
PD4/SEG20
PD3/SEG19
PD2/SEG18
PD1/SEG17
PD0/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
35
LC3
V
36
LC2
V
37
LC1
V
26
25
PA3/AN3
27 28
PA5/AN5
PA4/AN4
30
29
PA7/AN7
PA6/AN6
31
RST
32
XTAL
EXTAL
33
SS
V
34
L
V
Note) Vpp (Pin 75) is always connected to VDD.
– 3 –
38
39
COM1
COM0
40
COM2
Pin Assignment (Top View) CXP834P16 (LQFP package)
CXP834P16, CXP834P17
PE5/PWM0
PE6/TO/ADJ
PB0/CS1
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PH0/PWM1
PA0/AN0
10
11
12
13
14
15
16
17
18
19
20
PE3/INT3/NMI
PE4/RMC
80
79
PE2/INT2
78
77
PE0/INT0/EC
PE1/INT1
75
76
Vpp
PF6/SEG30
PF7/SEG31
73
74
72
TEX
71
TX
70
DD
V
PF4/SEG28
PF5/SEG29
69
68
PF3/SEG27
66
67
PF0/SEG24
PF1/SEG25
PF2/SEG26
65
64
63
1
2
3
4
5
6
7
8
9
PD5/SEG21
PD6/SEG22
PD7/SEG23
62
61
59
60
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
PD4/SEG20
PD3/SEG19
PD2/SEG18
PD1/SEG17
PD0/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
21
22
PA1/AN1
23
24
PA3/AN3
PA2/AN2
26
25
PA5/AN5
PA4/AN4
27
28
PA7/AN7
PA6/AN6
29
RST
30
XTAL
EXTAL
31
32
L
SS
V
V
33
LC3
V
34
LC2
V
35
LC1
V
Note) Vpp (Pin 73) is always connected to VDD.
– 4 –
36
37
COM0
38
COM1
39
COM2
40
COM3
SEG0
Pin Assignment (Top View) CXP834P17 (QFP package)
CXP834P16, CXP834P17
PE5/PWM0
PE6/TO/ADJ
PB0/CS1
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PH0/PWM1
PA0/AN0
10
11
12
13
14
15
16
17
18
19
20
PE4/RMC
80
79
PE1/INT1
PE2/INT2
PE3/INT3/NMI
78
76
77
PF6/SEG30
PF7/SEG31
PE0/INT0/EC
75
73
74
Vpp
72
TEX
71
TX
70
DD
V
PF4/SEG28
PF5/SEG29
69
68
PF3/SEG27
66
67
PF0/SEG24
PF1/SEG25
PF2/SEG26
65
64
63
1
2
3
4
5
6
7
8
9
PD5/SEG21
PD6/SEG22
PD7/SEG23
62
61
59
60
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
PD4/SEG20
PD3/SEG19
PD2/SEG18
PD1/SEG17
PD0/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
21
22
PA1/AN1
23
24
PA3/AN3
PA2/AN2
26
25
PA5/AN5
PA4/AN4
27
28
PA7/AN7
PA6/AN6
29
RST
30
XTAL
EXTAL
31
32
L
SS
V
V
33
LC3
V
34
LC2
V
35
LC1
V
Note) Vpp (Pin 73) is always connected to VDD.
– 5 –
36
37
COM0
38
COM2
COM1
39
40
COM3
SEG0
Pin Description
Symbol I/O Functions
(Port A)
8-bit I/O port. I/O can be
PA0/AN0
to
PA7/AN7
I/O/Analog input
set in a unit of single bits.
Incorporation of pull-up
resistor can be set
through the software in a
Analog inputs to A/D converter.
(8 pins)
unit of 4 bits.
(8 pins)
CXP834P16, CXP834P17
PB0/CS1
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PE0/INT0/EC
PE1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5/PWM0
I/O/Input
I/O/Input
I/O/I/O
I/O/Input
I/O/Output
I/O/I/O
I/O/Input
I/O/Output
I/OPC0 to PC7
Input/Input/Input
Input/Input
Input/Input
Input/Input/Input
Input/Input
Output/Output
Chip select input for serial interface (CH1).
(Port B)
8-bit I/O port. I/O can be
set in a unit of single bits.
Incorporation of pull-up
resistor can be set
through the software in a
unit of 4 bits.
(8 pins)
Chip select input for serial interface (CH0).
Serial clock I/O (CH0).
Serial data input (CH0).
Serial data output (CH0).
Serial clock I/O (CH1).
Serial data input (CH1).
Serial data output (CH1).
(Port C)
8-bit I/O port. I/O can be set in a unit of single bits. Capable of driving
12mA sync current. Incorporation of pull-up resistor can be set through
the software in a unit of 4 bits.
(8 pins)
External event inputs for
timer/counter.
External interruption request input.
(4 pins)
(Port E)
7-bit port. Lower 5 bits
are for inputs; upper
2 bits are for outputs.
(7 pins)
Remote control receiving circuit input.
Non-maskable intrruption
request input.
14-bit PWM output.
PE6/TO/ADJ
Output/Output/
Output
I/O/OutputPH0/PWM1
(Port H)
1-bit I/O port. Incorporation
of pull-up resistor can be
set through the software.
(1 pin)
– 6 –
Rectangular wave output for 8-bit timer/
counter and 32kHz oscillation frequency
divider output.
8-bit PWM output.
Symbol I/O Functions
CXP834P16, CXP834P17
PD0/SEG16
to
PD7/SEG23
PF0/SEG24
to
PF7/SEG31
SEG0 to SEG15
COM0 to COM3
VLC1 to VLC3
VL
EXTAL
XTAL
TEX
RST
Vpp
Output/Output
Output/Output
Output
Output
Output
Input
Output
Input
OutputTX
Input
(Port D)
8-bit output port.
(8 pins)
(Port F)
LCD segment signal output.
(16 pins)
8-bit output port.
(8 pins)
LCD segment signal output.
LCD common signal output.
LCD bias power supply.
Control pin to cut off the current flowing to external LCD bias resistor
during standby.
Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.
Crystal connectors for 32kHz timer/counter clock generation circuit.
For usage as event counter, connect clock oscillation source to TEX, and
leave TX open.
Low-level active, system reset.
Positive power supply for the on-chip programmable PROM; connect to
VDD for normal operation.
VDD
Vss
Positive power supply.
GND.
– 7 –
I/O Circuit Format for Pins
CXP834P16, CXP834P17
Pin
PA0/AN0
to
PA7/AN7
8 pins
PB0/CS1
PB1/CS0
PB3/SI0
PB6/SI1
Port A
Port B
Data bus
Data bus
Pull-up resistor
"0" when reset
Port A data
Port A direction
"0" when reset
RD (Port A)
Port A input
selection
"0" when reset
Pull-up resistor
"0" when reset
Port B data
Port B direction
"0" when reset
Circuit format
A/D converter
Input multiplexer
Schmitt input
∗
IP
Input protection
circuit
∗
Pull-up transistors
approx. 100kΩ
∗
IP
When reset
Hi-Z
Hi-Z
4 pins
PB2/SCK0
PB5/SCK1
2 pins
Port B
Data bus
Pull-up resistor
"0" when reset
Port B output
selection
"0" when reset
Port B direction
"0" when reset
RD (Port B)
RD (Port B)
SCK OUT
Output enable
Port B data
CS1
CS0
SI0
SI1
SCK in
∗
Pull-up transistors
approx. 100kΩ
Schmitt input
∗
IP
∗
Pull-up transistors
approx. 100kΩ
Hi-Z
– 8 –