Sony CXP829P60 Datasheet

CXP829P60

CMOS 8-bit Single Chip Microcomputer

Description

The CXP829P60 is a CMOS 8-bit single chip
microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time base
timer, fluorescent display panel controller/driver, I2C
bus interface, remote control transmission circuit,
remote control reception circuit, and 32kHz
timer/counter besides the basic configurations of 8-bit
CPU, PROM, RAM, and I/O port.

This LSI also provides sleep/stop functions which
enable to lower power consumption.

The CXP829P60 is the PROM-incorporated version
of the CXP82960 with built-in mask ROM, and it is
able to write directly into the program. Thus, it is most
suitable for evaluation use during system
development and for small-quantity production.

Features

• Wide-range instruction system (213 instructions) to cover various types of data

— 16-bit arithmetic/multiplication and division/boolean bit operation instructions

• Minimum instruction cycle 250ns at 16MHz operation

(122µs at 32kHz operation)

• Incorporated PROM capacity 60K bytes

• Incorporated RAM capacity 2048 bytes (including fluorescent display area)

• Peripheral functions

— A/D converter 8 bits, 8 channels, successive approximation method

(Conversion time of 20µs/16MHz)

— Serial interface Buffer RAM incorporated (Auto transfer for 1 to 32 bytes), 1 channel

8-bit, 8-stage FIFO incorporated
(Auto transfer for 1 to 8 bytes), 1 channel

— Timers 8-bit timer, 8-bit timer/counter, 19-bit time base timer

32kHz timer/counter

—

Fluorescent display panel controller/driver

— I2C bus interface

— Remote control transmission circuit Auto transmission for 1 to 32 bytes,

— Remote control reception circuit 8-bit pulse measurement counter, 6-stage FIFO

• Interruption 16 factors, 15 vectors, multi-interruption possible

• Standby mode SLEEP/STOP

• Package 80-pin plastic QFP

High voltage drive output port of 28 pins (40V)
Maximum of 196 segments display possible
1 to 16-digit dynamic display
Dimmer function
On-chip incorporated pull-down resistor
Hardware key scan function
Maximum of 12 × 8 key matrix supportable

restart function, carrier output function

Structure

Silicon gate CMOS IC

80 pin QFP (Plastic)

Perchase of Sony’s I2C components conveys a licence under the Philips I2C Patent Rights to use these components

2

in an I

C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E95326-PP

CXP829P60

V

pp

V

SS

V

DD

RST
XTAL
EXTAL
TX

TEX

PA0 to PA7
8

PB0 to PB7
8

PORT A

CLOCK

GENERATOR/

SYSTEM CONTROL

SPC 700

CPU CORE

PORT B

PC0 to PC7
8

PORT C

RAM

2048 BYTES

PROM

60K BYTES

PD0 to PD7
8

PE0 to PE5
6

PORT D

PE6 to PE7
2

PF0 to PF3

4

PORT E

32KHz

PRESCALER/

PG0 to PG3

4

PORT F

PORT G

TIMER/COUNTER

TIME BASE TIMER

REF

SS

Block Diagram

INT3/NMI
INT2
INT1
INT0

AV

DD

AV

AV

2

A/D CONVERTER

8

AN0 to AN7

RAM

FDP

DRIVER

CONTROLLER/

8

8

12

FDP

V

T0 to T7

S0 to S11

T8/S19 to T15/S12

RAM

RAMKEY SCAN

BUFFER

REMOCON OUT

8

RMCO

KR0 to KR7

INTERRUPT CONTROLLER

FIFO

RAM

BUFFER

SERIAL

REMOCON IN

RMC

INTERFACE

SI0

CS0

SO0

UNIT (CH0)

SCK0

FIFO

SERIAL

UNIT (CH1)

INTERFACE

SI1

SO1

SCK1

2

8 BIT TIMER 1

C

2

I

INTERFACE UNIT

2

8 BIT TIMER/COUNTER 0

TO

EC

SCL0

SCL1

SDA0

SDA1

ADJ

– 2 –

Pin Assignment (Top View)

PE0/EC/INT0

PG3

PG2

PG1

PG0

Vpp

TEX

TX

DD

V

T0

T1

T2

T3

T4

T5

CXP829P60

T6

PE1/INT1
PE2/INT2

PE3/INT3/NMI

PE4/RMC

PE5

PE6/RMCO

PE7/TO/ADJ

PB0

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PA0/AN0
PA1/AN1
PA2/AN2
PA3/AN3
PA4/AN4
PA5/AN5
PA6/AN6
PA7/AN7

DD

AV

10
11

12
13
14
15
16
17
18
19
20

21

22
23

24

69

80

79

78

77

76

75

74

73

72

71

70

68

1

2
3
4

5
6
7
8
9

67

66

65

59

64
63
62

60

58

56

54
53

49
48
47
46
45
44

61

57

55

52
51
50

43
42
41

T7
T8/S19
T9/S18
T10/S17
T11/S16
T12/S15
T13/S14
T14/S13

T15/S12
S11
S10
S9
S8
PD7/S7
PD6/S6
PD5/S5
PD4/S4
PD3/S3
PD2/S2
PD1/S1
PD0/S0

FDP

V

PC7/KR7

PC6/KR6

25

REF

AV

35

26

27

PF0/SCL0

PF1/SCL1

28

29

PF3/SDA1

PF2/SDA2

30

SS

AV

31

EXTAL

32

33

TXAL

SS

V

34

RST

37

36

PC0/KR0

PC1/KR1

PC2/KR2

Note) Vpp (Pin 75) must be connected to VDD.

– 3 –

38

39

PC3/KR3

40

PC4/KR4

PC5/KR5

Pin Description

Pin code I/O Functions

(Port A)
8-bit I/O port. I/O can
be set in a unit of

PA0/AN0

to

PA7/AN7

I/O/
Analog input

single bits.
Incorporation of pull-up
resistor can be set

Analog inputs to A/D converter. (8 pins)

through the software in
a unit of 4 bits.
(8 pins)

CXP829P60

PB0
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1

PC0/KR0

to

PC7/KR7

PE0/INT0/EC
PE1/INT1

PE2/INT2
PE3/INT3/

NMI
PE4/RMC
PE5

PE6/RMCO

I/O
I/O/Input
I/O/I/O
I/O/Input
I/O/Output
I/O/I/O
I/O/Input
I/O/Output

I/O/Input

Input/Input/Input
Input/Input

Input/Input
Input/Input/Input
Input/Input

Input
Output/Output

(Port B)
8-bit I/O port. I/O can
be set in a unit of
single bits.
Incorporation of pull-up
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)

(Port C)
8-bit I/O port. I/O can
be set in a unit of single
bits. Capable of driving
12mA sync current.
Incorporation of pull-up
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)

(Port E)
8-bit port. Lower 6 bits
are for inputs; upper
2 bits are for outputs.
(8 pins)

Chip select input for serial interface (CH0).
Serial clock I/O (CH0).
Serial data input (CH0).
Serial data output (CH0).
Serial clock I/O (CH1).
Serial data input (CH1).
Serial data output (CH1).

Serves as key return inputs when operating
key scan with fluorescent display panel (FDP)
segment signal (8 pins).

External event inputs for

Inputs for

timer/counter.

external
interruption
request.
(4 pins)

Non-maskable interruption
request input.

Remote control reception circuit input.

Carrier output of remote control transmission
circuit.

PE7/TO/ADJ

Output/Output/
Output

Output for the timer/counter rectangular waves,
and 32kHz oscillation dividing frequency.

– 4 –

Pin code I/O Functions

CXP829P60

PF0/SCL0
PF1/SCL1

PF2/SDA0
PF3/SDA1

PG0 to PG3

PD0/S0

to

PD7/S7

T8/S12

to

T15/S19
T0 to T7
VFDP

EXTAL
XTAL

Output/I/O

(Port F)
4-bit output port,

Transfer clock I/Os for I2C bus interface.
(2 pins)

operating as N-ch open

Output/I/O

drain output for large
current (12mA).
(4 pins)

Transfer data I/Os for I2C bus interface.
(2 pins)

(Port G)
8-bit I/O port. I/O can be set in a unit of single bits.

I/O

Incorporation of pull-up resistor can be set through the software in a unit
of 4 bits.
(4 pins)

(Port D)

Output/Output

8-bit output ports.
(8 pins)

OutputS8 to S11 FDP segment signal outputs. (4 pins)

Output/Output

Output

Outputs for FDP timing signals/segment signals.
(8 pins)

FDP timing signal outputs.
FDP voltage supply.

Input

Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be

Output

input to XTAL.

FDP segment signal outputs.
(8 pins)

TEX
TX

RST
NC
AVDD

AVREF
AVSS

Vpp
VSS

Input
Output

Input

Input

Crystal connectors for 32kHz timer/counter clock oscillation. For usage
as event counter, attach clock source to TEX, and open TX.

Low-level active, system reset.
NC. Under normal operation, connect to VDD.
Positive power supply for A/D converter.
Reference voltage input for A/D converter.
A/D converter GND.
Positive power supply for built-in PROM writing.

Connect to VDD for normal operation.
GND.

– 5 –

Data bus

RD (Port B)

Port B direction

IP

Port B data

Pull-up resistor
"0" when reset

"0" when reset

∗

Pull-up transistor approx. 100kΩ

∗

Schmitt input

CS0
SI0
SI1

Not Schmitt input for SI0 and SI1.

Data bus

RD (Port B)

IP

Port B output
selection

"0" when reset

∗

Pull-up transistor approx. 100kΩ

∗

Schmitt input

SCK in

Port B data

Port B direction

"0" when reset

Pull-up resistor

"0" when reset

SCK OUT

Serial clock output enable

A

I/O Circuit Format for Pins

CXP829P60

Pin

PA0/AN0

to

PA7/AN7

8 pins

Port A

Port B

Data bus

Pull-up resistor

"0" when reset

Port A data

Port A direction
"0" when reset

RD (Port A)

Port A input
selection

AA

"0" when reset

Circuit format

A/D converter

∗

IP

Input
protection
circuit

Input multiplexer

∗

Pull-up transistor approx. 100kΩ

When reset

Hi-Z

PB1/CS0
PB3/SI0
PB6/SI1

PB2/SCK0
PB5/SCK1

3 pins

2 pins

Port B

– 6 –

Hi-Z

Hi-Z

CXP829P60

PB4/SO0
PB7/SO1

2 pins

PC0/KR0

to

PC7/KR7

Port B

Serial data output enable

Data bus

RD (Port B)

Port C

Data bus

Pull-up resistor
"0" when reset

SO

Port B output
selection

"0" when reset

Port B data

Port B direction
"0" when reset

Pull-up resistor
"0" when reset

Port C data

Port C direction
"0" when reset

Circuit format

∗

IP

∗

Pull-up transistor approx. 100kΩ

∗

2

∗

1

IP

When resetPin

Hi-Z

Hi-Z

8 pins

PE0/EC/INT0
PE1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC

5 pins

PE5

1 pin

PE6/RMCO

Port E

Port E

Port E

Port E output selection

"0" when reset

Port E data

"1" when reset

RD (Port C)

Key input signal

Schmitt input

IP

IP

Remote control
transmission circuit

Output enable

∗

1

 Large current 12mA

∗

2

 Pull-up transistor approx. 100k Ω

EC/INT0
INT1
INT2
INT3/NMI
RMC

Data bus

RD (Port E)

Data bus

RD (Port E)

Hi-Z

Hi-Z

High level

1 pin

Data bus

RD (Port E)

– 7 –

CXP829P60

PE7/TO/ADJ

1 pin

PF0/SCL0
PF1/SCL1
PF2/SDA0
PF3/SDA1

4 pins

Port E

Port E data

ADJ16K

ADJ2K

TO

∗

1

∗

1

TO output enable

"1" when reset

Port E output selection (upper)

Port E output selection (lower)

"00" when reset

Port F

SCL, SDA

2

I

C output enable

("0" when reset)

Port F data

"1" when reset

SCL, SDA
(I2C circuit)

Circuit format

Internal reset signal

00
01

MPX

10
11

Schmitt input

∗

2

∗

1

ADJ signal is a frequency dividing output for
 32kHz oscillation frequency adjustment.
 ADJ2 can be used for buzzer output.

∗

2

Pull-up transistor approx. 150kΩ.

Large current
12mA

IP

BUS SW

To internal I2C pin
(to SCL1 for SCL0)

When resetPin

High level
(

with approx.
150kΩ
resistor when
reset)

Hi-Z

PB0
PG0 to PG3

5 pins

Port B

Port G

Pull-up resistor

Port B, G data

Port B, G direction

Data bus

RD (Port B or Port G)

"0" when reset

"0" when reset

∗

IP

∗

Pull-up transistor approx. 100kΩ

Hi-Z

– 8 –