The CXP82832/82840/82852/82860 is a CMOS 8bit single chip microcomputer integrating on a single
chip an A/D converter, serial interface, timer/counter,
time base timer, capture timer/counter, fluorescent
display panel controller/driver, remote control
reception circuit, and PWM output besides the basic
configurations of 8-bit CPU, ROM, RAM, and I/O port.
The CXP82832/82840/82852/82860 also provides
sleep/stop function that enables lower power
consumption.
Features
• Wide-range instruction system (213 instructions) to cover various types of data
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
• Minimum instruction cycle400ns at 10MHz operation
High voltage drive output port of 56 pins (40V)
Maximum of 640 segments display possible
Display timing number of 1 to 20
Dimmer function
Incorporated pull-down resistor (Mask option)
Hardware key scan function (Maximum of 16 × 8 key matrix
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any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
(Port B)
8-bit I/O port. I/O can be set in a
unit of single bits. Incorporation
of the pull-up resistor can be set
through the software in a unit of
4 bits.
(8 pins)
(Port C)
8-bit I/O port. I/O can be set in a
unit of single bits. Can drive
12mA sync current.
Incorporation of the pull-up
resistor can be set through the
software in a unit of 4 bits.
(8 pins)
(Port D)
8-bit output port.
(8 pins)
(Port E)
8-bit port. Lower 6 bits are for
inputs; upper 2 bits are for
outputs.
(8 pins)
Capture input to 16-bit timer/counter.
Chip select input for serial interface (CH0).
Serial clock I/O (CH0).
Serial data input (CH0).
Serial data output (CH0).
Serial clock I/O (CH1).
Serial data input (CH1).
Serial data output (CH1).
Serves as key return inputs when
operating key scan with fluorescent
display panel (FDP) segment signal.
(8 pins)
FDP segment signal (anode
connection) outputs.
External event inputs
Inputs for
external
for timer/counter.
(2 pins)
interruption
request.
(4 pins)
Non-maskable
interruption request input.
Remote control reception circuit input.
PE6/PWM
PE7/TO/ADJ
PF0/A47
to
PF7/A40
Output/Output
Output/Output/
Output
Output/Output
(Port F)
8-bit output port.
(8pins)
14-bit PWM output.
Output for the 16-bit timer/counter
rectangular waves, and 32kHz
oscillation frequency division.
FDP segment signal (anode
connection) outputs.
– 4 –
Pin codeI/OFunctions
CXP82832/82840/82852/82860
PG0/A39
to
PG7/A32
PH0/A31
to
PH7/A24
G0/A0
to
G15/A15
VFDP
EXTAL
XTAL
TEX
TX
RST
NC
Output/Output
Output/Output
OutputA16 to A23
Output/Output
Input
Output
Input
Output
Input
(Port G)
8-bit output port.
(8 pins)
(Port H)
8-bit output port.
(8 pins)
FDP segment signal (anode
connection) outputs.
(8 pins)
FDP segment signal (anode
connection) outputs.
(8 pins)
FDP segment signal (anode connection) outputs.
(8 pins)
Outputs for FDP timing signals (grid connection)/segment signals (anode
connection).
(16 pins)
FDP voltage supply when incorporated pull-down (PD) resistor is set by
mask option.
Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.
Crystal connectors for 32kHz timer/counter clock oscillation. For usage
as event input, input to TEX, and open TX.
Low-level active, system reset
NC. Under normal operation, connect to VDD.
AVREF
AVSS
VDD