Sony CXP82860, CXP82852, CXP82840, CXP82832 Datasheet

CXP82832/82840/82852/82860
CMOS 8-bit Single Chip Microcomputer
Description
The CXP82832/82840/82852/82860 is a CMOS 8­bit single chip microcomputer integrating on a single chip an A/D converter, serial interface, timer/counter, time base timer, capture timer/counter, fluorescent display panel controller/driver, remote control reception circuit, and PWM output besides the basic configurations of 8-bit CPU, ROM, RAM, and I/O port.
Features
Wide-range instruction system (213 instructions) to cover various types of data
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
Minimum instruction cycle 400ns at 10MHz operation
(122µs at 32kHz operation)
Incorporated ROM capacity 32K bytes (CXP82832)
40K bytes (CXP82840) 52K bytes (CXP82852) 60K bytes (CXP82860)
Incorporated RAM capacity 1536 bytes (including fluorescent display area)
Peripheral functions
— A/D converter 8 bits, 8 channels, successive approximation method
(Conversion time of 32µs/10MHz)
— Serial interface 8-bit, 8-stage FIFO incorporated
(Auto transfer for 1 to 8 bytes), 1 channel 8-bit clock synchronized type, 1 channel
— Timers 8-bit timer, 8-bit timer/counter, 19-bit time base timer
16-bit capture timer/counter, 32kHz timer/counter
— Fluorescent display panel controller/driver Supports the universal grid fluorescent display panel.
High voltage drive output port of 56 pins (40V) Maximum of 640 segments display possible Display timing number of 1 to 20 Dimmer function Incorporated pull-down resistor (Mask option) Hardware key scan function (Maximum of 16 × 8 key matrix
supportable) — Remote control reception circuit 8-bit pulse measurement counter, 6-stage FIFO — PWM output 14 bits, 1 channel
Interruption 16 factors, 15 vectors, multi-interruption possible
Standby mode SLEEP/STOP
Package 100-pin plastic QFP
Piggyback/evaluation chip CXP82800 100-pin ceramic QFP
Structure
Silicon gate CMOS IC
100 pin QFP (Plastic)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E94Y08B74
CXP82832/82840/82852/82860
SS DD
V V
RST XTAL
EXTAL
TX TEX
PA0 to PA7 8
CL OCK GENERAT OR
SPC 700
PORT A
/SYSTEM CONTROL
CPU CORE
PB0 to PB7 8
PC0 to PC7 8
PORT B
RAM
PD0 to PD7 8
PORT C
PORT D
PE0 to PE5 6
PE6 to PE7 2
PF0 to PF7 8
PORT E
PG0 to PG7 8
PORT F
PH0 to PH7 8
PORT G
PORT H
32KHz
1536 BYTES
TIMER/COUNTER
ROM
BYTES
/52K/60K
32K/40K
PRESCALER/
TIME BASE TIMER
SS
2
INT3/NMI
INT2
INT1
INTERRUP T CONTROLLER
INT0
2
REF
AV
RAM
RAMKEY SCAN
FIFOREMOCON
FIFO
2
2
AV
A/D CONVERT ER
8
AN0 to AN7
FDP
DRIVER
CONTROLLER/
8
16
32
FDP
V
A16 to A23
A24 to A55
1 4 B IT PWM G ENERATO R
8
RMC
PWM
KR0 to KR7
UNIT 0
SERIAL
INTERFACE
SERIAL INTERFACE UNIT 1
SI0
CS0
SI1
SO0
SCK0
SO1
SCK1
8 BIT TI ME R 1
16 BIT CAPTURE
TIMER/COUNTER 2
8 BIT T IMER/ COUNTE R 0
EC0
TO
CINT
EC1
ADJ
G0/A0 to G1 5 /A 1 5
Block Diagram
– 2 –
Pin Assignment (Top View)
CXP82832/82840/82852/82860
G1/A1 G0/A0
NC
PE0/EC0/INT0 PE1/EC1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5
PE6/PWM
PE7/TO/ADJ
PC0/KR0 PC1/KR1 PC2/KR2 PC3/KR3 PC4/KR4 PC5/KR5 PC6/KR6 PC7/KR7
PB0/CINT
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
AVREF PA0/AN0 PA1/AN1
10 11 12 13 14 15 16 17 18 19 20
23
26
29 30
21 22
24 25
27 28
DD
V
G12/A12
G11/A11
G10/A10
G9/A9
G8/A8
G7/A7
G6/A6
G5/A5
G4/A4
G3/A3
G2/A2
99
100
1 2 3 4 5 6 7 8 9
98
97
96
95
94
93
92
91
90
89
88
G14/A14
G13/A13
86
87
G15/A15
85
A16
84
A17
83
A18
82
A19
81
A20
80 79 78 77 76 75 74
73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
A21 A22 A23 PH7/A24 PH6/A25 PH5/A26 PH4/A27 PH3/A28 PH2/A29 PH1/A30 PH0/A31 PG7/A32 PG6/A33 PG5/A34 PG4/A35 PG3/A36 PG2/A37 PG1/A38 PG0/A39 PF7/A40 PF6/A41 PF5/A42 PF4/A43 PF3/A44 PF2/A45 PF1/A46 PF0/A47 PD7/A48 PD6/A49 PD5/A50
32
31
PA2/AN2
33
34
PA4/AN4
PA3/AN3
35
PA5/AN5
37
36
PA7/AN7
PA6/AN6
SS
AV
38
39
RST
40
XTAL
EXTAL
41
Vss
42
TX
43
44
TEX
Note) 1. NC (Pin 3) must be connected to VDD.
2. VDD (Pins 44 and 89) must be connected to VDD.
– 3 –
DD
V
45
FDP
V
46
48
47
PD1/A54
PD0/A55
49
50
PD3/A52
PD2/A53
PD4/A51
Pin Description
Pin code I/O Functions
(Port A) 8-bit I/O port. I/O can be set in a
PA0/AN0
to
PA7/AN7
I/O/ Analog input
unit of single bits. Incorporation of the pull-up resistor can be set through the software in a unit of 4 bits. (8pins)
CXP82832/82840/82852/82860
Analog inputs to A/D converter. (8 pins)
PB0/CINT PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1
PC0/KR0
to
PC7/KR7
PD0/A55
to
PD7/A48 PE0/INT0/
EC0 PE1/INT1/
EC1 PE2/INT2 PE3/INT3/
NMI PE4/RMC PE5
I/O/Input I/O/Input I/O/I/O I/O/Input I/O/Output I/O/I/O I/O/Input I/O/Output
I/O/Input
Output/Output
Input/Input/Input
Input/Input/Input Input/Input Input/Input/Input Input/Input
Input
(Port B) 8-bit I/O port. I/O can be set in a unit of single bits. Incorporation of the pull-up resistor can be set through the software in a unit of 4 bits. (8 pins)
(Port C) 8-bit I/O port. I/O can be set in a unit of single bits. Can drive 12mA sync current. Incorporation of the pull-up resistor can be set through the software in a unit of 4 bits. (8 pins)
(Port D) 8-bit output port. (8 pins)
(Port E) 8-bit port. Lower 6 bits are for inputs; upper 2 bits are for outputs. (8 pins)
Capture input to 16-bit timer/counter. Chip select input for serial interface (CH0). Serial clock I/O (CH0). Serial data input (CH0). Serial data output (CH0). Serial clock I/O (CH1). Serial data input (CH1). Serial data output (CH1).
Serves as key return inputs when operating key scan with fluorescent display panel (FDP) segment signal.
(8 pins)
FDP segment signal (anode connection) outputs.
External event inputs Inputs for external
for timer/counter.
(2 pins) interruption request. (4 pins)
Non-maskable interruption request input.
Remote control reception circuit input.
PE6/PWM
PE7/TO/ADJ
PF0/A47
to
PF7/A40
Output/Output Output/Output/
Output
Output/Output
(Port F) 8-bit output port. (8pins)
14-bit PWM output. Output for the 16-bit timer/counter
rectangular waves, and 32kHz oscillation frequency division.
FDP segment signal (anode connection) outputs.
– 4 –
Pin code I/O Functions
CXP82832/82840/82852/82860
PG0/A39
to
PG7/A32 PH0/A31
to
PH7/A24
G0/A0
to
G15/A15 VFDP
EXTAL XTAL TEX TX RST
NC
Output/Output
Output/Output
OutputA16 to A23
Output/Output
Input Output Input Output
Input
(Port G) 8-bit output port. (8 pins)
(Port H) 8-bit output port. (8 pins)
FDP segment signal (anode connection) outputs.
(8 pins) FDP segment signal (anode
connection) outputs. (8 pins)
FDP segment signal (anode connection) outputs.
(8 pins)
Outputs for FDP timing signals (grid connection)/segment signals (anode connection). (16 pins)
FDP voltage supply when incorporated pull-down (PD) resistor is set by mask option.
Crystal connectors for system clock oscillation. When the clock is supplied externally, input to EXTAL; opposite phase clock should be input to XTAL.
Crystal connectors for 32kHz timer/counter clock oscillation. For usage as event input, input to TEX, and open TX.
Low-level active, system reset
NC. Under normal operation, connect to VDD. AVREF AVSS VDD
VSS
Input
Reference voltage input for A/D converter.
A/D converter GND.
VCC supply.
GND.
– 5 –
I/O Circuit Format for Pins
CXP82832/82840/82852/82860
Pin
PA0/AN0
to
PA7/AN7
8 pins
PB0/CINT PB1/CS0 PB3/SI0 PB6/SI1
Port A
Port B
Data bus
Data bus
Pull-up resistor "0" when reset
Port A data
Port A direction
"0" when reset
RD (Port A)
Port A input selection
"0" when reset
A/D converter
Pull-up resistor "0" when reset
Port B data
Port B direction
"0" when reset
Circuit format
Input multiplexer
IP
Input protection circuit
Pull-up transistor approx. 100k
IP
Schmitt input
When reset
Hi-Z
Hi-Z
4 pins
PB2/SCK0 PB5/SCK1
2 pins
Port B
Pull-up resistor "0" when reset
Serial clock output enable
Port B output selection
"0" when reset
Port B data
Port B direction
"0" when reset
Data
bus
RD (Port B)
RD (Port B)
SCK OUT
SCK in
CINT
CS0
SI0 SI1
Pull-up transistor approx. 100k
Schmitt input
Pull-up transistor approx. 100k
Hi-Z
IP
– 6 –
CXP82832/82840/82852/82860
Pin
PB4/SO0 PB7/SO1
2 pins
PC0/KR0
to
PC7/KR7
Port B
Pull-up resistor "0" when reset
Serial data output enable
Port B output selection
"0" when reset
Port B data
Port B direction
"0" when reset
Data
bus
RD (Port B)
Port C
Pull-up resistor
"0" when reset
Port C data
Port C direction
"0" when reset
SO
Circuit format
IP
Pull-up transistor approx. 100k
2
1
IP
When reset
Hi-Z
Hi-Z
8 pins
PE0/EC0/INT0 PE1/EC1/INT1 PE2/INT2 PE3/INT3/NMI PE4/RMC
5 pins
PE5
1 pin
Data bus
Port E
Port E
RD (Port C)
Key input signal
IP
IP
Schmitt input
1
Large current 12mA
2
Pull-up transistor approx. 100k
EC0/INT0 EC1/INT1 INT2 INT3/NM1 RMC
Data bus
RD (Port E)
Data bus
RD (Port E)
Hi-Z
Hi-Z
– 7 –
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