Sony CXP82616, CXP82612 Datasheet

CMOS 8-bit Single Chip Microcomputer

Description

The CXP82612/82616 microcomputer is composed
of a CPU, ROM, RAM, and I/O ports. These chips
feature many other high-performance circuits in a
single-chip CMOS design, including an A/D converter,
serial interface, timer/counter, time-base timer,
fluorescent display controller/driver, remote control
receiver and 32kHz timer/counter.

This device also includes a power-on reset function
and sleep/stop functions which can be used to
achieve low power consumption.

Features

• Instruction set which supports a wide array of data types

— 213 types of instructions which include 16-bit calculations, multiplication and division arithmetic, and

boolean bit operations.

• Minimum instruction cycle 400ns for 10MHz, 122µs/for 32kHz operation

• On-chip ROM 12K bytes (CXP82612)

16K bytes (CXP82616)

• On-chip RAM 448 bytes (Including fluorescent display data area)

• Peripheral functions

— A/D converter 8-bit, 8-channel, successive approximation system

(conversion rate 32µs/10MHz)

— Serial interface On-chip 8-bit, 8-stage FIFO (1 to 8 bytes auto transfer),

1 circuit 2-channel

— Timers 8-bit timer

8-bit timer/counter
19-bit time base timer
32kHz timer/counter

— Fluorescent display controller/driver Maximum of 336 segments display available

1 to 16 digits dynamic display
Dimmer function
High voltage tolerance output (40V)
On-chip pull-down resistor (Mask option)
Hardware key scan function (Maximum of 8 × 16 key matrix available)

— Remote control receiver circuit On-chip 6 stage FIFO 8-bit pulse measurement counter

• Interrupts 13 factors, 13 vectors multi-interruption possible

• Standby mode Sleep/stop

• Package 80-pin plastic QFP

• Piggyback/evaluator CXP82600 80-pin ceramic QFP

Structure

Silicon gate CMOS IC

– 1 –

E93Y22A79-PS

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

CXP82612/82616

80 pin QFP (Plastic)

A/D CONVERTER

FDP

CONTROLLER/

DRIVER

REMOCON

SERIAL

INTERFACE

UNIT

8 BIT TIMER/COUNTER 0

FIFO

FIFO

INTERRUPT CONTROLLER

SPC700

CPU CORE

PROM

16K BYTES

(CXP8xx16)

12K BYTES

(CXP8xx12)

PRESCALER/

TIME BASE TIMER

32kHz

TIMER/COUNTER

RAM

448BYTES

8

PA0/AN0

to

PA7/AN7

T0 to T7

PE4/RMC

PB1/CS0

PB3/SI0

PB4/SO0

PB2/SCK0

PB6/SI1

PB7/SO1

PB5/SCK1

PE0/EC

PE0/INT0

PE1/INT1

PE2/INT2

PE3/INT3

PORT C

8

PC0 to PC7

PORT F

8

PF0 to PF7

PORT B

8

PB0 to PB7

PORT E

6

2

PE0 to PE5

PE6 to PE7

8

8

21

T8/S28

to

T15/S21

S0 to S20

V

FDP

8 BIT TIMER 1

RAM

80 BYTES

PORT A

8

PA0 to PA7

PB0/CS1

2

PE7/ADJ

PE7/TO

2

PE3/NMI

2

8

PD0 to PD7

PORT D

2

PH0 to PH1

PORT H

2

PH2 to PH3

PH2/TEX

PH3/TX

EXTAL

XTAL

V

DD

Vss

RST

CLOCK GEN./

SYSTEM CONTROL

– 2 –

CXP82612/82616

Block Diagram

PE3/INT3/NMI

PE4/RMC

PE5
PE6

PE7/TO/ADJ

PB0/CS1

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1
PB7/SO1
PC0/KR0
PC1/KR1
PC2/KR2
PC3/KR3
PC4/KR4
PC5/KR5
PC6/KR6
PC7/KR7
PA0/AN0
PA1/AN1
PA2/AN2

T6
T7
T8/S28
T9/S27
T10/S26
T11/S25
T12/S24
T13/S23
T14/S22
T15/S21
S20
S19
S18
S17
S16
PF7/S15
PF6/S14
PF5/S13
PF4/S12
PF3/S11
PF2/S10
PF1/S9
PF0/S8
PD7/S7

PA3/AN3

PA4/AN4

PA5/AN5

PA6/AN6

PA7/AN7

RST

EXTAL

XTAL

Vss

PD0/S0

PD1/S1

PD2/S2

PD3/S3

PD4/S4

PD5/S5

PD6/S6

PE2/INT2

PE1/INT1

PE0/EC/INT0

PH0

PH1

NC

PH2/TEX

PH3/TX

V

DD

V

FDP

T0

T1

T2

T3

T4

T5

2
3
4
5
6
7
8
9

10

11
12
13
14
15
16
17
18
19

20

21
22

23
24

25

26

27 28

29

30

40

39

38

37

36

35

34

31

32

33

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

70

69

68

67

63

64

65

66

61

62

71

72

73

74

75

76

77

78

79

80

1

– 3 –

CXP82612/82616

Pin Assignment (Top View)

Note) 1. NC (Pin 75) is always connected to VDD.

2. PH3/TX (Pin 73) is input port during port selection;
oscillation output during oscillation selection

– 4 –

CXP82612/82616

Pin Description

Symbol I/O Functions

I/O/Analog Input

PA0/AN0

to

PA7/AN7

(Port A)
8-bit I/O port. I/O can
be set in a bit unit.
Incorporation of pull-up
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)

Analog inputs to A/D converter.
(8 pins)

I/O/Input

PC0/KR0

to

PC7/KR7

PE0/INT0/
EC0

PE1/INT1
PE2/INT2
PE3/INT3/

NMI
PE4/RMC
PE5
PE6
PE7/TO/

ADJ

Input/Input/
Input

Input/Input
Input/Input
Input/Input/

Input
Input/Input
Input
Input

Output/Output

(Port C)
8-bit I/O port. I/O can
be set in a bit unit.
Capable of driving
12mA sink current.
Incorporation of pull-up
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)

(Port E)
8-bit port.
Upper 6 bits are for
inputs; lower 2 bits are
for outputs.
(8 pins)

Key return input for FDP segment signal which
performs key scanning.

External event input to
timer/counter. (1 pin)

External interrupt
requests.
(4 pins)

Non-maskable interruption request input.

Input for remote control receiver circuit.

Output for timer/counter rectangular waveform
and 32kHz oscillation frequency division.

I/O/Input
I/O/Input
I/O/I/O
I/O/Input
I/O/Output
I/O/I/O
I/O/Input
I/O/Output

PB0/CS1
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1

(Port B)
8-bit I/O port. I/O can
be set in a bit unit.
Incorporation of pull-up
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)

Chip select input for serial interface (CH1).
Chip select input for serial interface (CH0).
Serial clock I/O (CH0).
Serial data input (CH0).
Serial data output (CH0).
Serial clock I/O (CH1).
Serial data input (CH1).
Serial data output (CH1).

– 5 –

CXP82612/82616

Symbol I/O Functions

I/OPH0 to PH1

(Port H)
2-bit I/O port. I/O can be set in a bit unit. Incorporation of pull-up resistor
can be set through the software in a unit of 2 bits.
(2 pins)

Output/Output

T8/S28

to

T15/S21

Dual purpose output for FDP timing and segment signals.

Output/Output

PF0/S8

to

PF7/S15

(Port F)
8-bit output port.
(8 pins)

Output

S16 to S20

Segment signal output for FDP.

Output

T0 to T7 Timing signal output for FDP.

Output/Output

PD0/S0

to

PD7/S7

Input

Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.

EXTAL

Provides voltage for FDP when on-chip resistor is selected under mask option.

VFDP

Output

XTAL

Input/Input

Crystal connectors for 32kHz timer/counter clock
oscillation circuit. Connect a 32kHz crystal oscillator
between TEX and TX. For usage as event input, connect
clock oscillation source to TEX, and leave TX open.

PH2/TEX

Input/Output

PH3/TX

Input Low-level active. System reset. RST is input pin.RST

NC.
Under normal operating conditions, connect to VDD.

NC

Vcc supply.

VDD

GND

Vss

(Port D)
8-bit output port.
(8 pins)

(Port H)
2-bit input
port.
(2 pins)

Segment signal output for FDP.

Segment signal output for FDP.

– 6 –

CXP82612/82616

Port B

Data bus

RD (Port B)

Port B direction

IP

Port B data

"0" when reset

"0" when reset

∗

Schmitt input

CS0
CS1
SI0
SI1

∗

Pull-up transistors

approx. 100kΩ

Pull-up resistor

SI0 and SI1 are not schmitt input.

8 pins

Hi-Z

Hi-Z

When reset

PA0/AN0

to

PA7/AN7

PB0/CS1
PB1/CS0
PB3/SI0
PB6/SI1

Port B

Data bus

RD (Port B)

IP

Port B output
selection

"0" when reset

∗

Schmitt input

SCK in

Port B data

Port B direction
"0" when reset

"0" when reset

SCK OUT

Output enable

∗

Pull-up transistors

approx. 100kΩ

Pull-up resistor

4 pins

2 pins

Hi-Z

PB2/SCK0
PB5/SCK1

Data bus

RD (Port A)

Port A direction

IP

Port A data

Pull-up resistor

Port A input
selection

Input protection
circuit

"0" when reset

"0" when reset

"0" when reset

Input multiplexer

A/D converter

∗

Pull-up transistors

approx. 100kΩ

∗

I/O Circuit Format for Pins

Port A

Pin

Circuit format

– 7 –

CXP82612/82616

2 pins

Hi-Z

Hi-Z

Pin

When reset

Circuit format

PB4/SO0
PB7/SO1

PC0/KR0

to

PC7/KR7

8 pins

5 pins

1 pin

Hi-Z

High level

Hi-Z

PE0/EC/INT0
PE1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC

IP

Schmitt input

RD (Port E)

Data bus

EC/INT0
INT1
INT2
INT3/NMI
RMC

Data bus

RD (Port C)

Port C direction

IP

Port C data

"0" when reset

"0" when reset

∗

2

∗

1

∗

2

Pull-up transistors approx. 100kΩ

∗

1

Large current drive of 12mA possible

Pull-up resistor

Key input signal

Data bus

RD (Port B)

IP

Port B output
selection

"0" when reset

∗

Port B data

Port B direction

"0" when reset

SO

Output enable

∗

Pull-up transistors

approx. 100kΩ

Pull-up resistor

"0" when reset

Port E

PE5

1 pin

PE6

IP

RD (Port E)

Data bus

Port E

Data bus

RD (Port E)

*

Port E data

"1" when reset

Port E

Port C

Port B