Sony CXG1096FN Datasheet
Power Amplifier/Antenna Switch + Low Noise Down Conversion Mixer for PHS
Description
The CXG1096FN is an MMIC consisting of the
power amplifier, diversity antenna supported switch
and low noise down conversion mixer.
This IC is designed using the Sony's GaAs J-FET
process featuring a single positive power supply
operation.
Features
• Operates at a single positive power supply: VDD = 3V
• Diversity antenna supported switch
• Small mold package: 26-pin HSOF
<Power amplifier/antenna switch transmitter block >
• Low current consumption: IDD = 150mA
(POUT = 20.2dBm, f = 1.9GHz)
• High power gain: Gp = 40dB Typ.
(POUT = 20.2dBm, f = 1.9GHz)
<Antenna switch receiver block/
low noise down conversion mixer>
• Low current consumption: IDD = 5.5mA Typ
(When no signal)
• High conversion gain: Gc = 19.5dB Typ
(f = 1.9GHz)
• Low distortion: Input IP3 = –12dBm Typ. (f = 1.9GHz)
• High image compression ratio: IMR = 40dBc Typ.
(f = 1.9GHz)
• High 1/2 IF compression ratio: 1/2IFR = 47dBc Typ.
(f = 1.9GHz)
Applications
Japan digital cordless telephones (PHS)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings
<Power amplifier block>
• Supply voltage VDD 6V
•Voltage between gate and source
VGSO 1.5 V
• Drain current IDD 550 mA
• Allowable power dissipation
PD 3W
<Switch block>
Control voltage VCTL 6V
<Front-end block>
• Supply voltage VDD 6V
•Input power PRF +10 dBm
<Common to each block>
• Channel temperature Tch 150 °C
• Operating temperature Topr –35 to +85 °C
• Storage temperature Tstg –65 to +150 °C
– 1 –
E99X06-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXG1096FN
26 pin HSOF (Plastic)
Note on Handling
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
– 2 –
CXG1096FN
VGG
CAP
POUT
TX
VCTL1
ANT2
ANT1
GND
GND
VDD (RF AMP)
GND
VDD (LO AMP)
LOIN
PIN
GND
VDD1
VDD2
VDD3
GND
RX
VCTL2
RFIN
CAP
GND
CAP
IFOUT/VDD (IF AMP, MIX)
1
2
3
4
5
6
7
8
9
10
11
12
1314
15
16
17
18
19
21
20
22
23
24
25
26
Pin Configuration
30pF
VGG
2.2nH
P
IN
18nH
1nF
1nF
V
DD1
18nH
1nF
30pF
V
DD2
82nH
1nF
5pF
100pF
1.8nH
10nF
V
DD3
V
CTL2
V
DD
(IF AMP, MIX)
100pF
(P
OUT)
(T
X)
1pF
100pF
IFOUT
30pF
100nF
13pF
10pF
10nH
6.8nH
(RF
IN)
(R
X)
ANT1
VDD
(LO AMP)
LOIN
VCTL1
30pF
30pF
2.2nH
3.9nH
VDD
(RF AMP)
1nF18pF
1nF13pF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
20
22
23
24
25
26
ANT2
Block Diagram and External Circuit
– 3 –
CXG1096FN
2. Antenna Switch Receiver Block + Low Noise Down Conversion Mixer Block
These specifications are common to the ANT1 reception and ANT2 reception.
Unless otherwise specified:VDD = 3V, RF1 = 1.90GHz/–35dBm, LO = 1.66GHz/–15dBm
When ANT1 reception: VCTL1 = 0V, VCTL2 = 3V
When ANT2 reception: VCTL1 = 3V, VCTL2 = 0V
Electrical Characteristics
These specifications are when the Sony's recommended evaluation board shown on page 6 is used.
1. Power Amplifier Block + Antenna Switch Transmitter Block
These specifications are common to the ANT1 transmission and ANT2 transmission.
Unless otherwise specified:VDD = 3V, IDD = 150mA, POUT = 20.2dBm, f = 1.9GHz
When ANT1 transmission: VCTL1 = 3V, VCTL2 = 0V
When ANT2 transmission: VCTL1 = 0V, VCTL2 = 3V
Current consumption
Gate voltage adjustment value
Output power
Power gain
Adjacent channel leak power ratio
(600 ± 100kHz)
Adjacent channel leak power ratio
(900 ± 100kHz)
Occupied bandwidth
2nd-order harmonic level
3rd-order harmonic level
Item
IDD
VGG
POUT
GP
ACPR600kHz
ACPR900kHz
OBW
—
—
Symbol
0.04
20.2
36
Min.
150
40
–63
–70
250
Typ.
0.6
–55
–60
275
–25
–25
Max.
mA
V
dBm
dB
dBc
dBc
kHz
dBc
dBc
Unit
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measurement conditions
Item Symbol Min. Typ.
Max.
UnitMeasurement conditions
(Ta = 25°C)
Current consumption
Conversion gain
Noise figure
Input IP3
Image suppression ratio
1/2 IF suppression ratio
2 × LO–IF suppression ratio
2 × LO+IF suppression ratio
LO to ANT leak
IDD
GC
NF
IIP3
IMR
1/2IFR
—
—
PLK
17
–17
25
41
39
34
5.5
19.5
4.4
–12
40
47
45
65
–50
7.5
5.5
–40
mA
dB
dB
dBm
dBc
dBc
dBc
dBc
dBm
When no signal
When a small signal
When a small signal
∗1
RF2 = 1.42GHz/–35dBm
RF2 = 1.78GHz/–35dBm
RF2 = 3.08GHz/–35dBm
RF2 = 3.56GHz/–35dBm
(Ta = 25°C)
∗1
Conversion from IM3 compression ratio during FR1 = 1.9000GHz/–35dBm and FR2 = 1.9006GHz/–35dBm input.
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