Sony CXD2315Q Datasheet
—1—
E95704D01
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage AVDD, DVDD 7V
•Input voltage (All pins)
VIN VDD +0.5 to VSS –0.5 V
• Output voltage (for each channel)
IOUT 0 to 15 mA
• Storage temperature
Tstg –55 to +150 °C
Recommended Operating Conditions
• Supply voltage AVDD, AVSS 5.0 ± 0.25 V
DVDD, DVSS 5.0 ± 0.25 V
• Reference input voltage
VREF 0.5 to 2.0 V
• Clock pulse width tpw1, tpw0 5.6 (min.) ns
• Operating temperature
Topr –20 to +85 °C
Description
The CXD2315Q is a 1-ch 10-bit 80MSPS D/A
converter for monitor and video. This IC achieves
high specifications for the industrial and information
equipment due to the reduction of the glitch energy.
Features
• 10-bit resolution
• Maximum conversion rate 80MSPS
• Differential linearity error ±0.5LSB
• Low power consumption 150 mW (Max.,
When 80MSPS 200 Ω load, 2 Vp-p is output)
• Pin-compatible with CXD2306Q
• Single 5 V power supply
• Built-in independent constant-voltage source
• Ultra-low glitch
• Stand-by function
Structure
Silicon gate CMOS IC
10-bit 80MSPS 1ch D/A Converter (Ultra-low Glitch Version)
32 pin QFP (Plastic)
CXD2315Q
—2—
CXD2315Q
Block Diagram
Pin Configuration
17
18
19
20
21
22
23
24
25
4LSB'S
CURRENT
CELLS
6MSB'S
CURRENT
CELLS
BIAS VOLTAGE
GENERATOR
BAND GAP
REFERENCE
CLOCK
GENERATOR
DECODER
DECODER
LATCHES
2
3
4
5
6
7
9
10
11
13
14
27
28
30
31
32
1
15
(LSB) D0
D1
D2
D3
D4
D5
D6
D7
D8
(MSB) D9
DV
DD
BLK
DV
DD
DVSS
DVSS
CLK
VB
CE
IO
AV
SS
IO
VG
AV
DD
AVDD
CURRENT CELLS
(FOR FULL SCALE)
VREF
IREF
SREF
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
27
15
17
25
AVss
NC
DVss
DV
DD
NC
D0 (LSB)
D1
D2
NC
DVss
VB
DV
DD
NC
CE
BLK
CLK
D3
D4
D5
D6
D7
D8
D9 (MSB)
NC
to
to
Digital section
Analog section
IO
IO
VG
AV
DD
AV
DD
VREF
SREF
IREF
—3—
CXD2315Q
Pin Description and Equivalent Circuit
30 to 32
1 to 7
8, 12, 16, 26, 29
9
10
11
13, 28
14
15, 27
17
19
22
D0 to D9
NC
CLK
BLK
CE
DVDD
VB
DVSS
IREF
VREF
VG
I
—
I
—
O
—
O
I
O
Pin No. Symbol I/O Equivalent circuit Description
DVDD
7
30
DVDD
DVSS
to
10
11
9
DV
DD
DVSS
14
DVDD
DVDD
DVSS
AVss
19
22
17
AVDD
AVDD
AVDD
AVDD
AVSS
AVSS
Digital input.
30 pin D0 (LSB) to 7 pin D9 (MSB)
No connection.
Clock input.
Blanking input.
This is synchronized with the clock
input signal.
No signal (0 V output) at high and
output state at low.
Chip enable input.
This is not synchronized with the
clock input signal.
No signal (0 V output) at high makes
power consumption minimum.
Digital power supply.
Connect a capacitor of approximately
0.1 µF.
Digital ground.
Reference current output.
Connect resistance “RIR” which is 16
times output resistance “ROUT”.
Reference voltage input.
Sets output full scale value.
Connect a capacitor of approximately
0.1 µF.
—4—
CXD2315Q
18
20, 21
23
24
25
SREF
AVDD
IO
IO
AVSS
O
—
O
—
Pin No. Symbol I/O Equivalent circuit Description
18
AVDD
AVSS
AVSS
23
24
AVSS
AVSS
Independent constant-voltage source
output pin using band gap reference.
Stable voltage independent of the
fluctuation for supply voltage can be
get by connecting to VREF. See
Application Circuit 2 for details.
Analog VDD
Inverted current output.
Connect to GND normally.
Current output.
Output can be retrieved by
connecting resistance.
The standard is 200 Ω.
Analog ground.
—5—
CXD2315Q
Electrical Characteristics
(FCLK=80 MHz, AVDD=DVDD=5 V, ROUT=200 Ω, RIR=3.3 kΩ, VREF=2.0 V, Ta=25 °C)
Item
Resolution
Conversion speed
Integral non-linearity error
Differential non-linearity error
Precision guaranteed
output voltage range
Output full-scale voltage
Output full-scale current
Output offset voltage
Glitch energy
Differential gain
Differential phase
Supply current
Analog input resistance
Input capacitance
Digital input voltage
Digital input current
SREF output voltage
Setup time
Hold time
Rise time
Propagation delay time
CE enable time ∗
CE disable time ∗
Symbol
n
FCLK
EL
ED
VOC
VFS
IFS
VOS
GE
DG
DP
IDD
ISTB
RIN
CI
VIH
VIL
IIH
IIL
VSR
ts
th
tr
tPD
tE
tD
Measurement conditions
AVDD=DVDD=4.75 to 5.25 V
Ta=–20 to +85 °C
Endpoint
When D0 to D9= “0000000000” input
CE= “L”
CE= “H”
VREF
AVDD=DVDD=4.75 to 5.25 V
Ta=–20 to +75 °C
AVDD=DVDD=4.75 to 5.25 V
Ta=–20 to +75 °C
CE= H→L
CE= L→H
Min.
0
–1.5
–0.5
1.8
1.8
9.0
1
2.45
–5
1.0
3.0
3.0
5
Typ.
10
1.94
1.94
9.7
1.2
5
1
1
Max.
80
1.5
0.5
2.0
2.0
10
1
30
1.0
1.0
30
1
9
0.85
5
1.45
2
2
Unit
bit
MSPS
LSB
LSB
V
V
mA
mV
pV•s
%
deg
mA
MΩ
pF
V
µA
V
ns
ns
ns
ns
ms
ms
Electrical Characteristics Measurement Circuit
Analog Input Resistance
Measurement Circuit
Digital Input Current
CXD2315Q
+5.25V
AVDD, DVDD
AVSS, DVSS
V
A
}
∗ When the external capacitor for the VGR,VGG and VGB pins are 0.1 µF.
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