Sony CXD2312R Datasheet
9-bit 20MSPS Video A/D Converter
Description
The CXD2312R is a 9-bit CMOS A/D converter for
video applications. This IC is ideally suited for the
A/D conversion of video signals in TVs, VCRs,
camcorders, etc.
Features
• Resolution: 9-bit ±0.5 LSB (D.L.E.)
• Maximum sampling frequency: 20MSPS
• Low power consumption: 130mW (at 20MSPS typ.)
(Not including reference current)
• TTL compatible input
• Tri-state TTL compatible output (DVDD = 3.3V)
• Low input capacitance
• Reference impedance: 300Ω (typ.)
CXD2312R
48 pin LQFP (Plastic)
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage VDD 7V
•Reference voltage VRT, VRB VDD + 0.5 to VSS – 0.5 V
• Input voltage (analog) VIN VDD + 0.5 to VSS – 0.5 V
• Input voltage (digital) VIH, VIL VDD + 0.5 to VSS – 0.5 V
• Output voltage (digital) VOH, VOL VDD + 0.5 to VSS – 0.5 V
• Storage temperature Tstg –55 to +150 °C
Recommended Operating Conditions
• Supply voltage AVDD, AVSS 5.0 ± 0.25 V
DVDD, DVSS 3.0 to 5.25 V
| DVSS – AVSS | 0 to 100 mV
• Reference input voltage VRB More than 1.8 V
VRT to AVDD – 0.4 V
• Analog input VIN More than 1.8Vp-p
• Clock pulse width TPW1 25 (min.) ns
TPW0 25 (min.) ns
• Operating ambient temperature
Topr –20 to + 75 °C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E94Z29C79-PS
Block Diagram
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
CXD2312R
V
VRT
VRT
VRB
VRB
CLK
CE
OE
AVSS
28
27
+
39
IN
29
30
AA
Coarse
AA
Comparate
&
AA
Encode
AA
+
DAC
A
–
Calibration
AA
34
35
22
23
24
Timing Gen
×8
Unit
AA
A
Fine
Comparate
A
&
Encode
A
A
A
Auto Calibration
AAA
Pulse Generator
36
Sense
Amp
Sense
A
Amp
AVDD
18
26
Coarse
AA
Correction
&
Latch
AA
AA
AA
Fine
Latch
AA
AA
D8
12
11
D7
10
D6
9
D5
D4
8
5
D3
D2
4
D1
3
2
D0 (LSB)
MINV
21
LINV
20
19
TESTMODE
41
CAL
17
SEL
15
RESET
Pin Configuration
37
38
39
40
41
42
43
44
45
46
47
48
TSTR
AT
VIN
NC
CAL
TS
AV
SS
AVSS
DVDD
NC
NC
DV
SS
36
1
SS
AV
NC
35
VRB
D0
2
34
VRB
D1
3
33
32
31
30
29
NC
NC
NC
D2
D3
6
5
4
– 2 –
SS
DV
VRT
DD
DV
7
VRT
D4
8
28
27
SS
AV
D5
9
10
26
25
SS
DD
DD
AV
AV
AV
CE
OE
CLK
MINV
LINV
TESTMODE
AV
SEL
DV
RESET
TIN
TO
D6
D8
D7
12
11
DD
SS
24
23
22
21
20
19
18
17
16
15
14
13
Pin Description
Pin No Symbol Equivalent circuit Description
DVDD
CXD2312R
2 to 5
8 to 12
13
7, 45
6, 16, 48
27, 28, 36,
43, 44
17 SEL
D0 to D8
TO
DVDD
DVSS
AVSS
DVSS
17
D0 (LSB) to D8 (MSB)
output.
Test pin.
TS = High:
High impedance state
Digital VDD.
Digital VSS.
Analog VSS.
AVDD
Calibration input pulse
select after completion of
the startup calibration.
High : Internal pulse
generation
Low : External input
AVSS
22 CLK
CAL41
15 RESET
41
15
22
AVDD
Clock pin.
AVSS
AVDD
Calibration pulse input.
AVSS
AVDD
Calibration circuit reset
and startup calibration
restart.
AVSS
– 3 –
Pin No. Symbol Equivalent circuit Description
Test signal input.
14 TIN
Normally fixed to AVDD or
AVSS.
AVDD
CXD2312R
29, 30 VRT
34, 35 VRB
38 AT
42 TS
37 TSTR
29
30
34
Reference top.
AVSS
Reference bottom.
35
Test signal output.
TS = High:
High impedance state
Test signal input.
Normally fixed to AVDD.
Test signal input.
Normally fixed to AVSS.
AVDD
23 OE
CE24
23
24
D0 to D8 output enable.
Low : Output state
High : High impedance
state
AVSS
AVDD
Chip enable.
Low : Active state
High : Standby state
AVSS
– 4 –
Pin No. Symbol Equivalent circuit Description
AVDD
Test mode.
19 TESTMODE
19
High : Output state
Low : Output fixed
AVSS
AVDD
Output inversion.
20
LINV
20
High : D0 to D7 are
inverted and
output.
AVSS
CXD2312R
21 MINV
18, 25, 26 AVDD
39 VIN
AVDD
39
AVSS
21
AVDD
Output inversion.
High : D8 is inverted and
output.
AVSS
Analog VDD.
Analog input.
– 5 –
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