Sony CXD2085M Datasheet
ID-1 Detection
Description
The CXD2085M is an IC which has the function of
detecting ID-1 (EIAJ, CPX1204) from the video signal.
Features
• Can detect the ID-1 signal on the NTSC video
signal.
• Includes I2C bus interface. Also, IC can operate
without the I2C bus.
• Includes a 2-bit general-purpose I/O port function.
(When using I2C bus)
Applications
TVs
Structure
Silicon gate CMOS IC
Block Diagram
Absolute Maximum Ratings
• Supply voltage VDD VSS – 0.5 to +7.0 V
• Input voltage VI VSS – 0.5 to VDD + 0.5 V
• Output voltage VO VSS – 0.5 to VDD + 0.5 V
• Storage temperature
Tstg –55 to +150 °C
Recommended Operating Conditions
• Supply voltage VDD 4.75 to 5.25 V
• Operating temperature
Topr –20 to +70 °C
– 1 –
E98511-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXD2085M
VDIN
Slicer
ID-1 decoder
I
2
C bus interface
Sync separator
VSIN
XI XO
SDA
SCL
OLBX
O169
6
7
12
13
15
16
9
10
16 pin SOP (Plastic)
– 2 –
CXD2085M
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
XRST
TST
MCON
ISET
AVDD
VSIN
VDIN
AVSS
SCL
SDA
VDD
XO
XI
VSS
OLBX
O169
I
I
I
I
I
I
I
I/O
O
I
I/O
I/O
TTL
∗1, ∗4
TTL
∗2
CMOS
ANALOG
ANALOG
ANALOG
CMOS
∗1
CMOS
∗1, ∗3
CMOS
TTL
TTL
Reset at "0".
Test input; connect to Vss.
Switching between use and no use of I2C bus; No I2C bus when Low.
Bias current setting.
Analog power supply.
Sync separation input.
Data slicer input.
Analog GND.
I2C bus clock.
I2C bus data.
Digital power supply.
Oscillator connection. (14.318MHz)
Oscillator connection, or clock input.
Digital GND.
Letter-box bit output when ID detection result is output.
Or, general-purpose I/O port by the I2C bus setting.
Full-mode bit output when ID detection result is output.
Or, general-purpose I/O port by the I2C bus setting.
Symbol I/O Input level Description
∗1
Schmitt input ∗2With pull-down resistor ∗3Open drain ∗4With pull-up resistor
Connect SCL (Pin 9) to Vss in no I2C bus mode with MCON (Pin 3) to Low. Connect SDA (Pin 10) to Vss or
VDD in no I2C bus mode.
– 3 –
CXD2085M
Electrical Characteristics
DC Characteristics (Logic section) (VDD = 5.0V ± 5%, VSS = 0V, Ta = 25°C)
Item
Output voltage
VOH
VOL
VOH
VOL
VOL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
Vhys
Ii
IOZ
Ii
Ii
Rfbk
IDD
IOH = –2mA
IOL = 4mA
IOH = –3mA
IOL = 3mA
IOL = 3mA
VIN = Vss or VDD
VIN = Vss or VDD
VIN = VSS
VIN = VDD
XI (Pin 13) = Vss or VDD
Clock frequency: 14.318MHz
VDD – 0.8
VDD/2
2.0
2.2
0.7×VDD
0.8×VDD
–10
–40
–40
40
250k
0.6
0.4
–100
100
1M
9
0.4
VDD/2
0.4
0.8
0.8
0.3 × VDD
0.2 × VDD
+10
+40
–240
240
2.5M
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
Ω
mA
Pins 15, 16
Pin 12
Pin 10
Pins 15, 16
Pins 1, 2
Pins 3, 13
Pins 9, 10
Pins 9, 10
Pin 1
Pins 3, 9
Pins 10, 15, 16
Pin 1
Pin 2
Between Pins 12 and 13
Sum of Pins 5 and 11
Output voltage
Output voltage
Input voltage
Input voltage
Input voltage
Input voltage
Input hysteresis
width
Input leak current
Output leak current
Input current
Input current
Feedback resistance
Current consumption
Symbol Conditions Min. Typ. Max. Unit Remarks
AC Characteristics (VDD = 5.0V ± 5%, VSS = 0V, Ta = 25°C)
Item
Symbol Conditions Min.
Typ. Max. Unit Remarks
Clock frequency
fxi
14.318
MHz
Pin 13 input, or
oscillator between
Pins 12 and 13
I/O Pin Capacitance
Item
Symbol Conditions Min.
Typ. Max. Unit Remarks
Input pin capacitance
Output pin capacitance
I/O pin capacitance
CIN
COUT
CI/O
VDD = VI = 0V, f = 1MHz
VDD = VI = 0V, f = 1MHz
VDD = VI = 0V, f = 1MHz
9
11
11
pF
pF
pF
– 4 –
CXD2085M
Pin and Electrical Characteristics
Analog Section (VDD = 5.0V ± 5%, Vss = 0V, Ta = 25°C)
Pin
No.
Symbol Equivalent circuit Description
Analog power supply.
Connect a low-noise power supply from the digital
system.
5 AVDD
Not connected to VDD (Pin 11) in the
IC.
Analog ground.
Connect to the same potential as Vss.
8
AVSS
Not connected to Vss (Pin 14) in the
IC.
Bias setting.
Connect to AVDD (Pin 5) with 33kΩ.
4 ISET
Sync tip clamp, sync separation input.
Input with the capacitance coupled.
6 VSIN
Pedestal clamp,
ID signal data slice input.
Input with the capacitance coupled.
7 VDIN
AVDD
AVSS
4
AVDD
AVSS
6
AVDD
AVSS
7
Clamp voltage
1.5V
Clamp voltage
1.5V
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