Achieving a Common Chassis Worldwide
Y, C, and Synchronizing Signal Processing ICs
CXA2060AS
CXA2061S
Sony provides an extensive lineup of Y, C, and synchronizing signal
processing ICs (YCD).
These ICs take advantage of earlier TV ICs and in addition adopt new
technologies to incorporate even more peripheral components and
functionality in the same chip.
The CXA2060AS supports NTSC, PAL (including PAL-M and PAL-N),
and SECAM, whereas the CXA2061S is a special-purpose NTSC YCD
chip.
Thus the pin compatible CXA2060AS and CXA2061S support all TV
broadcast regions and can achieve a common chassis worldwide.
Worldwide Horizontal
Deployment
The CXA2060AS is a single-chip Y,C,
and synchronizing signal processing IC
(YCD) that includes both a 1H delay
line and a SECAM decoder on chip, and
the CXA2061S is a special-purpose
NTSC YCD. While it goes without
saying that these chips are pin compatible, their I2C control registers are also
identical, making them software
compatible as well. These two products
were designed to allow a common
chassis to be used in all TV broadcast
regions. Figure 1 shows the block
diagram of the CXA2060AS.
Built-in 1H Delay Line and
SECAM Decoder
The CXA2060AS includes an on-chip
1H delay line and an on-chip SECAM
decoder. While earlier products such as
the CXA2000Q required an external 1H
delay line for PAL and an external
SECAM decoder for SECAM, by including these circuits on chip, the
CXA2060AS allows the same circuit to
provide the different types of signal processing required by NTSC, PAL, and
SECAM. This allows the same chassis
to be used for all reception areas, including NTSC-only areas, PAL/SECAM
areas, and NTSC/PAL-M/PAL-N areas.
Reduced Peripheral
Components Count
■ Reduced peripheral components
count
■ On-chip 1H delay line
■ On-chip SECAM decoder
■ On-chip video switch
■ Three crystal oscillator pin sets
for PAL-M and PAL-N support
■ The CXA2060AS and CXA2061S
are pin compatible.
this single chip can completely support
all aspects of a color system.
Vertical Deployment
from the Low End to the
High End
Since these chips also provide Y and
color difference signal input/output, a
feature block can be added. Since an fsc
output is provided, a digital comb filter
can be used. Thus these chips support
flexible deployment in higher grade
television systems. The CXA2060AS
and the CXA2061S not only aim for
extensive and complete television
functionality, but also promise the
achievement of a common chassis
worldwide.
Figure 2 presents a sample application
circuit. In addition to the components
VOICE
We are finally seeing the debut
of single-chip support for multiformat systems! We performed
extensive field testing in developing this IC, looking for signals
that are difficult to receive in all
corners of the world. As a result,
this IC achieves the best
SECAM discrimination performance of the century! Sony’s
engineers strongly recommend
that you try this IC.
used in this system, a video switch, a
1H delay line, and a SECAM decoder
would be required to construct the same
system using earlier products. The
CXA2060AS includes these devices on
chip. (The CXA2061S only includes the
video switch on chip.) Since a high-performance sync separator system for the
input signal is fully included on chip,
no separate sync separator circuit input
signal is required. Additionally, the
sample-and-hold capacitor for the autocutoff circuit (AKB) is built in, and capacitors and an oscillator element are
not required for the H/V oscillator. Thus
APCFIL48XTAL147XTAL244V
45
APC
<HUE>
ACC Det.
Chroma
Amp.
BPF
PAL: 4.43MHz
NTSC: 3.58MHz
<C BPF>
ACC Amp. (SECAM ACC Det.)
Chroma
Chroma SW
43TV/C2IN
2C1IN
41CVBS2/Y2IN
Y SW
4CVBS1/Y1IN
Monitor SW
7COMB CIN
9COMB YIN
(Video SW)
<VIDEO SEL>
6MON OUT
<S SEL>
XTAL3
(FSC OUT)
46
CVCO FSC OUT
4.433619MHz <FSC SW>
3.579545MHz
3.575611MHz
3.582056MHz
Color System Discriminator
<XTAL> <ID LEVEL>
<COL SYSTEM>
<COL LOOP> <<KILLER ID OFF>>
<NO COLOR> <<PAL>>
<ID STOP> <<SECAM>>
<ID START> <<XTAL ID>>
Bell
Filter
<BELL F0>
Y
ATT
V Sync Sep.
<VSS>
H Sync Sep.
<HSS>
<HMASK>
<<RF LEVEL>>
PLL
LIM
SECAM
Amp.
FM Demod.
Trap
PAL : 4.43MHz
NTSC : 3.58MHz
SECAM : 4.2 + 4.43MHz
<TRAP OFF>
CC2
GND28Y CLAMP1APED
40
PAL/NTSC
PAL/NTSC
Demod.
Filter Alignment
Count Down Line Counter
<FIELD FREQ> <V UNDER SCAN>
<CD MODE> <<FIELD ID>>
<INTERLACE> <<NO VSYNC>>
<AFC GAIN>
<FH HIGH>
<<HLOCK>>
<<HCENT>>
CAL. by fxc
AFC
SECAM
Line BLK
De-
emphasis
SECAM
VCO
CAL by
4.43MHz
DL
PAL/NTSC
300 ± 100ns
SECAM
600 ± 200ns
<Y DELAY>
V TIM Gen.
HSAW Gen.
<HOSC>
20
AFCFIL
SW
NTSC, PAL/
SECAM
Killer
<KILLER OFF>
1H
Delay Line
DPIC
<DPIC>
<AGING>
Clamp
DC TRAN
<DC TRAN>
Sharpness DL
Sharpness Amp.
<SHARPNESS>
<SHP F0>
<PRE/OVER>
VSAW Gen.
(50/60)
VTIM
<VTIM SEL>
H TIM Gen.
<H BLK>
<LEFT HBLK>
<RIGHT HBLK>
17
SCP
VMOUT/VPROT
EBYIN38ERYIN37EYIN36YUVSW28R1IN27G1IN26B1IN25YSI32R2IN (YOUT)
15
39
EYUV Clamp
YUV SW
<Y SEL>
YUVOUT
VPROT
<<VNG>>
VM Amp.
(OFF YS/YM)
Wide Saw Func.
<ASPECT>
<SCROLL>
<UPPER VLIN>
<LOWER VLIN>
<V ZOOM>
<V UNDER SCAN>
Phase Det.
<H POSITION>
<AFC BOW>
<AFC ANGLE>
HPROT
<<HNG>>
5
VTIM
<YUV OUT>
Color Amp.
<COLOR>
<C OFF>
Axis
<AXIS PAL>
<AXIS NTSC>
Y/C Mix.
RGB Clamp
18
HP/HPROT
Clamp
RGB 1/2
YM SW
YSI SW
YS2 SW
<RGB SEL>
Dynamic Color
DAC <*1>
SW <*1>
VD SAW Func.
<VON> <S CORRECTION>
<V SIZE> <V LINEARITY>
<V POSITION> <EHT COMP>
EW Parabola Func.
<H SIZE> <TRAPEZIUM>
<PIN AMP> <EW DC>
<CORNERPIN>
HD Gen.
<HD W>
19
HD
*1: Including all control signals enclosed in single angle brackets ( <...> ).
*2: Including all status signals enclosed in double angle brackets ( <<...>> ).
31
ABL/Peak ABL
<ABL MODE>
<ABL VTH>
<GAMMA>
<PICTURE>
Picture Amp.
Gamma Amp.
<DYNAMIC C>
IREF REG
10
12
GND1
G2IN (R-YOUT)
B2IN (B-YOUT)
YS2/YM
30
29
AKB
<<IKR>>
Clamp
<BRIGHT>
Drive Amp.
Bright Cont.
Cutoff Cont.
<R/G/B DRIVE>
<R/G/B CUTOFF>
I2C bus
Decoder
Status I/F
<<*2>>
16
33
CC1
V
REG
IREF
<PON>
R/G/B BLK
<R/G/B ON>
42 ABLFIL
3 ABLIN
21 IKIN
24 BOUT
23 GOUT
22 ROUT
35 SDA
34 SCL
14 VDN
13 VDP
11 EW
■ Figure 1 CXA2060AS Block Diagram
1µ
1
APED
0.01µ
2
0.1µ
1µ
10k
10µ
0.1µ
1µ
12k
C1 IN
3
ABL IN
4
CVBS1/Y1 IN
5
VTIM
6
MON.OUT
7
COMB C IN
8
Y CLAMP
9
COMB Y IN
10
GND1
11
EW
12
I REF
13
VD+
14
VD–
15
VM OUT/VPROT
16
REG
17
SCP
18
HP/PROTECT
19
HD
20
AFC FIL
21
IK IN
22
R OUT
23
G OUT
24
B OUT
CVBS/S Input 1
V Timing Output
Monitor Output
V Parabola Output
V Drive Output
VM Output
V Protection Input
SCP Output
Flyback Pulse Input
X-ray Protection Input
H Drive Output
C Board
ABL Input
Glass
Comb
2.2k
10k
0.1µ
Filter
1k
1µ
4700p
Vth≈5V
XTAL1
XTAL2
XTAL3
APC FIL
CC2
V
TV/C2 IN
ABL FIL
CVBS2/Y2 IN
GND2
EB-Y IN
ER-Y IN
EY IN
YUV SW
SDA
SCL
CC1
V
R2 IN
G2 IN
B2 IN
YS2/YM
R1 IN
G1 IN
B1 IN
YS1
18p
48
18p
47
18p
46
45
44
43
1µ
42
1µ
41
40
0.01µ
39
0.01µ
38
0.01µ
37
4.7µ
220p
0.1µ
10k 0.22µ
CVBS from Tuner Input
CVBS/S 2 Input
External YUV Input
PAL/SECAM/NTSC:
XTAL1: 4.43361875MHz
XTAL2: 3.579545MHz
XTAL3: Open or FSC Output
PAL-M/NTSC/PAL-N:
XTAL1: 3.57561149MHz
XTAL2: 3.579545MHz
XTAL3: 3.58205625MHz
Note: In the CXA2061S, Pins 46
and 48 are unused and must
be left open.
36
35
34
33
32
31
30
29
28
27
26
25
47µ
0.1µ
0.01µ
0.01µ
0.01µ
0.01µ
0.01µ
0.01µ
I2C
V
CC
+ 9V
External RGB Input 2
(for OSD/TEXT)
External RGB Input 1
(for SCART)
■ Figure 2 CXA2060AS/CXA2061S Application Circuit Example