SMSC USB97C202 Technical data
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USB97C202
USB 2.0
ATA/ ATAPI Controller
Datasheet
Product Features
2.5 Volt, Low Power Core Operation
3.3 Volt I/O with 5V input tolerance
Complete USB Specification 2.0 Compatibility
− Includes USB 2.0 Transceiver
− A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
Complete System Solution for interfacing ATA or
ATAPI devices to USB 2.0 bus
− Supports USB Mass Storage Compliant Bootable
BIOS
− Supports ATA6 Drive capacities up to 2048GB
− True UDMA Mode 4 transfer rates
− Support for ATAPI Devices:
- CD-ROM
- CD-R
- CD-RW
- DVD
- DVD/R/W
8051 8 bit microprocessor
− Provides low speed control functions
− 30 Mhz execution speed at 4 cycles per instruction
average
− 768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-flashing
external ROM
Double Buffered Bulk Endpoint
− Bi-directional 512 Byte Buffer for Bulk Endpoint
− 64 Byte RX Control Endpoint Buffer
− 64 Byte TX Control Endpoint Buffer
Internal or External Program Memory Interface
− 48K Byte Internal ROM or optional 64K Byte
External Code Space using Flash, SRAM, or
EPROM Memory
On Board 12Mhz Crystal Driver Circuit
Internal PLL for 480Mhz USB2.0 Sampling,
30Mhz MCU clock, and 60Mhz ATA clock
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used for optional
external program memory
7 GPIOs for special function use: LED indicators,
button inputs, etc.
− Inputs capable of generating interrupts with either
edge sensitivity
− USB High Speed LED
− Serial EEPROM interface for VID/PID/Serial Number
Customization
100 Pin STQFP (12x12x1.4 body, 2mm footprint)
package
ORDERING INFORMATION
Order Number(s):
USB97C202-MN-02 for 100 pin STQFP package
SMSC USB97C202 Page 1 Revision 1.2 (02-04-04)
DATASHEET
USB 2.0 ATA/ATAPI Controller
Datasheet
Hauppauge, NY 11788
(631) 435-6000
FAX (631) 273-3123
80 Arkay Drive
Copyright © SMSC 2004. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete
information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no
responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without
notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information
does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of
SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's
standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or
errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon
request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure
could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC
and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms
of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems
Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND
ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE.
IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES;
OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON
CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR
NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
SMSC USB97C202 Page 2 Revision 1.2 (02-04-04)
DATASHEET
USB 2.0 ATA/ATAPI Controller
Datasheet
TABLE OF CONTENTS
CHAPTER 1 GENERAL DESCRIPTION................................................................................................................4
CHAPTER 2 PIN TABLE........................................................................................................................................5
CHAPTER 3 PIN CONFIGURATION .....................................................................................................................6
CHAPTER 4 BLOCK DIAGRAM............................................................................................................................7
CHAPTER 5 PIN DESCRIPTIONS.........................................................................................................................8
5.1 Buffer Type Descriptions................................................................................................................ 11
CHAPTER 6 TYPICAL APPLICATION ................................................................................................................12
CHAPTER 7 DC PARAMETERS .........................................................................................................................13
7.1 Maximum Guaranteed Ratings ......................................................................................................13
7.1.1 Capacitance TA = 25°C; FC = 1MHz; VDD = 2.5V...................................................................... 15
CHAPTER 8 AC SPECIFICATIONS ....................................................................................................................16
8.1 ATA/ATAPI .....................................................................................................................................16
8.2 USB2.0 Timing ...............................................................................................................................16
CHAPTER 9 PACKAGE OUTLINE......................................................................................................................17
LIST OF FIGURES
Figure 3.1 – 100 PIN STQFP .........................................................................................................................................6
Figure 9.1 - 100 Pin STQFP Package Outline, 12x12x1.4 Body, 2MM Footprint (Rev A)............................................17
LIST OF TABLES
Table 5.1 – USB97C202 Pin Descriptions......................................................................................................................8
Table 5.2 - USB97C202 Buffer Type Descriptions .......................................................................................................11
Table 7.1 - DC Electrical Characteristics .......................................................................................................................13
Table 9.1 – 100 Pin STQFP Package Parameters (Rev A)..........................................................................................17
SMSC USB97C202 Page 3 Revision 1.2 (02-04-04)
DATASHEET
Chapter 1 General Description
The USB97C202 is a USB2.0 Mass Storage Class Peripheral Controller intended for use with standard
ATA-5 and -6 hard drives and standard ATAPI-5 devices.
The device consists of a USB 2.0 PHY and SIE, buffers, Fast 8051 microprocessor with expanded
scratchpad and 768 of program SRAM, internal 48 KB program ROM, and an ATA-66 compatible
interface.
Provisions for optional external Flash Memory up to 64K bytes for program storage is provided. A serial
EEPROM which can be modified via USB from the host provides unique VID/PID/Serial numbers, as well
as optional configuration information.
Internal 768 Bytes of scratchpad SRAM are also provided.. This internal SRAM can also be used for
program storage to implement program upgrade via USB download to external “boot block” Flash program
memory, if desired.
Seven GPIO pins are provided for controlling external power control elements and sensing specialized
drive functions. Provisions are made to allow dynamic attach and re-attach to the USB bus to allow hot
swap of drives to be implemented.
USB 2.0 ATA/ATAPI Controller
Datasheet
ATA-6 HDD or
ATAPI-5 Optical drive
USB2.0
BUS
USB97C202
Serial EEPROM
(VID/PID/options)
ATA-66
HS Indicator
SMSC USB97C202 Page 4 Revision 1.2 (02-04-04)
DATASHEET
USB 2.0 ATA/ATAPI Controller
Datasheet
Chapter 2 Pin Table
DISK DRIVE INTERFACE (27 Pins)
IDE_D0 IDE_D1 IDE_D2 IDE_D3
IDE_D4 IDE_D5 IDE_D6 IDE_D7
IDE_D8 IDE_D9 IDE_D10 IDE_D11
IDE_D12 IDE_D13 IDE_D14 IDE_D15
IDE_nIOR IDE_nIOW IDE_IRQ IDE_DACK
IDE_DRQ IDE_nCS0 IDE_nCS1 IDE_SA0
IDE_SA1 IDE_SA2 IORDY
USB INTERFACE (7 Pins)
USBD+ USBD- LOOPFLTR RBIAS
RTERM FS+ FS-
MEMORY/IO INTERFACE (28 Pins)
MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
MA0 MA1 MA2 MA3
MA4 MA5 MA6 MA7
MA8 MA9 MA10 MA11
MA12 MA13 MA14 MA15
nMRD nIOR nMWR nIOW
ROMEN GPIO1/HS GPIO2/EE_CS GPIO3/VBUS
GPIO4/EE_DIO GPIO5/ATA RESET GPIO6/A16 GPIO7/EE_CLK
XTAL1/CLKIN XTAL2 nRESET nTEST/nDBGSTR
TST_OUT/DBGOUT nTESTEN CLKOUT
POWER, GROUNDS, and NO CONNECTS (23 Pins)
MISC (15 Pins)
SMSC USB97C202 Page 5 Revision 1.2 (02-04-04)
DATASHEET
Chapter 3 Pin Configuration
ROMEN
GPIO1
GPIO2
GPIO3
GND
GPIO4
GPIO5
GPIO6
GPIO7
nTEST0
nTEST1
nTEST2
VDDIO
IDE_D8
IDE_D7
IDE_D9
VDD
IDE_D6
IDE_D10
GND
IDE_D5
USB 2.0 ATA/ATAPI Controller
Datasheet
IDE_D11
IDE_D4
VDDIO
IDE_D12
RBIAS
VDDA
FS+
USB+
USB-
FS-
RTERM
VSSA
XTAL1/CLKIN
XTAL2
VSSP
LOOPFLTR
VDDP
N.C.
N.C.
MD7
MD6
MD5
MD4
GND
MD3
MD2
MD1
MD0
nRESET
75
51
IDE_D3
IDE_D13
IDE_D2
GND
IDE_D14
IDE_D1
IDE_D15
IDE_D0
VDDIO
IDE_DRQ
IDE_nIOW
IDE_nIOR
USB97C202
1
25
IORDY
GND
IDE_DACK
IDE_IRQ
IDE_SA1
IDE_SA0
VDD
IDE_SA2
IDE_nCS0
IDE_nCS1
VDDIO
nMWR
nMRD
nIOR
nIOW
MA9
MA8
VDD
GND
MA15
MA14
MA13
MA12
MA11
VDDIO
CLKOUT
MA10
MA7
VDDIO
N.C.
MA6
MA5
MA4
MA3
MA2
MA1
MA0
GND
Figure 3.1 – 100 PIN STQFP
SMSC USB97C202 Page 6 Revision 1.2 (02-04-04)
DATASHEET
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