Desktop PCs
Notebook PCs
Printers
Game Consoles
Embedded Systems
Docking Stations
Key Benefits
USB Hub
— Fully compliant with Universal Serial Bus Specification
Revision 2.0
— HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps)
compatible
— Four downstream ports, one upstream port
— Port mapping and disable support
— Port Swap: Programmable USB diff-pair pin location
— PHY Boost: Programmable USB signal drive strength
— Select presence of a permanently hardwired USB
peripheral device on a port by port basis
— Advanced power saving features
— Downstream PHY goes into low power mode when port
power to the port is disabled
— Full Power Management with individual or ganged
power control of each downstream port.
— Integrated USB termination Pull-up/Pull-down resistors
— Internal short circuit protection of USB differential signal
pins
SMSC LAN9514Revision 1.0 (04-20-09)
High-Performance 10/100 Ethernet Controller
— Fully compliant with IEEE802.3/802.3u
— Integrated Ethernet MAC and PHY
— 10BASE-T and 100BASE-TX support
— Full- and half-duplex support with flow control
— Preamble generation and removal
— Automatic 32-bit CRC generation and checking
— Automatic payload padding and pad removal
— Loop-back modes
— TCP/UDP checksum offload support
— Flexible address filtering modes
– One 48-bit perfect address
– 64 hash-filtered multicast addresses
– Pass all multicast
– Promiscuous mode
– Inverse filtering
– Pass all incoming with status report
— Wakeup packet support
— Integrated Ethernet PHY
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.0 (04-20-09)2SMSC LAN9514
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
1.1.1Overview
Figure 1.1 Internal Block Diagram
The LAN9514 is a high performance Hi-Speed USB 2.0 hub with a 10/100 Ethernet controller. With
applications ranging from embedded systems, desktop PCs, notebook PCs, printers, game consoles,
and docking stations, the LAN9514 is targeted as a high performance, low cost USB/Ethernet and
USB/USB connectivity solution.
The LAN9514 contains an integrated USB 2.0 hub, four integrated downstream USB 2.0 PHYs, an
integrated upstream USB 2.0 PHY, a 10/100 Ethernet PHY, a 10/100 Ethernet Controller, a TAP
controller, and a EEPROM controller. A block diagram of the LAN9514 is provided in Figure 1.1.
The LAN9514 hub provides over 30 programmable features, including:
PortMap (also referred to as port remap) which provides flexible port mapping and disabling
sequences. The downstream ports of the LAN9514 hub can be reordered or disabled in any sequence
to support multiple platform designs’ with minimum effort. For any port that is disabled, the LAN9514
automatically reorders the remaining ports to match the USB host controller’s port numbering scheme.
PortSwap which adds per-port programmability to USB differential-pair pin locations. PortSwap allows
direct alignment of USB signals (D+/D-) to connectors avoiding uneven trace length or crossing of the
USB differential signals on the PCB.
PHYBoost which enables four programmable levels of USB signal drive strength in USB port
transceivers. PHYBoost attempts to restore USB signal integrity that has been compromised by system
level variables such as poor PCB layout, long cables, etc..
Revision 1.0 (04-20-09)6SMSC LAN9514
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
1.1.2USB Hub
The integrated USB hub is fully compliant with the USB 2.0 Specification and will attach to a USB host
as a Full-Speed Hub or as a Full-/High-Speed Hub. The hub supports Low-Speed, Full-Speed, and
High-Speed (if operating as a High-Speed hub) downstream devices on all of the enabled downstream
ports.
A dedicated Transaction Translator (TT) is available for each downstream facing port. This architecture
ensures maximum USB throughput for each connected device when operating with mixed-speed
peripherals.
The hub works with an external USB power distributed switch device to control V
downstream ports, and to limit current and sense over-current conditions.
All required resistors on the USB ports are integrated into the hub. This includes all series termination
resistors on D+ and D- pins and all required pull-down and pull-up resistors on D+ and D- pins. The
over-current sense inputs for the downstream facing ports have internal pull-up resistors.
Four external ports are available for general USB device connectivity.
1.1.3Ethernet Controller
The 10/100 Ethernet controller provides an integrated Ethernet MAC and PHY which are fully IEEE
802.3 10BASE-T and 802.3u 100BASE-TX compliant. The 10/100 Ethernet controller also supports
numerous power management wakeup features, including “Magic Packet”, “Wake on LAN” and “Link
Status Change”. These wakeup events can be programmed to initiate a USB remote wakeup.
The 10/100 Ethernet PHY integrates an IEEE 802.3 physical layer for twisted pair Ethernet
applications. The PHY block includes support for auto-negotiation, full or half-duplex configuration,
auto-polarity correction and Auto-MDIX. Minimal external components are required for the utilization of
the integrated PHY.
The Ethernet controller implements four USB endpoints: Control, Interrupt, Bulk-in, and Bulk-out. The
Bulk-in and Bulk-out Endpoints allow for Ethernet reception and transmission respectively.
Implementation of vendor-specific commands allows for efficient statistics gathering and access to the
Ethernet controller’s system control and status registers.
1.1.4EEPROM Controller
switching to
BUS
The LAN9514 contains an EEPROM controller for connection to an external EEPROM. This allows for
the automatic loading of static configuration data upon power-on reset, pin reset, or software reset.
The EEPROM can be configured to load USB descriptors, USB device configuration, and the MAC
address.
1.1.5Peripherals
The LAN9514 also contains a TAP controller, and provides three PHY LED indicators, as well as eight
general purpose I/O pins. All GPIOs can serve as remote wakeup events when LAN9514 is in a
suspended state.
The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG.
1.1.6Power Management
The LAN9514 features three variations of USB suspend: SUSPEND0, SUSPEND1, and SUSPEND2.
These modes allow the application to select the ideal balance of remote wakeup functionality and
power consumption.
SUSPEND0: Supports GPIO, “Wake On LAN”, and “Magic Packet” remote wakeup events. This
suspend state reduces power by stopping the clocks of the MAC and other internal modules.
SMSC LAN95147Revision 1.0 (04-20-09)
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
SUSPEND1: Supports GPIO and “Link Status Change” for remote wakeup events. This suspend
state consumes less power than SUSPEND0.
SUSPEND2: Supports only GPIO assertion for a remote wakeup event. This is the default suspend
mode for the LAN9514.
Revision 1.0 (04-20-09)8SMSC LAN9514
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
NOTE: Exposed pad (VSS) on bottom of package must be connected to ground
NOTE: When HP Auto-MDIX is activated, the TXN/TXP pins can function as RXN/RXP and vice-versa
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
NUM
PINSNAMESYMBOL
EEPROM Data
1
1
1
1
NUM
PINSNAMESYMBOL
1
1
In
EEPROM Data
Out
EEPROM Chip
Select
EEPROM ClockEECLKO8This pin drives the EEPROM clock of the external
JTAG Test Port
Reset
JTAG Test
Mode Select
EEDIIS
EEDOO8This pin drives the EEDI input of the external
EECSO8This pin drives the chip select output of the external
nTRSTISThis active low pin functions as the JTAG test port
TMSISThis pin functions as the JTAG test mode select.
BUFFER
TYPEDESCRIPTION
This pin is driven by the EEDO output of the
(PD)
Table 2.2 JTAG Pins
BUFFER
TYPEDESCRIPTION
external EEPROM.
EEPROM.
EEPROM.
EEPROM.
reset input.
Note:This pin should be tied high if it is not
used.
JTAG Test Data
1
1
1
NUM
PINSNAMESYMBOL
1
1
Input
JTAG Test Data
Out
JTAG Test
Clock
System ResetnRESETISThis active low pin allows external hardware to
Ethernet
Full-Duplex
Indicator LED
General
Purpose I/O 0
TDIISThis pin functions as the JTAG data input.
TDOO12This pin functions as the JTAG data output.
TCKISThis pin functions as the JTAG test clock. The
nFDX_LEDOD12
GPIO0IS/O12/
maximum operating frequency of this clock is
25MHz.
Table 2.3 Miscellaneous Pins
BUFFER
TYPEDESCRIPTION
reset the device.
Note:This pin should be tied high if it is not
This pin is driven low (LED on) when the Ethernet
(PU)
OD12
(PU)
link is operating in full-duplex mode.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
used.
Revision 1.0 (04-20-09)10SMSC LAN9514
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
Table 2.3 Miscellaneous Pins (continued)
NUM
PINSNAMESYMBOL
Ethernet Link
Activity Indicator
1
Purpose I/O 1
Ethernet Speed
Indicator LED
1
Purpose I/O 2
1
Purpose I/O 3
LED
General
General
General
nLNKA_LEDOD12
GPIO1IS/O12/
nSPD_LEDOD12
GPIO2IS/O12/
GPIO3IS/O8/
BUFFER
TYPEDESCRIPTION
This pin is driven low (LED on) when a valid link is
(PU)
OD12
(PU)
(PU)
OD12
(PU)
OD8
(PU)
detected. This pin is pulsed high (LED off) for
80mS whenever transmit or receive activity is
detected. This pin is then driven low again for a
minimum of 80mS, after which time it will repeat
the process if TX or RX activity is detected.
Effectively, LED2 is activated solid for a link. When
transmit or receive activity is sensed, LED2 will
function as an activity indicator.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
This pin is driven low (LED on) when the Ethernet
operating speed is 100Mbs, or during autonegotiation. This pin is driven high during 10Mbs
operation, or during line isolation.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
1
1
1
1
1
1
General
Purpose I/O 4
General
Purpose I/O 5
General
Purpose I/O 6
General
Purpose I/O 7
Detect
Upstream
VBUS Power
Auto-MDIX
Enable
GPIO4IS/O8/
OD8
(PU)
GPIO5IS/O8/
OD8
(PU)
GPIO6IS/O8/
OD8
(PU)
GPIO7IS/O8/
OD8
(PU)
VBUS_DETIS_5VThis pin detects the state of the upstream bus
AUTOMDIX_ENISDetermines the default Auto-MDIX setting.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
This General Purpose I/O pin is fully programmable
as either a push-pull output, an open-drain output,
or a Schmitt-triggered input.
power. The Hub monitors VBUS_DET to determine
when to assert the USBDP0 pin's internal pull-up
resistor (signaling a connect event).
For bus powered hubs, this pin must be tied to
VDD33IO.
For self powered hubs, refer to the LAN9514
reference schematics.
0 = Auto-MDIX is disabled.
1 = Auto-MDIX is enabled.
1
SMSC LAN951411Revision 1.0 (04-20-09)
Test 1TEST1-Used for factory testing, this pin must always be left
unconnected.
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Table 2.3 Miscellaneous Pins (continued)
Datasheet
NUM
PINSNAMESYMBOL
1
1
1
1
1
NUM
PINSNAMESYMBOL
1
Test 2TEST2-Used for factory testing, this pin must always be
Test 3TEST3-Used for factory testing, this pin must always be
24 MHz Clock
Enable
24 MHz Clock CLK24_OUT08This pin outputs a 24 MHz clock that can be used
Test 4TEST4-Used for factory testing, this pin must always be left
Upstream
USB DMINUS 0
CLK24_ENISThis pin enables the generation of the 24 MHz
USBDM0AIOUpstream USB DMINUS signal.
BUFFER
TYPEDESCRIPTION
connected to VSS for proper operation.
connected to VDD33IO for proper operation.
clock on the CLK_24_OUT pin.
a reference clock for a partner hub.
unconnected.
Table 2.4 USB Pins
BUFFER
TYPEDESCRIPTION
1
1
USB DMINUS 2
1
USB DPLUS 2
1
USB DMINUS 3
1
USB DPLUS 3
1
USB DMINUS 4
1
USB DPLUS 4
1
USB DMINUS 5
1
USB DPLUS 5
Upstream
USB
DPLUS 0
Downstream
Downstream
Downstream
Downstream
Downstream
Downstream
Downstream
Downstream
USBDP0AIOUpstream USB DPLUS signal.
USBDM2AIODownstream USB peripheral 2 DMINUS signal.
USBDP2AIODownstream USB peripheral 2 DPLUS signal.
USBDM3AIODownstream USB peripheral 3 DMINUS signal.
USBDP3AIODownstream USB peripheral 3 DPLUS signal.
USBDM4AIODownstream USB peripheral 4 DMINUS signal.
USBDP4AIODownstream USB peripheral 4 DPLUS signal.
USBDM5AIODownstream USB peripheral 5 DMINUS signal.
USBDP5AIODownstream USB peripheral 5 DPLUS signal.
Revision 1.0 (04-20-09)12SMSC LAN9514
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
Table 2.4 USB Pins (continued)
NUM
PINSNAMESYMBOL
USB Port Power
Control 2
1
USB Port Power
Control 3
1
USB Port Power
Control 4
1
PRTCTL2IS/OD12
PRTCTL3IS/OD12
PRTCTL4IS/OD12
BUFFER
TYPEDESCRIPTION
When used as an output, this pin enables power to
(PU)
(PU)
(PU)
downstream USB peripheral 2.
When used as an input, this pin is used to sample
the output signal from an external current monitor
for downstream USB peripheral 2. An overcurrent
condition is indicated when the signal is low.
Refer to Section 2.1 for additional information.
When used as an output, this pin enables power to
downstream USB peripheral 3.
When used as an input, this pin is used to sample
the output signal from an external current monitor
for downstream USB peripheral 3. An overcurrent
condition is indicated when the signal is low.
Refer to Section 2.1 for additional information.
When used as an output, this pin enables power to
downstream USB peripheral 4.
When used as an input, this pin is used to sample
the output signal from an external current monitor
for downstream USB peripheral 4. An overcurrent
condition is indicated when the signal is low.
USBRBIASAIUsed for setting HS transmit current level and on-
VDD18USBPLLPRefer to the LAN9514 reference schematics for
When used as an output, this pin enables power to
downstream USB peripheral 5.
When used as an input, this pin is used to sample
the output signal from an external current monitor
for downstream USB peripheral 5. An overcurrent
condition is indicated when the signal is low.
Refer to Section 2.1 for additional information.
chip termination impedance. Connect to an
external 12K 1.0% resistor to ground.
additional connection information.
Note:This pin can also be driven by a single-
ended clock oscillator. When this method
is used, XO should be left unconnected
SMSC LAN951413Revision 1.0 (04-20-09)
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Table 2.5 Ethernet PHY Pins
Datasheet
NUM
PINSNAMESYMBOL
1
1
1
1
Data In Positive
7
1
1
+3.3V Analog
Power Supply
External PHY
Ethernet TX
Data Out
Negative
Ethernet TX
Data Out
Positive
Ethernet RX
Data In
Negative
Ethernet RX
Bias Resistor
Ethernet PLL
+1.8V Power
Supply
TXNAIONegative output of the Ethernet transmitter. The
TXPAIOPositive output of the Ethernet transmitter. The
RXNAIONegative input of the Ethernet receiver. The receive
RXPAIOPositive input of the Ethernet receiver. The receive
VDD33APRefer to the LAN9514 reference schematics for
EXRESAIUsed for the internal bias circuits. Connect to an
VDD18ETHPLLPRefer to the LAN9514 reference schematics for
BUFFER
TYPEDESCRIPTION
transmit data outputs may be swapped internally
with receive data inputs when Auto-MDIX is
enabled.
transmit data outputs may be swapped internally
with receive data inputs when Auto-MDIX is
enabled.
data inputs may be swapped internally with
transmit data outputs when Auto-MDIX is enabled.
data inputs may be swapped internally with
transmit data outputs when Auto-MDIX is enabled.
connection information.
external 12.4K 1.0% resistor to ground.
additional connection information.
Table 2.6 I/O Power Pins, Core Power Pins, and Ground Pad
NUM
PINSNAMESYMBOL
5
2
1
Note
2.1
+3.3V I/O
Power
Digital Core
+1.8V Power
Supply Output
GroundVSSPGround
Note 2.1Exposed pad on package bottom (Figure 2.1).
VDD33IOP+3.3V Power Supply for I/O Pins.
VDD18COREP+1.8 V power from the internal core voltage
BUFFER
TYPEDESCRIPTION
Refer to the LAN9514 reference schematics for
connection information.
regulator. All VDD18CORE pins must be tied
together for proper operation.
Refer to the LAN9514 reference schematics for
connection information.
Revision 1.0 (04-20-09)14SMSC LAN9514
DATASHEET
USB Hub with Integrated 10/100 Ethernet Controller
Datasheet
Table 2.7 64-QFN Package Pin Assignments
PIN
NUMPIN NAME
1USBDM217PRTCTL433VDD33IO49VDD33A
2USBDP218PRTCTL534TEST250EXRES
3USBDM319VDD33IO35GPIO351VDD33A
4USBDP320nFDX_LED/
5VDD33A21nLNKA_LED/
6USBDM422nSPD_LED/
7USBDP423EECLK39VDD33IO55TXP
8USBDM524EECS40TEST356TXN
9USBDP525EEDO41AUTOMDIX_EN57VDD33A
10VDD33A26EEDI42GPIO658USBDM0
11VBUS_DET27VDD33IO43GPIO759USBDP0
12nRESET28nTRST44 CLK24_EN 60XO
PIN
NUMPIN NAME
GPIO0
GPIO1
GPIO2
PIN
NUMPIN NAME
36GPIO452RXP
37GPIO553RXN
38VDD18CORE54VDD33A
PIN
NUMPIN NAME
13TEST129TMS45CLK24_OUT61XI
14PRTCTL230TDI46VDD33IO62VDD18USBPLL
15VDD18CORE31TDO47TEST463USBRBIAS
16PRTCTL332TCK48VDD18ETHPLL64VDD33A
MUST BE CONNECTED TO VSS
EXPOSED PAD
SMSC LAN951415Revision 1.0 (04-20-09)
DATASHEET
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