SMSC EVB-USB3340 User Manual

EVB-USB3340 USB Transceiver

Evaluation Board User Manual

Copyright © 2010 SMSC or its subsidiaries. All rights reserved.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information
sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed
for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office
to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor
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and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement").
The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly
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SMSC USB3340 EVB USER MANUAL Revision 1.1 (12-14-10)

1 Introduction

This user manual is for the USB3340 USB Transceiver Evaluation Board (EVB) for use with USB3340
products with the integrated USB switch.

The USB3340 features a ULPI interface to support systems with USB Host, Device, or On-the-Go
(OTG) capability. The integrated switch can be used to multiplex a Full Speed USB signal or audio
signals over the HS USB DP/DM pins.

2 Overview

The USB3340 EVB is a Daughter Card designed to plug into a user's test system using a T&MT
connector. The card attaches to a USB link layer to create a USB Host, Device, or On-the-Go (OTG)
system. The board edge connector meets the UTMI+ Low Pin Interface (ULPI) Standard requirements
for the T&MT connector.

A link to the ULPI Working Group Page is available at www.smsc.com or may be obtained from your
local FAE. The USB3340 EVB includes USB3340 packaged silicon and all external components
required for the USB transceiver function.

This manual describes PCB assembly PCB-7220AZ.

EVB-USB3340 USB Transceiver Evaluation Board User Manual

2.1 Supplying VBUS Voltage

In Host or OTG operation, the USB3340 EVB must provide 5 Volts on V
USB3340 EVB includes a switch that can drive V
of the T&MT connector.

The VBUS switch is controlled by the CPEN signal from the USB3340. The USB controller dictates
the state of CPEN by programming the ULPI register in the USB3340. The 5 Volt switch is backdrive
protected when in the off state. The switch does not provide protection from reverse currents when it
is on. See Section 2.10 and Section 2.11 for more information on configuring the USB3340 EVB for
OTG and Host operation.

2.2 ULPI I/O Voltage

The USB3340 supports variable ULPI I/O voltage signaling. The ULPI I/O voltage is supplied in one
of two ways. By default, the EVB is shipped with VDDIO supplied by the on-board LDO.

Resistor R18 is used to set VDDIO, the digital logic high voltage. To change the value of VDDIO,
calculate a new value for R18 (ohms) as follows.

R18 = (VDDIO/1.225-1) x 169000

VDDIO must be in the range of 1.8 Volts - 3.3 Volts nominal.

VDDIO can also be supplied to the USB3340 from the T&MT connector instead of using the LDO. To
do this, the LDO (U10) must be removed.

at the USB connector. The

using the 5 Volt supply that comes from pin 28

BUS

BUS

The VDDIO voltage level that has been configured on the USB3340 EVB must be the same as the
ULPI I/O voltage level that the link is using.

Revision 1.1 (12-14-10) 2 SMSC USB3340 EVB

USER MANUAL

EVB-USB3340 USB Transceiver Evaluation Board User Manual

2.3 Edge Connector for Digital I/O

The T&MT edge connector is compliant to the ULPI specification. Part numbers and manufacturers for
this connector and it’s mate are given in Table 2.1.

Table 2.1 Edge Connector on the USB3340 EVB

PART NUMBER DESCRIPTION MANUFACTURER

2-557101-5 100 pin edge connector on USB3340 EVB AMP

2-557-101-5 Mating connector to the USB3340 EVB AMP

1-1734037-0 Alternate 100 pin edge connector for USB3340 EVB TYCO

1-1734099-0 Alternate mating connector to the USB3340 EVB TYCO

2.4 REFCLK Frequency Selection

The USB3340 EVB offers a user selectable reference clock frequency. R25 - R30 are used to configure
the REFCLK[2:0] signals which will select the reference clock frequency desired on the USB3340 EVB.
Ensure that the frequency of the reference clock or reference crystal being used matches the desired
operation frequency configured based on Table 2.2 below. By default, the USB3340 EVB is configured
for 26MHz REFCLK operation.

Table 2.2 Reference Frequency Selection Resistor Configurations

R25 R26 R27 R28 R29 R30 REFCLK FREQUENCY

INSTALL EMPTY INSTALL EMPTY EMPTY INSTALL 26.0 MHz (Default)

EMPTY INSTALL INSTALL EMPTY EMPTY INSTALL 12.0 MHz

EMPTY INSTALL EMPTY INSTALL EMPTY INSTALL 52.0 MHz

INSTALL EMPTY INSTALL EMPTY INSTALL EMPTY 24.0 MHz

INSTALL EMPTY EMPTY INSTALL INSTALL EMPTY 19.2 MHz

EMPTY INSTALL INSTALL EMPTY INSTALL EMPTY 27.0 MHz

EMPTY INSTALL EMPTY INSTALL INSTALL EMPTY 38.4 MHz

INSTALL EMPTY EMPTY INSTALL EMPTY INSTALL 13.0 MHz

2.5 USB Connector

A standard Mini-AB connector is provided to attach a USB cable or connector. Provision is made on
the PCB to accept a Micro-AB connector. See the bill of materials in Section 6 for connector part
numbers. Do not substitute a different part number for the Mini-AB receptacle or a short circuit of the
USB signals may result at the micro-AB connector PCB footprint.

2.6 VBUS Present Detection

The USB controller must detect VBUS when a USB cable is attached in device mode or when the USB
controller turns on VBUS in host or OTG mode. The USB connector VBUS signal is connected to the
VBUS pin of the USB3340. The USB3340 includes all of the comparators required to detect VBUS and
report the state of VBUS to the USB controller via the ULPI bus.

SMSC USB3340 EVB 3 Revision 1.1 (12-14-10)

USER MANUAL

EVB-USB3340 USB Transceiver Evaluation Board User Manual

2.7 ULPI Signal Test Points

Probe points at location J2, provide access to all ULPI signals. Install the Tektronix logic analyzer probe
retention kit at J2 to probe these signals. Ordering information for the retention kit is provided in the
bill of materials.

2.8 Other Signal Test Points

There are five other test points located on the board for easy access. TP1 connects to the 5V supply
coming from the T&MT connector. TP2 connects to the 3.3V VDD supply coming from the T&MT
connector. TP3 connects to Ground. TP4 and TP5 connect to the Speaker Left and Speaker Right pins
respectively.

2.9 Speaker Left and Speaker Right signals

The Speaker Left and Speaker Right pins can accept audio signals ranging from 0V to 3.3V. If the
audio signal coming into the test points goes below 0V, biasing circuitry is required. Install R11, R14,
R15, and R16 with 10k resistors to add a DC bias to the audio signal. This will ensure the best signal
quality when routing through the USB3340.

2.10 Converting the EVB to an OTG System

“Out of the box”, the USB3340 EVB is delivered as a USB Device system. To convert it to be a USB
OTG development board, the following modifications must be made:

1. Install R13 (zero ohm resistor). This connects the VBUS 5V switch to the VBUS signal.

2. Remove R23. This is the R

3. Install R10 (1.0K, 1W resistor). This is the R

Since the USB3340 is designed to accommodate up to 30V on VBUS, R10 is rated at 1W to
accommodate this entire voltage range. Refer to the USB3340 datasheet for more information on sizing
this resistor.

value required for a USB Device.

VBUS

value required for a USB OTG Device.

VBUS

2.11 Converting the EVB to a Host System

“Out of the box”, the USB3340 EVB is delivered as a USB Device System. To convert it to be a USB
Host development board, the following modifications must be made:

1. Install R13 (zero ohm resistor). This connects the VBUS 5V switch to the VBUS signal.

2. Install C24 (120uF capacitor). This increases the value of C

to be USB 2.0 Host compliant.

VBUS

2.12 Converting the EVB to Support ULPI Clock Input Mode

“Out of the box”, the USB3340 EVB uses a crystal (Y1) as the clock reference, and is configured for
ULPI Clock Output Mode where CLKOUT sources a 60MHz clock. To convert the EVB to support ULPI
Clock Input Mode, the following changes must be made:

1. Install R12 (zero ohm resistor). This shorts CLKOUT to VDD18.

2. Install R3 (zero ohm resistor). This shorts REFCLK to the System Clock pin on the T&MT
connector.

3. Confirm that R4 is not populated.

4. Remove the following components to remove the crystal circuit: Y1, R17, C22, C23

Refer to the USB3340 datasheet for more information on ULPI Clock Input Mode.

Revision 1.1 (12-14-10) 4 SMSC USB3340 EVB

USER MANUAL

EVB-USB3340 USB Transceiver Evaluation Board User Manual

2.13 T&MT Pin Description

The T&MT signal names, pin number and function are described in Table 43 and Table 44 of the ULPI
Specification rev 1.1.

The USB3340 EVB fully implements a ULPI compliant interface to the T&MT connector, including
support for ULPI Clock Input Mode. This EVB supports a 1.8-3.3V ULPI I/O voltages. All signals are
described in Table 2.3.

Table 2.3 T&MT Connector Pin Definitions

PIN NAME DESCRIPTION DIRECTION

86, 36,
85, 34,
83, 33,
82, 31

96 STP ULPI STP Signal INPUT TO

70 DIR ULPI DIR Signal OUTPUT

71 NXT ULPI NXT Signal OUTPUT

90 CLKOUT ULPI Clock Signal OUTPUT

55 VBUS_FAULT_N Driven low by the VBUS switch (U2) in the event of a

15 SPKR_L In USB Audio mode, SPKR_L is connected to the DP

45 SPKR_RM In USB Audio mode, SPKR_RM is connected to the

17 RESET Asserting RESET will place the USB3340 in a low

47 VBUS_IN This pin is not connected NO CONNECT

DATA[7:0]

Refer to Schematic for
Connector Pin Assignment

ULPI Data Bus IN/OUT

EVB

FROM EVB

FROM EVB

FROM EVB

OUTPUT

switch fault condition.

IN/OUT

pin via an analog switch in the USB3340.

IN/OUT

DP pin via an analog switch in the USB3340.

INPUT
power state. Upon exiting this state (RESET=0), all
ULPI registers will contain power-on reset values.

28 VBUS_OUT +5V from the T&MT connector INPUT TO

8,
16, 57,
69

52 SYSTEM_CLOCK Optional clock input to EVB. The EVB is built with the

100 PSU_SHD_N This pin is driven low indicating that +3.3V must be

49 DC_PSNT_N This pin is driven low indicating a daughter card is

SMSC USB3340 EVB 5 Revision 1.1 (12-14-10)

VDD +3.3V from the T&MT connector INPUT TO

USB3340 REFCLK provided by a crystal. See

Section 2.12 for more information on configuring the

USB3340 EVB for ULPI Clock Input mode.

sourced from the link through the T&MT connector
pins 8, 16, 57, 69 and +5.0V must be sourced from the
link through the T&MT connector pin 28.

present.

EVB

EVB

NO CONNECT

(input to EVB if

R3 is installed)

OUTPUT

FROM EVB

OUTPUT

FROM EVB

USER MANUAL

3 Getting Started

VBUS
Switch

ULPI Signals

VBUS

ID

DP

DM

J1

100-pin

T&MT

2.2uF

150uF

ONA

FAULTAn

VDD3.3

+5V

DP

DM

ID

ULPI Bus

GND

Install C20=150uF if host
operation is desired

RESETB

VDD1p8

VDD3p3

VBAT

1.0uF

1.8V

LDO

XI

EXT_VBUS_DET

USB3340

RESET

PCB can accept Micro-AB
Or Mini-AB receptacle

CPEN

XO

VDDIO

VARIABLE

VDDIO

REG

REFSEL[2:0]

USER
REFCLK
CONFIG

The block diagram in Figure 3.1 gives a simplified view of the USB3340 EVB. The USB3340 EVB is
ready for device operation. To modify the board for OTG or Host applications, refer to Section 2.10 or

Section 2.11, respectively.

It is required to provide +5V to T&MT connector pin 28 and +3.3V on T&MT pins 8,16,57,69 to power
the USB3340 EVB.

The USB3340 EVB is built with a USB Mini-AB receptacle. Do not substitute a Mini-AB receptacle
different from the one specified in the bill of materials, or a short circuit may occur on the USB signals
at the Micro-AB connector PCB footprint.

EVB-USB3340 USB Transceiver Evaluation Board User Manual

When the USB3340 EVB is powered on, check the following things to be certain the board is
functioning normally:

 RESET should be de-asserted (logic low at the T&MT connector and RESETB at the USB3340

Figure 3.1 Block Diagram of USB3340 EVB

should be logic high = VDD18). If RESETB=0, the USB3340 will be in a low power state.

 The voltage at R2 (RBIAS) should be 0.8V DC. If this voltage is not present, the USB3340 is in a

low power state.

 There should be a digital 60 MHz square wave signal at T&MT connector pin 90. The amplitude

should be approximately VDDIO. This is the CLKOUT signal of the USB3340.

Revision 1.1 (12-14-10) 6 SMSC USB3340 EVB

USER MANUAL

EVB-USB3340 USB Transceiver Evaluation Board User Manual

 The voltage at C3 should be approximately 3.3V. This is the USB3340 internal 3.3V voltage

regulator output.

 The voltage at C4 should be 1.8V. This is the 1.8V regulator output.

4 Protecting VBUS from Non-Compliant VBUS Voltages

The USB3340 is fully tolerant to VBUS voltages up to 30V. An external resistor on the VBUS line

) is required for the integrated overvoltage protection circuit in the USB3340. R

(R

VBUS

R10 or R23 on the USB3340 EVB. For peripheral and host applications, R
remove R10). For OTG applications, R

is 1K (install R10, remove R23).

VBUS

VBUS

is 10K (install R23,

VBUS

is either

SMSC USB3340 EVB 7 Revision 1.1 (12-14-10)

USER MANUAL

5 USB3340 EVB Schematic

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ULPI Testpoints

T&MT Connector

For host applications 120 uF to ground is required on

VBUS to comply with the USB2.0 specification.

DNP

USB3340 32-pin Evaluation Board

This portion of the schematic

shows components needed for

PHY to operate in a HS peripheral

application.

Host / OTG

Peripheral

R13

Zero Ohm

DNP

REFCLK

Source

110

010

26.0 MHz

12.0 MHz

52.0 MHz000

24.0 MHz111

19.2 MHz101

27.0 MHz011

38.4 MHz001

13.0 MHz100

REFSEL[2:0]

DNP

DNP

DNP

For OTG applications, R10 1K resistor should be installed.

For peripheral/host applications, R23 20K resistor should be installed.

DNP

DNP

DNPDNP

DNP

Schematic shows 26.0 MHz Configuration.

REFCLK[2:0] = 110

R18 = 78.7K VDDIO = 1.8 V

R18 = 107K VDDIO = 2.0 V

R18 = 178K VDDIO = 2.5 V

R18 = 243K VDDIO = 3.0 V

R18 = 287K VDDIO = 3.3 V

VDDIO Regulator

VBUS Switch

DNP

DNP

Oscillator Support

DNP

Crystal Support

DNP

DNP

DNP

DNP

DATA1

DATA0

DATA2

DATA3

DATA4

DATA5

DATA6

DATA7

NXT

DIR

RESETB

CPEN

VBUS_FAULT_N

CLKOUT

RESETB

DIR

NXT

STP

DATA1

DATA0

DATA2

DATA3

DATA4

DATA5

DATA6

DATA7

VBUS_FAULT_N

CPEN

VBUS

ID

CLKOUT

SPKR_L

DP

DM

STP

SPKR_RM

CPEN

RESETB

REFCLK

REFSEL1

REFSEL2

REFSEL0

REFSEL1

REFSEL0

REFSEL2

+5.0V

USBGND

REFCLK

XO

RESET

VBUS_FAULT_N

VBUS

USBGNDIDDM

DP

+3.3V

+3.3V

+3.3V

+3.3V

+5.0V

+5.0V

+5.0V

+3.3V

+3.3V

VDDIO

VDDIO

VDDIO VDDIO

VDDIO

VDDIO

VDDIO

Title

Size Document Number Rev

Date: Sheet

of

3930 East Ray Road

Suite 200

Phoenix, Arizona 85044

480-759-0200

SCH-7220AZ-A00 D

PCB7220: USB3340 Evaluation Board

C

11Thursday, April 01, 2010

Title

Size Document Number Rev

Date: Sheet

of

3930 East Ray Road

Suite 200

Phoenix, Arizona 85044

480-759-0200

SCH-7220AZ-A00 D

PCB7220: USB3340 Evaluation Board

C

11Thursday, April 01, 2010

Title

Size Document Number Rev

Date: Sheet

of

3930 East Ray Road

Suite 200

Phoenix, Arizona 85044

480-759-0200

SCH-7220AZ-A00 D

PCB7220: USB3340 Evaluation Board

C

11Thursday, April 01, 2010

C10

0.1uF

10V

C10

0.1uF

10V

GND

GND

Y1

26 MHz

GND

GND

Y1

26 MHz

1

2 3

4

C18

10uF

6.3VC18

10uF

6.3V

C22

22pF 50V

C22

22pF 50V

C4

1.0uF

6.3VC41.0uF

6.3V

R14

10.0k

1/16W

R14

10.0k

1/16W

P2

USB mini AB SMD

P2

USB mini AB SMD

VBUS1D+3D-2ID4GND5SHIELD16SHIELD27SHIELD38SHIELD4

9

R30

ZERO

1/16W

R30

ZERO

1/16W

R27

ZERO

1/16W

R27

ZERO

1/16W

J2

TEK_6960_CONN

DMJ2TEK_6960_CONN

DM

CK1+A7CK1--A8CK2+

B21

CK2--

B20

D0A1D1A2D2B2D3B3D4A4D5A5D6B5D7B6D8B8D9B9D10

A10

D11

A11

D12

B11

D13

B12

D14

A13

D15

A14

D16

B14

D17

B15

D18

A16

D19

A17

D20

B17

D21

B18

D22

A19

D23

A20

D24

A22

D25

A23

D26

B23

D27

B24

D28

A25

D29

A26

D30

B26

D31

B27

GND

B4

GND

B7

GND

B10

GND

B13

GND

A15

GND

A3

GND

B16

GND

A18

GND

A6

GND

B19

GND

A21

GND

A9

GND

B22

GND

A24

GND

A12

GND

B25

GND

A27

GND

B1

R10

1.0k 1W

R10

1.0k 1W

C13

0.1uF

10V

C13

0.1uF

10V

TP5

TEST_POINT

TP5

TEST_POINT

C14

1.0uF

16V

C14

1.0uF

16V

R33

27 1/16 W

R33

27 1/16 W

U1

USB33XX QFN32U1USB33XX QFN32

CLKOUT1NXT2DATA03DATA14DATA25DATA36DATA47REFSEL0

8

DATA5

9

DATA6

10

REFSEL1

11

NC

12

DATA7

13

REFSEL2

14

SPK_L

15

SPK_R

16

CPEN33

17

DP

18

DM

19

VDD33

20

VBAT

21

VBUS

22

ID

23

RBIAS

24

XO

25

REFCLK

26

RESETB

27

VDD18_1

28

STP

29

VDD18_2

30

DIR

31

VDDIO

32

FLAG

33

R23

20k 1/10W

R23

20k 1/10W

R7

27k

1/16WR727k

1/16W

TP1

TEST_POINT

TP1

TEST_POINT

C16

0.1uF

10V

C16

0.1uF

10V

R4

ZERO

1/16WR4ZERO

1/16W

R18

78.7k

1/16W

R18

78.7k

1/16W

C12

10uF

6.3V

C12

10uF

6.3V

R6

10.0k

1/16W

R6

10.0k

1/16W

R16

10.0k

1/16W

R16

10.0k

1/16W

U10

TPS77001DVBT

U10

TPS77001DVBT

Vout

5

FB

4

/EN3GND2Vin

1

R1

100k

1/10WR1100k

1/10W

P1

USB MICRO-ABP1USB MICRO-AB

VBUS1D-2D+3ID4GND5SHLD16SHLD27SHLD38SHLD49SHLD510SHLD6

11

TP2

TEST_POINT

TP2

TEST_POINT

C2

0.1uF

10VC20.1uF

10V

J1

AMP_UTMI+_ULPI

J1

AMP_UTMI+_ULPI

GND2GND

4

GPIO5

6

VDD

8

Reserved18

10

GPIO11

12

Reserved33

14

VDD

16

Reserved918Reserved820Reserved6

22

GND

24

GPIO1

26

VBUS_out

28

Reserved29

30

GND

32

DATA334DATA1

36

VIO

38

Reserved34

40

Reserved2442Reserved26

44

GND

46

Reserved14

48

GPIO13

50

System_Clock

52

GND

54

GPIO656GPIO8

58

Reserved1

60

GND

62

Reserved31

64

Reserved3

66

GND

68

DIR

70

Reserved472Reserved5

74

GND

76

GPIO14

78

GND

80

DATA6

82

GND

84

DATA0

86

Reserved21

88

Clk

90

GND

92

Reserved27

94

STP

96

Reserved13

98

PSU_SHD_N

100

GPIO01GPIO23GPIO45GPIO7

7

GND

9

GPIO9

11

GND

13

SPKR_L

15

Reset

17

Reserved7

19

GND

21

Reserved1223Reserved11

25

GND

27

GPIO3

29

DATA731DATA5

33

GND

35

Reserved20

37

GND

39

Reserved22

41

GND

43

SPKR_MIC

45

VBUS_in

47

DC_PSNT_N

49

GND51GND

53

Reserved15

55

VDD

57

Reserved17

59

GPIO1061GPIO12

63

GND

65

Reserved10

67

VDD

69

NXT

71

GND

73

Reserved2

75

Reserved32

77

Reserved19

79

VIO

81

DATA483DATA2

85

VIO

87

Reserved30

89

Reserved2391Reserved25

93

GND

95

Reserved1697Reserved28

99

+

C24

120uF+C24

120uF

R17

1M

1/10W

R17

1M

1/10W

R15

10.0k

1/16W

R15

10.0k

1/16W

U6

74LVC1G04U674LVC1G04

2 4531

C17

10uF

6.3VC17

10uF

6.3V

R13

ZERO

1/16W

R13

ZERO

1/16W

X1

26.0 MHzX126.0 MHz

VCC4OUT

3

EN1GND

2

R26

ZERO

1/16W

R26

ZERO

1/16W

C9

0.1uF

10VC90.1uF

10V

C11

0.1uF

10V

C11

0.1uF

10V

R28

ZERO

1/16W

R28

ZERO

1/16W

TP3

TEST_POINT

TP3

TEST_POINT

R29

ZERO

1/16W

R29

ZERO

1/16W

R2

8.06k 1/16WR28.06k 1/16W

C21

0.1uF

10V

C21

0.1uF

10V

U8

74LVC1G04U874LVC1G04

2 4531

R35

10.0 1/16W

R35

10.0 1/16W

R12

ZERO

1/16W

R12

ZERO

1/16W

C3

1.0uF

6.3VC31.0uF

6.3V

R5

10.0k

1/16WR510.0k

1/16W

R3

ZERO

1/16WR3ZERO

1/16W

C23

22pF 50V

C23

22pF 50V

C1

2.2uFC12.2uF

U2

MAX1823BU2MAX1823B

ONA1INA2IN3INB4ONB

5

FAULTB

6

OUTB

7

GND

8

OUTA

9

FAULTA

10

TP4

TEST_POINT

TP4

TEST_POINT

C8

0.1uF

10VC80.1uF

10V

R25

ZERO

1/16W

R25

ZERO

1/16W

R11

10.0k

1/16W

R11

10.0k

1/16W

R32

ZERO 1/4W

R32

ZERO 1/4W

R9

169k

1/16WR91

1/16W

R8

10.0k

1/16WR810.0k

1/16W

EVB-USB3340 USB Transceiver Evaluation Board User Manual

Revision 1.1 (12-14-10) 8 SMSC USB3340 EVB

Figure 5.1 USB3340 EVB Schematic

USER MANUAL

EVB-USB3340 USB Transceiver Evaluation Board User Manual

Item # Quantit

y

DNP Part Reference Description Digikey_Numbe

r

Manu

f

Manuf_PN RoHS

11

C1

CAPACITOR CERAMIC 2.2UF 50V Y5V 0805 445-3464-1-ND TDK C2012Y5V1H225Z Yes

28

C2 C8 C9 C10

C11 C13 C16

CAPACITOR CERAMIC 0.1UF 10V X5R 0402 PCC2146CT-ND PANASONIC ECJ-0EB1A104K Yes

32

C3 C4

CAPACITOR CERAMIC 1.0UF 6.3V 20% X5R 040 490-1319-1-ND MURATA ERIE GRM155R60J105ME19D Yes

43

C12 C17 C18

CAPACITOR CERAMIC 10UF 6.3VDC 20% X5R 08 PCC2225CT-ND PANASONIC ECJ-2FB0J106M Yes

51

C14

CAPACITOR CERAMIC 1.0UF 16VDC 10% X5R 06 PCC2224CT-ND PANASONIC ECJ-1VB1C105K Yes

62

C22 C23

CAPACITOR CERAMIC 22PF 5% 50V NP0 0402 478-1074-1-ND AVX 04025A220JAT2A Yes

70

C24

CAPACITOR AUMINUM ELEC 120UF 10V 565-3066-1-ND United Chemi-Con APXA100ARA121MH70G Yes

80

J1

AMP_T&MT_UTMI+_ULPI COMBO A33470-ND TYCO 1-1734037-0 Yes

90

J2

TEK_6960_CONN_DM TEKTRONIX P6960DM Yes

10 1

P2

CONNECTOR RECEPT USB MINI AB 5POS RT ANG WM17122CT-ND MOLEX 56579-0576 Yes

11 0

P1

CONNECTOR RECEPT MICRO USB TYPE AB SMT A97799CT-ND TYCO 1981584-1 Yes

12 1

R1

RESISTOR 100K OHM 1/10W 5% 0402 SMD P100KJCT-ND PANASONIC ERJ-2GEJ104X Yes

13 1

R2

RESISTOR 8.06K OHM 1/16W 1% 0402 SMD P8.06KLCT-ND PANASONIC ERJ-2RKF8061X Yes

14 3

R3 R4 R12

R13 R26 R28 R25 R27 R30

RESISTOR ZERO OHM 1/16W 5% 0402 SMD 311-0.0JRCT-ND YAGEO RC0402JR-070RL Yes

15 3

R6 R11 R14

R15 R16 R5 R8

RESISTOR 10.0K OHM 1/16W 1% 0402 SMD 541-10.0KLCT-ND VISHAY-DALE CRCW040210K0FKED Yes

16 1

R7

RESISTOR 27.0K OHM 1/16W 1% 0402 SMD 311-27.0KLRCT-ND YAGEO RC0402FR-0727KL Yes

17 1

R9

RESISTOR 169K OHM 1/16W 1% 0402 SMD 311-169KLRCT-ND VISHAY-DALE CRCW0402169KFKED Yes

18 0

R10

RESISTOR 1.0K OHM 1W 5% 2512 SMD 541-1.0KXCT-ND VISHAY-DALE CRCW25121K00JNEG Yes

19 1

R17

RESISTOR 1MEG OHM 1/10W 5% 0603 311-1.0MGRCT-ND YAGEO RC0603JR-071ML Yes

20 1

R18

RESISTOR 78.7K OHM 1/16W 1% 0402 SMD 541-78.7KLCT-ND VISHAY-DALE CRCW040278K7FKED Yes

21 1

R23

RESISTOR 20K OHM 1/10W 0.1% 0603 SMD P20KYCT-ND PANASONIC ERA-3YEB203V Yes

22 1

R32

RESISTOR ZERO OHM 1/4W 5% 1206 311-0.0ERCT-ND YAGEO RC1206JR-070RL Yes

23 1

R33

RESISTOR 27.0 OHM 1/16W 1% 0402 SMD 541-27.0LCT-ND VISHAY-DALE CRCW040227R0FKED Yes

24 1

R35

RESISTOR 10.0 OHM 1/16W 1% 0402 SMD P10.0LCT-ND PANASONIC ERJ-2RKF10R0X Yes

25 5

TP1 TP2 TP3

TEST POINT 5015KCT-ND KEYSTONE 5015 Yes

26 1

U1

USB33XX QFN32 SMSC USB33XX Yes

27 1

U2

IC SW DUAL USB AUTORESET 10-UMAX MAX1823 MAX1823BEUB+-ND MAXIM MAX1823BEUB Yes

28 2

U6 U8

INVERTER SINGLE LVC SOT23-5 SN74LVC1G04 296-11599-1-ND TI SN74LVC1G04DBVR Yes

29 1

U10

IC ADJ 50MA LDO REG SOT-23-5 296-2762-1-ND TI TPS77001DBVT Yes

30 1

X1

OSCILLATOR PROG 3.3V +-50PPM SMD AP3S3EC-ND ABRACON AP3S-26.0MHz Yes

31 1

Y1

CRYSTAL 26.000 MHZ 10PF SMD 535-9624-1-ND

BRACON

A

BM10-26.000MHZ-7A15-T Yes

6 USB3340 EVB Bill of Materials

Figure 6.1 USB3340 EVB Bill of Materials

SMSC USB3340 EVB 9 Revision 1.1 (12-14-10)

USER MANUAL

EVB-USB3340 USB Transceiver Evaluation Board User Manual

7 User Manual Revision History

Table 7.1 Customer Revision History

REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION

Rev. 1.1 (12-14-10) R9 on Schematic and BOM Changed from 10k to 169k

Rev. 1.0 (05-01-10) Initial Release

Revision 1.1 (12-14-10) 10 SMSC USB3340 EVB

USER MANUAL