Silicon Motion FC8053 User Manual

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8053
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Multimedia
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odulato
Cont
1. O
2. El
nts
erview .......
.1. Intr
1 1
.2. Feat
1
.3. Bloc
1
.4. RF
1
.5. Fun
ctrical Spe
2
.1. Rec
2
.2. DC
2
.3. Pow
2
.3.1. Nor
2
.3.2. LDO
2
.4. Ban
2
.5. Digi
..................
duction ......
ures ...........
Diagram ...
une
...........
tional Descr
ification ......
mmended haracteristi
r Consump
al Mode (w
Mode (w L
-III Electric
al/Clock Ge
..................
..................
..................
..................
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iption .........
..................
perating Co
s ...............
ion Charact
o LDO) ......
O) .............
l Characteri
erator Elect
..................
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..................
..................
..................
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ditions .......
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ristics .........
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stics ............
ical Charact
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......... 12
......... 13
3. R
4. H
5. S
6. H
2
.6. LDO
Tuner Inte
3
.1. PIN
3
.2. Bloc
st Interfac
4
.1. PIN
4
.2. Para
4
.3. Para
4
.4. SPI
4
.5. I2C
rial TS Data
.1. PIN
5 5
.2. Bloc
5
.3. Seri
5
.4. Seri
st Interfac
6
.1. Gen
Electrical C
face ...........
/O Definitio
Descriptio
.................
/O Definitio llel 8-bit HP llel 8-bit EBI
ost Interfa
ost Interfa
Interface ...
/O Definitio
Descriptio l TS Packet l TS Timing
Protocol ....
ral Concept
aracteristic
..................
n ...............
.................
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n ...............
Host Interf 2-LCD Host
e ...............
e ...............
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n ...............
.................
format .......
diagram .....
..................
in HPI, SPI
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ce ..............
nterface .....
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and I2C int
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......... 32
......... 32
6
.2. Det
6
.3. Det
Product da
asheet
il in HPI int il in SPI int
rface .........
rface ..........
..................
..................
2/56
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ⓒCopyright
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2011 FCI (All
R
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ights Reserved
v.110810
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il in I2C int
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RF
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F
Multimedia
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..................
8053
Broadcast
odulato
......... 36
7. P
8. P
9. F
10. A
6
.5. Gen
wer Mana
1. Pow
2. Pow
3. Pow
N Descripti
8053 Packa
9
.1. 48 P
9
.2. 48 P
plication Bl
1
0.1. In c
1
0.2. In c
1
0.3. In c
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ral Concept
ment .........
r On seque
r Off seque
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n ................
e Informati in WLCSP P in WLCSP P
ck Diagram se of HPI(E se of EBI2­se of SPI in se of I2C+
in EBI2-LC
..................
ce .............
nce ............
uence ........
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on ..............
ckage Pin ckage Dime and Schem
I2) interfa CD interfac
erface .......
SIF interfac
interface ...
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ap ..............
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ⓒCopyright
Product da
asheet
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R
ights Reserved
v.110810
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8053
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Version Rev1103 Rev1108
2 201 0 201
ate . 03. 22 . 08. 10
Revi
First releas Edit some Update the
ion Hi
for FC8053
isprints.
reference s
story
Modifi
.
hematic.
ations
ⓒCopyright
Product da
asheet
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R
ights Reserved
v.110810
Page 5
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1. Ov
1.1. Int
Broa appli
RF sin additi lon synth (CSF
Ba
rview
oduction
FCI FC80 casting. FC ation. It co
block suppo
1.2V po onal compo r required. esizer and
, and LO dis
eband bloc
53 chip is
053 has all
sists of two
ts single-ba
er supply.
ents such
For the di
CO. RF blo
tribution ne
is a inte
a highly i of the perf
main blocks
nd (Band-II
Because di
s bulky IF ect-convers
k contains
work for Ba
rated circui
tegrated d
rmance ne
RF tuner a
). It is a hi ect-convers AW filter a on, it has
NA, down-
d-3.
t provides
vice for t ded to ena
d channel
ly integrat on architec d other IF
low noise onversion
hannel de
rrestrial di
ble the full
ecoder.
d compone
ture is us
atching co
fractional-N
ixer, chann
oder for Di
ital multi
range of T-
t working w
d in RF b
ponents ar type frequ l selection
ital Multi
edia
MB
ith a
ock,
no ncy
ilter
edia
Broa
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the
unction of
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Solo
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Audi
data, It us
LCD)
Interface of
it is u
sed I2C as
) signals b
orea DAB/
nalog to D
and convol s MPEG I/II Qualcomm
ost interfac
sed on ETS
MB (TTAS.
ital Conve
tional de-i
Layer II (M
SC series
, serial TS i
300 401 (E KO -07.002
ter (ADC)
terleaver fo
SICAM) al odem chip, terface is s
REKA-147).
and TTA
or IF input
providing
orithm. It p
SPI and I2 pported als
It is also in
.KO-07.002
OFDM de orward erro ovides HPI(
as a HOST
.
compliance ) standard.
odulator,
r correctin
BI2), PPI(
interface.
with It
eed
For
BI2-
hen
ⓒCopyright
Product da
asheet
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R
ights Reserved
v.110810
Page 6
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1.2. Fea
Hi
Ko
D de
 
ures
hly integra
eiver (Eure
rea DAB/DM
S.KO-07.0
B OFDM ch
coder
Fully inte functions Automatic Full data decoded Automatic synchroni acquisitio Digital AG
ed digital d
a 147)
B (TTAS.KO
26) standar nnel demo
rated, supp
nd modes (
Mode Dete
ate of 1.8M
frame and
ation and f
with a wid
vice for DA
-07 .0024 an compliant
ulator and
rts all DAB
I, II, III an
tion (AMD)
it can be
ime
st channel r
e gain contr
d
IV)
-
l
S
M
B
Electri
ES
up to 24
I2C : up and up t interface
pport Host
rvices (audi
st
ream) PEG-2 Serial
Various T
38.4MHz able to de encoded s al Characte
beded LD
pply volta
Hz (best ca
o 1.5MHz fo
38.4MHz s or data nterface fo
, video and
-TS output clock : 1
ode 2 video ream
ristics
for Power
s : 1.2V for
e)
r control
rial TS
max. 8
data
024 ~
data with
core and
range
Demodula 64 sub-ch
II decod
Automatic
In
egrated hi
e and frequ
Simple m
require ex operation
In
erfaces
Parallel H
3-bit
3-bit
Serial Hos
bus a
it is c QSC
tion and de
nnels (UEP
multiplex r
-density S
ency de-int
mory conce
ernal mem
st Interface
ontrol pins,
nd 8-bit dat
ontrol pins,
mpatible w
eries mode
Interface
oding of up
EEP)
-configurati M supporti
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ry for DAB
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to
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1.
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LV
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B
S
Physic 4
w Power co rious powe
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anagement
a
plication ro IF suppo
pport vario
.384/19.2/
nd Frequen
Band-III
nsitivity : -
Noise Fi
Adjacent 50 dB
Far Off S
l Character
Pin WLCSP
2
m
m
or I/O nsumption :
consumpti
evices for t
rt
s external c
4.576/27/3 y
170 ~ 240
03.0 dBm re : 2.7 dB
Channel Se
nsitivity : 5
stics
packa
e wi
34 mW
n
his
loc
.4MHz
MHz
sitivity :
dB
h 3 x 3
SPI :
Product da
asheet
up to 15MH
(worst cas
),
6/56
ⓒCopyright
2011 FCI (All
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ights Reserved
v.110810
Page 7
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1.3. Blo
k Diagra
LDO_OUT
LDO_IN
m
AVDD12_RF
LDO_EN
VREFP
REXT
BB_I/BB_Q
AVDD12_LO
NC
NC
CP
VREFN
BB_IB/BB_QB
DVDD12_ADC
AVDD12_XTAL
I_XTAL
_
DVDDIO
DVDD12
HD0/TS_SDO/
SPI_SDO
I_NRESET
HD2/TS_SYNC/
SPI_CSB
SPI_SDI
APSEL
TMODE
HD3/I2C_SDA/
HD4/I2C_CLK/
HD6/I2C_AD0/
HD7/I2C_AD1/
SPI_CHIPID
SPI_CLK
EBI2_CLEAR
EBI2 SEL
CPHASE
CPOL
HA1/
HA0/
_
1.4. RF
pro (Pr fra
uner
R
tuner has and MIX
er value f
rammable
tional-N typ
al to direct-
a direct-co
GC are con
r the intern
Gain Ampli
frequency
onversion.
Figure 1>
version stru trolled by t
l tuner blo
ier), and P
synthesizer
FC8053 Bl
cture that c
e on-chip
ks. The on
A supply
and a VCO
ck Diagra
nverts Ban
emodulator,
chip demo niform sign
re integrat
-3 signal a
and they r
ulator cont
l to ADC
d for gener
ound DC fr
ulate sign
ols the gain
s a result. ting LO(Loc
quency. R
al level to
of the PG A low nois
l Oscillator
ⓒCopyright
2011 FCI (All
ights Reserved
Product da
asheet
7/56
R
v.110810
Page 8
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1.5. Fun
1.5.1. Fr
Fra the
1.5.2. Au
AG It i
1.5.3. Fa
FF
1.5.4. QP
QP int
1.5.5. Ti
ctional
me Synch
e synchro
energy ran
omatic G
should pre
affected to
t Fourier
transform t
SK Demo
K demodul
rleaving fun
e de-inte
escriptio
onization
ization coul
e of the sa
in Control
erve the a
control the l
ransform
me signal o
ulator
ator includ ction, etc.
leaver / d
and Mode
get the st
pling data.
(AGC)
plitude of r
evel of Viter
(FFT)
sub-carrier
s differenti
-punctur
Detection
rt position
ceived sign
bi soft decis
to frequenc
l demodula
a frame a
l to uniform
on signal.
signal acc
tion, QPSK
nd transmis
ity automati
rding to DM
de-mappin
ion mode b
ally.
transmissi
and frequ
calculatin
n mode.
ency de-
ind spe
1.5.6. Vit
Vi It u cod
1.5.7. Co
det
1.5.8. R
RS of
1.5.9. Cl
e de-interl
pendent of
cification.
rbi Deco
erbi decode es Maximu
of 1/4 to 8
volutiona
h
e function
ct sync byt
Decoder
decoder sho
04 bytes.
ock Gene
aver is ca
channel siz
er/Invers
should de
Likelihood
9 variable c
l De-interl
f Convolutio
of 204 byt
uld adapt (
ator
able of d
with adapti
Energy
ode convolu
equence E de rate.
aver
nal De-Inte
s RS frame.
04, 188) sh
coding 4
effective
isposal Sc
ional code
timation. It
leaver is to
rten RS sp
hannels si e-interleavi
ambler
hat is adeq
is capable o
transform b
cification. It
ultaneousl
ng techniqu
ate to mobi
decoding c
rst error to
is capable
. Also it
. It satisfie
le channel r
annel that i
rando m er
f 8 byte err
an proces
Eureka-14
ceiver.
s RCPC
or. It shoul
r correctio
Th
DMB Base
like
as 16.384/
Product da
asheet
and Chip o
9.2/24.576/
erates usin
7/38.4MHz
internal clo
oscillator.
8/56
ks generat
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ⓒCopyright
us external
2011 FCI (All
R
clock sourc
ights Reserved
v.110810
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