The Si5386E-E-EB is used for evaluating the Ultra Low Jitter, AnyFrequency, 12-output JESD204B Clock Generator. The Si5386
employs fourth-generation DSPLL technology to enable clock generation for LTE/ JESD204B applications which require the highest
level of jitter performance. The Si5386E-E-EB has four independent input clocks and a total of 12 outputs. The Si5386E-E-EB can
be easily controlled and configured using Silicon Labs’ Clock
Builder Pro™ (CBPro™) software tool.
The device revision is distinguished by a white 1 inch x 0.187 inch label with the text
“Si5386E-E-EB” installed in the lower left hand corner of the board. (For ordering purposes only, the terms “EB” and “EVB” refer to the board and the kit respectively. For the
purpose of this document, the terms are synonymous in context.)
EVB FEATURES
• Powered from USB port or external power
supply
•
Internal 48.0231 MHz crystal provides
holdover mode of operation on the Si5386
• CBPro™ GUI programmable VDDO
supplies allow each of the ten primary
outputs to have its own supply voltage
selectable from 3.3, 2.5, or 1.8 V
• CBPro™ GUI-controlled voltage, current,
and power measurements of VDD, VDDA,
and all VDDO supplies
• Status LEDs for power supplies and
control/status signals of Si5386
• SMA connectors for input clocks, output
clocks and optional external timing
reference clock
silabs.com | Building a more connected world.Rev. 0.1
Si5386 Evaluation Board User's Guide
Si5386 Functional Block Diagram
1. Si5386 Functional Block Diagram
Below is a functional block diagram of the Si5386E-E-EB. This EVB can be connected to a PC via the main USB connector for programming, control, and monitoring. See 2. Quick Start and Jumper Defaults or 5.1 Installing ClockBuilderPro (CBPro) Desktop Software
for more information.
Note: All Si5386 schematics, BOMs, User’s Guides, and software can be found online at the following link: http://www.silabs.com/
si538x-4x-evb
USB +5V
Connector
Ext +5V
Connector
USB Aux +5V
Connector
Ext Aux +5V
Connector
Input Clock 0
Input Clock 1
Input Clock 2
Input Clock 3
C8051F380
MCU
+
Peripherals
{
{
{
{
Power only
Power only
SPI
Conn
Input
Termination
Input
Termination
Input
Termination
Input
Termination
+5V_USB
+5V_Aux
VDDMCU
I2C
I2C/SPI Bus
Control/
Status
INTR
Alarm_Status
CLKIN_0
CLKIN_0B
CLKIN_1
CLKIN_1B
CLKIN_2
CLKIN_2B
CLKIN_3
CLKIN_3B
Power Supply
VDD_Core
VDD_Core
VDDO_0
VDD_3.3
VDDO_0
VDD_3.3
VDDO_1
VDDO_2
VDDO_1
VDDO_2
Si5386
VDDO_3
VDDO_4
VDDO_5
VDDO_3
VDDO_4
VDDO_5
VDDO_8
VDDO_9
VDDO_6
VDDO_7
VDDO_6
VDDO_7
VDDO_8
VDDO_9
CLKOUT_0A
CLKOUT_0AB
CLKOUT_0
CLKOUT_0B
CLKOUT_1
CLKOUT_1B
CLKOUT_2
CLKOUT_2B
CLKOUT_3
CLKOUT_3B
CLKOUT_4
CLKOUT_4B
CLKOUT_5
CLKOUT_5B
CLKOUT_6
CLKOUT_6B
CLKOUT_7
CLKOUT_7B
CLKOUT_8
CLKOUT_8B
CLKOUT_9
CLKOUT_9B
CLKOUT_9A
CLKOUT_9AB
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output Clock 0A
}
Output Clock 0
}
Output Clock 1
}
Output Clock 2
}
Output Clock 3
}
Output Clock 4
}
Output Clock 5
}
Output Clock 6
}
Output Clock 7
}
Output Clock 8
}
Output Clock 9
}
Output Clock 9A
}
Figure 1.1. Functional Block Diagram of Si5386E-E-EB
silabs.com | Building a more connected world.Rev. 0.1 | 2
2. Quick Start and Jumper Defaults
Perform the following steps to quick-start the ClockBuilderPro software.
2. Connect a USB cable from the Si5386E-E-EB to the PC where the software was installed.
3. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro software.
4. You can use ClockBuilderPro to create, download, and verify a frequency plan on the Si5386E-E-EB.
5. For the Si5386 data sheet, go to: http://www.silabs.com/si538x-4x-evb.
The following table lists the Si5386 EVB jumper defaults.
Table 2.1. Si5386 EVB Jumper Defaults*
Si5386 Evaluation Board User's Guide
Quick Start and Jumper Defaults
LocationTypeI = Installed
O= Open
JP12 pinOJP232 pinO
JP22 pinOJP243 pinall open
JP32 pinOJP252 pinO
JP42 pinIJP263 pinall open
JP52 pinOJP272 pinO
JP62 pinOJP283 pinall open
JP72 pinIJP292 pinO
JP82 pinOJP303 pinall open
JP92 pinOJP312 pinO
JP102 pinOJP323 pinall open
JP132 pinOJP332 pinO
JP142 pinIJP343 pinall open
JP153 pin1 to 2JP352 pinO
JP163 pin1 to 2JP363 pinall open
LocationTypeI = Installed
O= Open
JP172 pinOJP392 pinO
JP183 pinall openJP402 pinO
JP192 pinOJP412 pinO
JP203 pinall open
JP212 pinO
JP223 pinall openJ365x2 HdrAll 5 installed
Note: Refer to the Si5386E-E-EB schematics for the functionality associated with each jumper.
silabs.com | Building a more connected world.Rev. 0.1 | 3
Si5386 Evaluation Board User's Guide
Status LEDs
3. Status LEDs
Table 3.1. Si5386 EVB Status LEDs
LocationSilkscreenColorStatus Function Indication
D11INTRBBlueDUT Interrupt Active
D12LOLBBlueDUT Loss of Lock Indicator
D21READYGreenMCU Ready
D223P3VBlueDUT +3.3 V is present
D24BUSYGreenMCU Busy
D25INTRRedMCU Interrupt active
D26VDD DUTBlueDUT VDD voltage present
D275VUSBMAINBlueMain USB +5 V present
D27, D22, and D26 are illuminated when USB +5 V, Si5386 +3.3 V, and Si5386 Output +5 V supply voltages, respectively, are present.
D25, D21, and D24 are status LEDs showing on-board MCU activity. D11 and D12 are status indicators from the DUT.
silabs.com | Building a more connected world.Rev. 0.1 | 4
Figure 3.1. Status LEDs
Si5386 Evaluation Board User's Guide
Clock Input and Output Circuits
4. Clock Input and Output Circuits
4.1 Clock Input Circuits (INx/INxB and FB_IN/FB_INB)
The Si5386E-E-EB has eight SMA connectors (IN0/IN0B–IN2/IN2B and IN3(FB_IN)/IN3B(FB_INB)) for receiving external clock signals.
All input clocks are terminated as shown in the figure below. Note input clocks are ac coupled and 50 Ω terminated. This represents
four differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the differential pair with a singleended clock. For details on how to configure inputs as single-ended, please refer to the Si5386 data sheet.
Figure 4.1. Input Clock Termination Circuit
4.2 Clock Output Circuits (OUTx/OUTxB)
of the twenty-four output drivers (12 differential pairs) is ac coupled to its respective SMA connector. The output clock termination
Each
circuit is shown in the figure below. The output signal will have no dc bias. If dc coupling is required, the ac coupling capacitors can be
replaced with a resistor of appropriate value. The Si5386E-E-EB provides pads for optional output termination resistors and/or low frequency capacitors. Note that components with schematic “NI” designation are not normally populated on the Si5386E-E-EB, and provide locations on the PCB for optional dc/ac terminations by the end user.
Figure 4.2. Output Clock Termination Circuit
silabs.com | Building a more connected world.Rev. 0.1 | 5
Si5386 Evaluation Board User's Guide
Using the Si5386 EVB and Installing ClockBuilderPro (CBPro) Desktop Software
5. Using the Si5386 EVB and Installing ClockBuilderPro (CBPro) Desktop Software
To install the CBPro software on any Windows 7 (or above) PC:
Go to http://www.silabs.com/cbpro and download the ClockBuilderPro software.
Installation instructions, release notes, and a user’s guide for ClockBuilderPro can be found at the download link shown above. Please
follow the instructions as indicated.
5.2 Connecting the EVB to Your Host PC
Once ClockBuilderPro software in installed, connect to the EVB with a USB cable as shown below.
Figure 5.1. EVB Connection Diagram
silabs.com | Building a more connected world.Rev. 0.1 | 6
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